pyEDAA.ProjectModel 0.6.3__tar.gz → 0.7.0__tar.gz
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/PKG-INFO +43 -41
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/Altera/Quartus.py +2 -1
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/Altera/__init__.py +2 -1
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/Attributes.py +2 -1
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/GHDL.py +2 -1
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/Intel/QuartusPrime.py +2 -1
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/Intel/__init__.py +2 -1
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/MentorGraphics/ModelSim.py +2 -1
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/MentorGraphics/QuestaSim.py +2 -1
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/MentorGraphics/__init__.py +2 -1
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/OSVVM.py +2 -1
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/Verilog.py +2 -1
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/Xilinx/ISE.py +2 -1
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/Xilinx/Vivado.py +8 -9
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/Xilinx/__init__.py +2 -1
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/__init__.py +24 -24
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA.ProjectModel.egg-info/PKG-INFO +43 -41
- pyedaa_projectmodel-0.7.0/pyEDAA.ProjectModel.egg-info/requires.txt +58 -0
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyproject.toml +4 -3
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/setup.py +4 -3
- pyedaa_projectmodel-0.6.3/pyEDAA.ProjectModel.egg-info/requires.txt +0 -56
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/LICENSE.md +0 -0
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/README.md +0 -0
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/VHDL.py +0 -0
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/py.typed +0 -0
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA.ProjectModel.egg-info/SOURCES.txt +0 -0
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA.ProjectModel.egg-info/dependency_links.txt +0 -0
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA.ProjectModel.egg-info/top_level.txt +0 -0
- {pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/setup.cfg +0 -0
|
@@ -1,6 +1,6 @@
|
|
|
1
1
|
Metadata-Version: 2.4
|
|
2
2
|
Name: pyEDAA.ProjectModel
|
|
3
|
-
Version: 0.
|
|
3
|
+
Version: 0.7.0
|
|
4
4
|
Summary: An abstract model of EDA tool projects.
|
|
5
5
|
Home-page: https://GitHub.com/edaa-org/pyEDAA.ProjectModel
|
|
6
6
|
Author: Patrick Lehmann
|
|
@@ -14,68 +14,70 @@ Classifier: Operating System :: OS Independent
|
|
|
14
14
|
Classifier: Intended Audience :: Developers
|
|
15
15
|
Classifier: Topic :: Utilities
|
|
16
16
|
Classifier: Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)
|
|
17
|
-
Classifier: License :: OSI Approved :: Apache Software License
|
|
18
17
|
Classifier: Programming Language :: Python :: 3 :: Only
|
|
19
18
|
Classifier: Programming Language :: Python :: 3.11
|
|
20
19
|
Classifier: Programming Language :: Python :: 3.12
|
|
21
20
|
Classifier: Programming Language :: Python :: 3.13
|
|
22
21
|
Classifier: Programming Language :: Python :: 3.14
|
|
22
|
+
Classifier: Programming Language :: Python :: 3.15
|
|
23
23
|
Classifier: Development Status :: 4 - Beta
|
|
24
24
|
Requires-Python: >=3.11
|
|
25
25
|
Description-Content-Type: text/markdown
|
|
26
26
|
License-File: LICENSE.md
|
|
27
|
-
Requires-Dist:
|
|
28
|
-
Requires-Dist: pyVHDLModel~=0.
|
|
29
|
-
Requires-Dist:
|
|
30
|
-
Requires-Dist: pySVModel~=0.
|
|
27
|
+
Requires-Dist: pySystemRDLModel~=0.4.0
|
|
28
|
+
Requires-Dist: pyVHDLModel~=0.40.0
|
|
29
|
+
Requires-Dist: pyTooling<11.0,>=10.1.1
|
|
30
|
+
Requires-Dist: pySVModel~=0.6.0
|
|
31
31
|
Provides-Extra: doc
|
|
32
|
-
Requires-Dist:
|
|
33
|
-
Requires-Dist: autoapi>=2.0.1; extra == "doc"
|
|
34
|
-
Requires-Dist: sphinx_rtd_theme~=3.1; extra == "doc"
|
|
32
|
+
Requires-Dist: pyTooling.Sphinx[reports]~=1.0; extra == "doc"
|
|
35
33
|
Requires-Dist: docutils_stubs~=0.0.22; extra == "doc"
|
|
36
|
-
Requires-Dist:
|
|
37
|
-
Requires-Dist:
|
|
38
|
-
Requires-Dist: pyTooling~=8.15; extra == "doc"
|
|
39
|
-
Requires-Dist: pyVHDLModel~=0.35.0; extra == "doc"
|
|
34
|
+
Requires-Dist: pyVHDLModel~=0.40.0; extra == "doc"
|
|
35
|
+
Requires-Dist: sphinx~=9.2; extra == "doc"
|
|
40
36
|
Requires-Dist: sphinx_design~=0.7.0; extra == "doc"
|
|
37
|
+
Requires-Dist: pySVModel~=0.6.0; extra == "doc"
|
|
38
|
+
Requires-Dist: pySystemRDLModel~=0.4.0; extra == "doc"
|
|
41
39
|
Requires-Dist: sphinx-copybutton>=0.5.2; extra == "doc"
|
|
42
|
-
Requires-Dist:
|
|
43
|
-
Requires-Dist:
|
|
44
|
-
Requires-Dist:
|
|
40
|
+
Requires-Dist: sphinx_rtd_theme~=3.1; extra == "doc"
|
|
41
|
+
Requires-Dist: sphinxcontrib-mermaid~=2.1; extra == "doc"
|
|
42
|
+
Requires-Dist: autoapi>=2.0.1; extra == "doc"
|
|
43
|
+
Requires-Dist: sphinx_autodoc_typehints~=3.17; extra == "doc"
|
|
44
|
+
Requires-Dist: pyTooling<11.0,>=10.1.1; extra == "doc"
|
|
45
45
|
Provides-Extra: test
|
|
46
|
-
Requires-Dist:
|
|
47
|
-
Requires-Dist:
|
|
48
|
-
Requires-Dist:
|
|
49
|
-
Requires-Dist: pySystemRDLModel~=0.
|
|
50
|
-
Requires-Dist:
|
|
51
|
-
Requires-Dist:
|
|
52
|
-
Requires-Dist: Coverage~=7.14; extra == "test"
|
|
46
|
+
Requires-Dist: pyVHDLModel~=0.40.0; extra == "test"
|
|
47
|
+
Requires-Dist: typing_extensions~=4.16; extra == "test"
|
|
48
|
+
Requires-Dist: pySVModel~=0.6.0; extra == "test"
|
|
49
|
+
Requires-Dist: pySystemRDLModel~=0.4.0; extra == "test"
|
|
50
|
+
Requires-Dist: pytest~=9.1; extra == "test"
|
|
51
|
+
Requires-Dist: mypy[reports]~=2.4; extra == "test"
|
|
53
52
|
Requires-Dist: pytest-cov~=7.1; extra == "test"
|
|
54
|
-
Requires-Dist:
|
|
55
|
-
Requires-Dist:
|
|
53
|
+
Requires-Dist: lxml<7.0,>=6.1.3; extra == "test"
|
|
54
|
+
Requires-Dist: Coverage~=7.17; extra == "test"
|
|
55
|
+
Requires-Dist: pytest-xdist~=3.8; extra == "test"
|
|
56
|
+
Requires-Dist: pyTooling<11.0,>=10.1.1; extra == "test"
|
|
56
57
|
Provides-Extra: osvvm
|
|
57
58
|
Requires-Dist: pyEDAA.OSVVM~=0.6; extra == "osvvm"
|
|
58
59
|
Provides-Extra: all
|
|
59
60
|
Requires-Dist: docutils_stubs~=0.0.22; extra == "all"
|
|
60
|
-
Requires-Dist:
|
|
61
|
-
Requires-Dist:
|
|
62
|
-
Requires-Dist: Coverage~=7.14; extra == "all"
|
|
63
|
-
Requires-Dist: pyTooling~=8.15; extra == "all"
|
|
64
|
-
Requires-Dist: sphinx_design~=0.7.0; extra == "all"
|
|
65
|
-
Requires-Dist: pytest~=9.0; extra == "all"
|
|
66
|
-
Requires-Dist: sphinx_autodoc_typehints~=3.10; extra == "all"
|
|
67
|
-
Requires-Dist: autoapi>=2.0.1; extra == "all"
|
|
61
|
+
Requires-Dist: pyVHDLModel~=0.40.0; extra == "all"
|
|
62
|
+
Requires-Dist: typing_extensions~=4.16; extra == "all"
|
|
68
63
|
Requires-Dist: sphinx_rtd_theme~=3.1; extra == "all"
|
|
69
|
-
Requires-Dist:
|
|
64
|
+
Requires-Dist: Coverage~=7.17; extra == "all"
|
|
65
|
+
Requires-Dist: pyTooling.Sphinx[reports]~=1.0; extra == "all"
|
|
66
|
+
Requires-Dist: sphinx~=9.2; extra == "all"
|
|
67
|
+
Requires-Dist: pySVModel~=0.6.0; extra == "all"
|
|
68
|
+
Requires-Dist: pySystemRDLModel~=0.4.0; extra == "all"
|
|
69
|
+
Requires-Dist: pytest~=9.1; extra == "all"
|
|
70
|
+
Requires-Dist: mypy[reports]~=2.4; extra == "all"
|
|
71
|
+
Requires-Dist: sphinxcontrib-mermaid~=2.1; extra == "all"
|
|
72
|
+
Requires-Dist: autoapi>=2.0.1; extra == "all"
|
|
73
|
+
Requires-Dist: pytest-xdist~=3.8; extra == "all"
|
|
70
74
|
Requires-Dist: pyEDAA.OSVVM~=0.6; extra == "all"
|
|
75
|
+
Requires-Dist: sphinx_autodoc_typehints~=3.17; extra == "all"
|
|
76
|
+
Requires-Dist: pyTooling<11.0,>=10.1.1; extra == "all"
|
|
77
|
+
Requires-Dist: sphinx_design~=0.7.0; extra == "all"
|
|
78
|
+
Requires-Dist: sphinx-copybutton>=0.5.2; extra == "all"
|
|
71
79
|
Requires-Dist: pytest-cov~=7.1; extra == "all"
|
|
72
|
-
Requires-Dist:
|
|
73
|
-
Requires-Dist: pySVModel~=0.5.0; extra == "all"
|
|
74
|
-
Requires-Dist: lxml<7.0,>=6.1; extra == "all"
|
|
75
|
-
Requires-Dist: typing_extensions~=4.15; extra == "all"
|
|
76
|
-
Requires-Dist: pyVHDLModel~=0.35.0; extra == "all"
|
|
77
|
-
Requires-Dist: mypy[reports]~=2.1; extra == "all"
|
|
78
|
-
Requires-Dist: sphinxcontrib-mermaid~=2.0; extra == "all"
|
|
80
|
+
Requires-Dist: lxml<7.0,>=6.1.3; extra == "all"
|
|
79
81
|
Dynamic: author
|
|
80
82
|
Dynamic: author-email
|
|
81
83
|
Dynamic: classifier
|
{pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/Altera/Quartus.py
RENAMED
|
@@ -11,7 +11,8 @@
|
|
|
11
11
|
# #
|
|
12
12
|
# License: #
|
|
13
13
|
# ==================================================================================================================== #
|
|
14
|
-
# Copyright
|
|
14
|
+
# Copyright 2021-2026 Electronic Design Automation Abstraction (EDA²) #
|
|
15
|
+
# Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany #
|
|
15
16
|
# #
|
|
16
17
|
# Licensed under the Apache License, Version 2.0 (the "License"); #
|
|
17
18
|
# you may not use this file except in compliance with the License. #
|
{pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/Altera/__init__.py
RENAMED
|
@@ -11,7 +11,8 @@
|
|
|
11
11
|
# #
|
|
12
12
|
# License: #
|
|
13
13
|
# ==================================================================================================================== #
|
|
14
|
-
# Copyright
|
|
14
|
+
# Copyright 2021-2026 Electronic Design Automation Abstraction (EDA²) #
|
|
15
|
+
# Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany #
|
|
15
16
|
# #
|
|
16
17
|
# Licensed under the Apache License, Version 2.0 (the "License"); #
|
|
17
18
|
# you may not use this file except in compliance with the License. #
|
|
@@ -11,7 +11,8 @@
|
|
|
11
11
|
# #
|
|
12
12
|
# License: #
|
|
13
13
|
# ==================================================================================================================== #
|
|
14
|
-
# Copyright
|
|
14
|
+
# Copyright 2021-2026 Electronic Design Automation Abstraction (EDA²) #
|
|
15
|
+
# Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany #
|
|
15
16
|
# #
|
|
16
17
|
# Licensed under the Apache License, Version 2.0 (the "License"); #
|
|
17
18
|
# you may not use this file except in compliance with the License. #
|
|
@@ -11,7 +11,8 @@
|
|
|
11
11
|
# #
|
|
12
12
|
# License: #
|
|
13
13
|
# ==================================================================================================================== #
|
|
14
|
-
# Copyright
|
|
14
|
+
# Copyright 2021-2026 Electronic Design Automation Abstraction (EDA²) #
|
|
15
|
+
# Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany #
|
|
15
16
|
# #
|
|
16
17
|
# Licensed under the Apache License, Version 2.0 (the "License"); #
|
|
17
18
|
# you may not use this file except in compliance with the License. #
|
{pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/Intel/QuartusPrime.py
RENAMED
|
@@ -11,7 +11,8 @@
|
|
|
11
11
|
# #
|
|
12
12
|
# License: #
|
|
13
13
|
# ==================================================================================================================== #
|
|
14
|
-
# Copyright
|
|
14
|
+
# Copyright 2021-2026 Electronic Design Automation Abstraction (EDA²) #
|
|
15
|
+
# Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany #
|
|
15
16
|
# #
|
|
16
17
|
# Licensed under the Apache License, Version 2.0 (the "License"); #
|
|
17
18
|
# you may not use this file except in compliance with the License. #
|
{pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/Intel/__init__.py
RENAMED
|
@@ -11,7 +11,8 @@
|
|
|
11
11
|
# #
|
|
12
12
|
# License: #
|
|
13
13
|
# ==================================================================================================================== #
|
|
14
|
-
# Copyright
|
|
14
|
+
# Copyright 2021-2026 Electronic Design Automation Abstraction (EDA²) #
|
|
15
|
+
# Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany #
|
|
15
16
|
# #
|
|
16
17
|
# Licensed under the Apache License, Version 2.0 (the "License"); #
|
|
17
18
|
# you may not use this file except in compliance with the License. #
|
|
@@ -11,7 +11,8 @@
|
|
|
11
11
|
# #
|
|
12
12
|
# License: #
|
|
13
13
|
# ==================================================================================================================== #
|
|
14
|
-
# Copyright
|
|
14
|
+
# Copyright 2021-2026 Electronic Design Automation Abstraction (EDA²) #
|
|
15
|
+
# Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany #
|
|
15
16
|
# #
|
|
16
17
|
# Licensed under the Apache License, Version 2.0 (the "License"); #
|
|
17
18
|
# you may not use this file except in compliance with the License. #
|
|
@@ -11,7 +11,8 @@
|
|
|
11
11
|
# #
|
|
12
12
|
# License: #
|
|
13
13
|
# ==================================================================================================================== #
|
|
14
|
-
# Copyright
|
|
14
|
+
# Copyright 2021-2026 Electronic Design Automation Abstraction (EDA²) #
|
|
15
|
+
# Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany #
|
|
15
16
|
# #
|
|
16
17
|
# Licensed under the Apache License, Version 2.0 (the "License"); #
|
|
17
18
|
# you may not use this file except in compliance with the License. #
|
|
@@ -11,7 +11,8 @@
|
|
|
11
11
|
# #
|
|
12
12
|
# License: #
|
|
13
13
|
# ==================================================================================================================== #
|
|
14
|
-
# Copyright
|
|
14
|
+
# Copyright 2021-2026 Electronic Design Automation Abstraction (EDA²) #
|
|
15
|
+
# Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany #
|
|
15
16
|
# #
|
|
16
17
|
# Licensed under the Apache License, Version 2.0 (the "License"); #
|
|
17
18
|
# you may not use this file except in compliance with the License. #
|
|
@@ -11,7 +11,8 @@
|
|
|
11
11
|
# #
|
|
12
12
|
# License: #
|
|
13
13
|
# ==================================================================================================================== #
|
|
14
|
-
# Copyright
|
|
14
|
+
# Copyright 2021-2026 Electronic Design Automation Abstraction (EDA²) #
|
|
15
|
+
# Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany #
|
|
15
16
|
# #
|
|
16
17
|
# Licensed under the Apache License, Version 2.0 (the "License"); #
|
|
17
18
|
# you may not use this file except in compliance with the License. #
|
|
@@ -11,7 +11,8 @@
|
|
|
11
11
|
# #
|
|
12
12
|
# License: #
|
|
13
13
|
# ==================================================================================================================== #
|
|
14
|
-
# Copyright
|
|
14
|
+
# Copyright 2021-2026 Electronic Design Automation Abstraction (EDA²) #
|
|
15
|
+
# Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany #
|
|
15
16
|
# #
|
|
16
17
|
# Licensed under the Apache License, Version 2.0 (the "License"); #
|
|
17
18
|
# you may not use this file except in compliance with the License. #
|
|
@@ -11,7 +11,8 @@
|
|
|
11
11
|
# #
|
|
12
12
|
# License: #
|
|
13
13
|
# ==================================================================================================================== #
|
|
14
|
-
# Copyright
|
|
14
|
+
# Copyright 2021-2026 Electronic Design Automation Abstraction (EDA²) #
|
|
15
|
+
# Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany #
|
|
15
16
|
# #
|
|
16
17
|
# Licensed under the Apache License, Version 2.0 (the "License"); #
|
|
17
18
|
# you may not use this file except in compliance with the License. #
|
{pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/Xilinx/Vivado.py
RENAMED
|
@@ -11,7 +11,8 @@
|
|
|
11
11
|
# #
|
|
12
12
|
# License: #
|
|
13
13
|
# ==================================================================================================================== #
|
|
14
|
-
# Copyright
|
|
14
|
+
# Copyright 2021-2026 Electronic Design Automation Abstraction (EDA²) #
|
|
15
|
+
# Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany #
|
|
15
16
|
# #
|
|
16
17
|
# Licensed under the Apache License, Version 2.0 (the "License"); #
|
|
17
18
|
# you may not use this file except in compliance with the License. #
|
|
@@ -29,19 +30,17 @@
|
|
|
29
30
|
# ==================================================================================================================== #
|
|
30
31
|
#
|
|
31
32
|
"""Specific file types and attributes for Xilinx Vivado."""
|
|
32
|
-
from pathlib
|
|
33
|
-
from typing
|
|
34
|
-
from xml.dom
|
|
33
|
+
from pathlib import Path
|
|
34
|
+
from typing import Iterable, Optional as Nullable
|
|
35
|
+
from xml.dom import minidom, Node
|
|
35
36
|
|
|
36
37
|
from pyTooling.Decorators import export
|
|
37
38
|
from pyTooling.MetaClasses import ExtendedType
|
|
38
39
|
from pyVHDLModel import VHDLVersion
|
|
39
40
|
|
|
40
|
-
from pyEDAA.ProjectModel
|
|
41
|
-
|
|
42
|
-
|
|
43
|
-
from pyEDAA.ProjectModel import VerilogSourceFile as Model_VerilogSourceFile
|
|
44
|
-
from pyEDAA.ProjectModel import VHDLSourceFile as Model_VHDLSourceFile
|
|
41
|
+
from pyEDAA.ProjectModel import ProjectFile, XMLFile, XMLContent, SDCContent, Project, FileSet, Attribute, Design, \
|
|
42
|
+
File as Model_File, ConstraintFile as Model_ConstraintFile, \
|
|
43
|
+
VerilogSourceFile as Model_VerilogSourceFile, VHDLSourceFile as Model_VHDLSourceFile
|
|
45
44
|
|
|
46
45
|
|
|
47
46
|
@export
|
{pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA/ProjectModel/Xilinx/__init__.py
RENAMED
|
@@ -11,7 +11,8 @@
|
|
|
11
11
|
# #
|
|
12
12
|
# License: #
|
|
13
13
|
# ==================================================================================================================== #
|
|
14
|
-
# Copyright
|
|
14
|
+
# Copyright 2021-2026 Electronic Design Automation Abstraction (EDA²) #
|
|
15
|
+
# Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany #
|
|
15
16
|
# #
|
|
16
17
|
# Licensed under the Apache License, Version 2.0 (the "License"); #
|
|
17
18
|
# you may not use this file except in compliance with the License. #
|
|
@@ -11,8 +11,9 @@
|
|
|
11
11
|
# #
|
|
12
12
|
# License: #
|
|
13
13
|
# ==================================================================================================================== #
|
|
14
|
-
# Copyright
|
|
15
|
-
# Copyright
|
|
14
|
+
# Copyright 2021-2026 Electronic Design Automation Abstraction (EDA²) #
|
|
15
|
+
# Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany #
|
|
16
|
+
# Copyright 2014-2016 Technische Universitaet Dresden - Germany, Chair of VLSI-Design, Diagnostics and Architecture #
|
|
16
17
|
# #
|
|
17
18
|
# Licensed under the Apache License, Version 2.0 (the "License"); #
|
|
18
19
|
# you may not use this file except in compliance with the License. #
|
|
@@ -30,17 +31,20 @@
|
|
|
30
31
|
# ==================================================================================================================== #
|
|
31
32
|
#
|
|
32
33
|
"""An abstract model of EDA tool projects."""
|
|
33
|
-
__author__ =
|
|
34
|
-
__email__ =
|
|
35
|
-
__copyright__ =
|
|
36
|
-
__license__ =
|
|
37
|
-
__version__ =
|
|
38
|
-
__keywords__ =
|
|
39
|
-
|
|
40
|
-
|
|
41
|
-
|
|
42
|
-
|
|
43
|
-
from
|
|
34
|
+
__author__ = "Patrick Lehmann"
|
|
35
|
+
__email__ = "Paebbels@gmail.com"
|
|
36
|
+
__copyright__ = "2021-2026, Electronic Design Automation Abstraction (EDA²)"
|
|
37
|
+
__license__ = "Apache License, Version 2.0"
|
|
38
|
+
__version__ = "0.7.0"
|
|
39
|
+
__keywords__ = ["eda project", "model", "abstract", "xilinx", "vivado", "osvvm", "file set", "file group", "test bench", "test harness"]
|
|
40
|
+
__project_url__ = "https://github.com/edaa-org/pyEDAA.ProjectModel"
|
|
41
|
+
__documentation_url__ = "https://edaa-org.github.io/pyEDAA.ProjectModel"
|
|
42
|
+
__issue_tracker_url__ = "https://GitHub.com/edaa-org/pyEDAA.ProjectModel/issues"
|
|
43
|
+
|
|
44
|
+
from os.path import relpath as path_relpath
|
|
45
|
+
from pathlib import Path as pathlib_Path
|
|
46
|
+
from typing import Dict, Union, Optional as Nullable, List, Iterable, Generator, Tuple, \
|
|
47
|
+
Any as typing_Any, Type, Set, Self
|
|
44
48
|
|
|
45
49
|
from pyTooling.Common import getFullyQualifiedName
|
|
46
50
|
from pyTooling.Decorators import export
|
|
@@ -431,16 +435,15 @@ class VHDLSourceFile(HDLSourceFile, HumanReadableContent):
|
|
|
431
435
|
except KeyError as ex:
|
|
432
436
|
raise Exception(f"VHDL library '{vhdlLibrary}' not found in default design '{project.DefaultDesign.Name}'.") from ex
|
|
433
437
|
else:
|
|
434
|
-
raise Exception(
|
|
438
|
+
raise Exception("Can't lookup VHDL library because neither 'project' nor 'design' is given as a parameter.")
|
|
435
439
|
elif isinstance(vhdlLibrary, VHDLLibrary):
|
|
436
440
|
self._vhdlLibrary = vhdlLibrary
|
|
437
441
|
vhdlLibrary.AddFile(self)
|
|
438
442
|
elif vhdlLibrary is None:
|
|
439
443
|
self._vhdlLibrary = None
|
|
440
444
|
else:
|
|
441
|
-
ex = TypeError(
|
|
442
|
-
|
|
443
|
-
ex.add_note(f"Got type '{getFullyQualifiedName(vhdlLibrary)}'.")
|
|
445
|
+
ex = TypeError("Parameter 'vhdlLibrary' is neither a 'str' nor 'VHDLibrary'.")
|
|
446
|
+
ex.add_note(f"Got type '{getFullyQualifiedName(vhdlLibrary)}'.")
|
|
444
447
|
raise ex
|
|
445
448
|
|
|
446
449
|
self._vhdlVersion = vhdlVersion
|
|
@@ -916,13 +919,11 @@ class FileSet(metaclass=ExtendedType, slots=True):
|
|
|
916
919
|
raise TypeError("Parameter 'file' is not of type ProjectModel.File.")
|
|
917
920
|
elif file._fileSet is not None:
|
|
918
921
|
ex = ValueError(f"File '{file.Path!s}' is already part of fileset '{file.FileSet.Name}'.")
|
|
919
|
-
|
|
920
|
-
ex.add_note(f"A file can't be assigned to another fileset.")
|
|
922
|
+
ex.add_note("A file can't be assigned to another fileset.")
|
|
921
923
|
raise ex
|
|
922
924
|
elif file in self._set:
|
|
923
925
|
ex = ValueError(f"File '{file.Path!s}' is already part of this fileset.")
|
|
924
|
-
|
|
925
|
-
ex.add_note(f"A file can't be added twice to a fileset.")
|
|
926
|
+
ex.add_note("A file can't be added twice to a fileset.")
|
|
926
927
|
raise ex
|
|
927
928
|
|
|
928
929
|
self._files.append(file)
|
|
@@ -1255,9 +1256,8 @@ class VHDLLibrary(metaclass=ExtendedType, slots=True):
|
|
|
1255
1256
|
|
|
1256
1257
|
def AddFile(self, vhdlFile: VHDLSourceFile) -> None:
|
|
1257
1258
|
if not isinstance(vhdlFile, VHDLSourceFile):
|
|
1258
|
-
ex = TypeError(
|
|
1259
|
-
|
|
1260
|
-
ex.add_note(f"Got type '{getFullyQualifiedName(vhdlFile)}'.")
|
|
1259
|
+
ex = TypeError("Parameter 'vhdlFile' is not a 'VHDLSourceFile'.")
|
|
1260
|
+
ex.add_note(f"Got type '{getFullyQualifiedName(vhdlFile)}'.")
|
|
1261
1261
|
raise ex
|
|
1262
1262
|
|
|
1263
1263
|
self._files.append(vhdlFile)
|
{pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA.ProjectModel.egg-info/PKG-INFO
RENAMED
|
@@ -1,6 +1,6 @@
|
|
|
1
1
|
Metadata-Version: 2.4
|
|
2
2
|
Name: pyEDAA.ProjectModel
|
|
3
|
-
Version: 0.
|
|
3
|
+
Version: 0.7.0
|
|
4
4
|
Summary: An abstract model of EDA tool projects.
|
|
5
5
|
Home-page: https://GitHub.com/edaa-org/pyEDAA.ProjectModel
|
|
6
6
|
Author: Patrick Lehmann
|
|
@@ -14,68 +14,70 @@ Classifier: Operating System :: OS Independent
|
|
|
14
14
|
Classifier: Intended Audience :: Developers
|
|
15
15
|
Classifier: Topic :: Utilities
|
|
16
16
|
Classifier: Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)
|
|
17
|
-
Classifier: License :: OSI Approved :: Apache Software License
|
|
18
17
|
Classifier: Programming Language :: Python :: 3 :: Only
|
|
19
18
|
Classifier: Programming Language :: Python :: 3.11
|
|
20
19
|
Classifier: Programming Language :: Python :: 3.12
|
|
21
20
|
Classifier: Programming Language :: Python :: 3.13
|
|
22
21
|
Classifier: Programming Language :: Python :: 3.14
|
|
22
|
+
Classifier: Programming Language :: Python :: 3.15
|
|
23
23
|
Classifier: Development Status :: 4 - Beta
|
|
24
24
|
Requires-Python: >=3.11
|
|
25
25
|
Description-Content-Type: text/markdown
|
|
26
26
|
License-File: LICENSE.md
|
|
27
|
-
Requires-Dist:
|
|
28
|
-
Requires-Dist: pyVHDLModel~=0.
|
|
29
|
-
Requires-Dist:
|
|
30
|
-
Requires-Dist: pySVModel~=0.
|
|
27
|
+
Requires-Dist: pySystemRDLModel~=0.4.0
|
|
28
|
+
Requires-Dist: pyVHDLModel~=0.40.0
|
|
29
|
+
Requires-Dist: pyTooling<11.0,>=10.1.1
|
|
30
|
+
Requires-Dist: pySVModel~=0.6.0
|
|
31
31
|
Provides-Extra: doc
|
|
32
|
-
Requires-Dist:
|
|
33
|
-
Requires-Dist: autoapi>=2.0.1; extra == "doc"
|
|
34
|
-
Requires-Dist: sphinx_rtd_theme~=3.1; extra == "doc"
|
|
32
|
+
Requires-Dist: pyTooling.Sphinx[reports]~=1.0; extra == "doc"
|
|
35
33
|
Requires-Dist: docutils_stubs~=0.0.22; extra == "doc"
|
|
36
|
-
Requires-Dist:
|
|
37
|
-
Requires-Dist:
|
|
38
|
-
Requires-Dist: pyTooling~=8.15; extra == "doc"
|
|
39
|
-
Requires-Dist: pyVHDLModel~=0.35.0; extra == "doc"
|
|
34
|
+
Requires-Dist: pyVHDLModel~=0.40.0; extra == "doc"
|
|
35
|
+
Requires-Dist: sphinx~=9.2; extra == "doc"
|
|
40
36
|
Requires-Dist: sphinx_design~=0.7.0; extra == "doc"
|
|
37
|
+
Requires-Dist: pySVModel~=0.6.0; extra == "doc"
|
|
38
|
+
Requires-Dist: pySystemRDLModel~=0.4.0; extra == "doc"
|
|
41
39
|
Requires-Dist: sphinx-copybutton>=0.5.2; extra == "doc"
|
|
42
|
-
Requires-Dist:
|
|
43
|
-
Requires-Dist:
|
|
44
|
-
Requires-Dist:
|
|
40
|
+
Requires-Dist: sphinx_rtd_theme~=3.1; extra == "doc"
|
|
41
|
+
Requires-Dist: sphinxcontrib-mermaid~=2.1; extra == "doc"
|
|
42
|
+
Requires-Dist: autoapi>=2.0.1; extra == "doc"
|
|
43
|
+
Requires-Dist: sphinx_autodoc_typehints~=3.17; extra == "doc"
|
|
44
|
+
Requires-Dist: pyTooling<11.0,>=10.1.1; extra == "doc"
|
|
45
45
|
Provides-Extra: test
|
|
46
|
-
Requires-Dist:
|
|
47
|
-
Requires-Dist:
|
|
48
|
-
Requires-Dist:
|
|
49
|
-
Requires-Dist: pySystemRDLModel~=0.
|
|
50
|
-
Requires-Dist:
|
|
51
|
-
Requires-Dist:
|
|
52
|
-
Requires-Dist: Coverage~=7.14; extra == "test"
|
|
46
|
+
Requires-Dist: pyVHDLModel~=0.40.0; extra == "test"
|
|
47
|
+
Requires-Dist: typing_extensions~=4.16; extra == "test"
|
|
48
|
+
Requires-Dist: pySVModel~=0.6.0; extra == "test"
|
|
49
|
+
Requires-Dist: pySystemRDLModel~=0.4.0; extra == "test"
|
|
50
|
+
Requires-Dist: pytest~=9.1; extra == "test"
|
|
51
|
+
Requires-Dist: mypy[reports]~=2.4; extra == "test"
|
|
53
52
|
Requires-Dist: pytest-cov~=7.1; extra == "test"
|
|
54
|
-
Requires-Dist:
|
|
55
|
-
Requires-Dist:
|
|
53
|
+
Requires-Dist: lxml<7.0,>=6.1.3; extra == "test"
|
|
54
|
+
Requires-Dist: Coverage~=7.17; extra == "test"
|
|
55
|
+
Requires-Dist: pytest-xdist~=3.8; extra == "test"
|
|
56
|
+
Requires-Dist: pyTooling<11.0,>=10.1.1; extra == "test"
|
|
56
57
|
Provides-Extra: osvvm
|
|
57
58
|
Requires-Dist: pyEDAA.OSVVM~=0.6; extra == "osvvm"
|
|
58
59
|
Provides-Extra: all
|
|
59
60
|
Requires-Dist: docutils_stubs~=0.0.22; extra == "all"
|
|
60
|
-
Requires-Dist:
|
|
61
|
-
Requires-Dist:
|
|
62
|
-
Requires-Dist: Coverage~=7.14; extra == "all"
|
|
63
|
-
Requires-Dist: pyTooling~=8.15; extra == "all"
|
|
64
|
-
Requires-Dist: sphinx_design~=0.7.0; extra == "all"
|
|
65
|
-
Requires-Dist: pytest~=9.0; extra == "all"
|
|
66
|
-
Requires-Dist: sphinx_autodoc_typehints~=3.10; extra == "all"
|
|
67
|
-
Requires-Dist: autoapi>=2.0.1; extra == "all"
|
|
61
|
+
Requires-Dist: pyVHDLModel~=0.40.0; extra == "all"
|
|
62
|
+
Requires-Dist: typing_extensions~=4.16; extra == "all"
|
|
68
63
|
Requires-Dist: sphinx_rtd_theme~=3.1; extra == "all"
|
|
69
|
-
Requires-Dist:
|
|
64
|
+
Requires-Dist: Coverage~=7.17; extra == "all"
|
|
65
|
+
Requires-Dist: pyTooling.Sphinx[reports]~=1.0; extra == "all"
|
|
66
|
+
Requires-Dist: sphinx~=9.2; extra == "all"
|
|
67
|
+
Requires-Dist: pySVModel~=0.6.0; extra == "all"
|
|
68
|
+
Requires-Dist: pySystemRDLModel~=0.4.0; extra == "all"
|
|
69
|
+
Requires-Dist: pytest~=9.1; extra == "all"
|
|
70
|
+
Requires-Dist: mypy[reports]~=2.4; extra == "all"
|
|
71
|
+
Requires-Dist: sphinxcontrib-mermaid~=2.1; extra == "all"
|
|
72
|
+
Requires-Dist: autoapi>=2.0.1; extra == "all"
|
|
73
|
+
Requires-Dist: pytest-xdist~=3.8; extra == "all"
|
|
70
74
|
Requires-Dist: pyEDAA.OSVVM~=0.6; extra == "all"
|
|
75
|
+
Requires-Dist: sphinx_autodoc_typehints~=3.17; extra == "all"
|
|
76
|
+
Requires-Dist: pyTooling<11.0,>=10.1.1; extra == "all"
|
|
77
|
+
Requires-Dist: sphinx_design~=0.7.0; extra == "all"
|
|
78
|
+
Requires-Dist: sphinx-copybutton>=0.5.2; extra == "all"
|
|
71
79
|
Requires-Dist: pytest-cov~=7.1; extra == "all"
|
|
72
|
-
Requires-Dist:
|
|
73
|
-
Requires-Dist: pySVModel~=0.5.0; extra == "all"
|
|
74
|
-
Requires-Dist: lxml<7.0,>=6.1; extra == "all"
|
|
75
|
-
Requires-Dist: typing_extensions~=4.15; extra == "all"
|
|
76
|
-
Requires-Dist: pyVHDLModel~=0.35.0; extra == "all"
|
|
77
|
-
Requires-Dist: mypy[reports]~=2.1; extra == "all"
|
|
78
|
-
Requires-Dist: sphinxcontrib-mermaid~=2.0; extra == "all"
|
|
80
|
+
Requires-Dist: lxml<7.0,>=6.1.3; extra == "all"
|
|
79
81
|
Dynamic: author
|
|
80
82
|
Dynamic: author-email
|
|
81
83
|
Dynamic: classifier
|
|
@@ -0,0 +1,58 @@
|
|
|
1
|
+
pySystemRDLModel~=0.4.0
|
|
2
|
+
pyVHDLModel~=0.40.0
|
|
3
|
+
pyTooling<11.0,>=10.1.1
|
|
4
|
+
pySVModel~=0.6.0
|
|
5
|
+
|
|
6
|
+
[all]
|
|
7
|
+
docutils_stubs~=0.0.22
|
|
8
|
+
pyVHDLModel~=0.40.0
|
|
9
|
+
typing_extensions~=4.16
|
|
10
|
+
sphinx_rtd_theme~=3.1
|
|
11
|
+
Coverage~=7.17
|
|
12
|
+
pyTooling.Sphinx[reports]~=1.0
|
|
13
|
+
sphinx~=9.2
|
|
14
|
+
pySVModel~=0.6.0
|
|
15
|
+
pySystemRDLModel~=0.4.0
|
|
16
|
+
pytest~=9.1
|
|
17
|
+
mypy[reports]~=2.4
|
|
18
|
+
sphinxcontrib-mermaid~=2.1
|
|
19
|
+
autoapi>=2.0.1
|
|
20
|
+
pytest-xdist~=3.8
|
|
21
|
+
pyEDAA.OSVVM~=0.6
|
|
22
|
+
sphinx_autodoc_typehints~=3.17
|
|
23
|
+
pyTooling<11.0,>=10.1.1
|
|
24
|
+
sphinx_design~=0.7.0
|
|
25
|
+
sphinx-copybutton>=0.5.2
|
|
26
|
+
pytest-cov~=7.1
|
|
27
|
+
lxml<7.0,>=6.1.3
|
|
28
|
+
|
|
29
|
+
[doc]
|
|
30
|
+
pyTooling.Sphinx[reports]~=1.0
|
|
31
|
+
docutils_stubs~=0.0.22
|
|
32
|
+
pyVHDLModel~=0.40.0
|
|
33
|
+
sphinx~=9.2
|
|
34
|
+
sphinx_design~=0.7.0
|
|
35
|
+
pySVModel~=0.6.0
|
|
36
|
+
pySystemRDLModel~=0.4.0
|
|
37
|
+
sphinx-copybutton>=0.5.2
|
|
38
|
+
sphinx_rtd_theme~=3.1
|
|
39
|
+
sphinxcontrib-mermaid~=2.1
|
|
40
|
+
autoapi>=2.0.1
|
|
41
|
+
sphinx_autodoc_typehints~=3.17
|
|
42
|
+
pyTooling<11.0,>=10.1.1
|
|
43
|
+
|
|
44
|
+
[osvvm]
|
|
45
|
+
pyEDAA.OSVVM~=0.6
|
|
46
|
+
|
|
47
|
+
[test]
|
|
48
|
+
pyVHDLModel~=0.40.0
|
|
49
|
+
typing_extensions~=4.16
|
|
50
|
+
pySVModel~=0.6.0
|
|
51
|
+
pySystemRDLModel~=0.4.0
|
|
52
|
+
pytest~=9.1
|
|
53
|
+
mypy[reports]~=2.4
|
|
54
|
+
pytest-cov~=7.1
|
|
55
|
+
lxml<7.0,>=6.1.3
|
|
56
|
+
Coverage~=7.17
|
|
57
|
+
pytest-xdist~=3.8
|
|
58
|
+
pyTooling<11.0,>=10.1.1
|
|
@@ -1,7 +1,7 @@
|
|
|
1
1
|
[build-system]
|
|
2
2
|
requires = [
|
|
3
|
-
"setuptools >=
|
|
4
|
-
"pyTooling
|
|
3
|
+
"setuptools >= 84.2.1",
|
|
4
|
+
"pyTooling >= 10.1.1, < 11.0"
|
|
5
5
|
]
|
|
6
6
|
build-backend = "setuptools.build_meta"
|
|
7
7
|
|
|
@@ -25,7 +25,7 @@ variable-naming-style = "camelCase"
|
|
|
25
25
|
|
|
26
26
|
[tool.mypy]
|
|
27
27
|
packages = ["pyEDAA.ProjectModel"]
|
|
28
|
-
python_version = "3.
|
|
28
|
+
python_version = "3.15"
|
|
29
29
|
#ignore_missing_imports = true
|
|
30
30
|
strict = true
|
|
31
31
|
pretty = true
|
|
@@ -66,6 +66,7 @@ ignore-setters = true
|
|
|
66
66
|
[tool.coverage.run]
|
|
67
67
|
branch = true
|
|
68
68
|
relative_files = true
|
|
69
|
+
patch = ["subprocess"]
|
|
69
70
|
omit = [
|
|
70
71
|
"*site-packages*",
|
|
71
72
|
"setup.py",
|
|
@@ -11,8 +11,9 @@
|
|
|
11
11
|
# #
|
|
12
12
|
# License: #
|
|
13
13
|
# ==================================================================================================================== #
|
|
14
|
-
# Copyright
|
|
15
|
-
# Copyright
|
|
14
|
+
# Copyright 2021-2026 Electronic Design Automation Abstraction (EDA²) #
|
|
15
|
+
# Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany #
|
|
16
|
+
# Copyright 2014-2016 Technische Universitaet Dresden - Germany, Chair of VLSI-Design, Diagnostics and Architecture #
|
|
16
17
|
# #
|
|
17
18
|
# Licensed under the Apache License, Version 2.0 (the "License"); #
|
|
18
19
|
# you may not use this file except in compliance with the License. #
|
|
@@ -53,7 +54,7 @@ setup(
|
|
|
53
54
|
"Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)"
|
|
54
55
|
],
|
|
55
56
|
developmentStatus="beta",
|
|
56
|
-
pythonVersions=("3.11", "3.12", "3.13", "3.14"),
|
|
57
|
+
pythonVersions=("3.11", "3.12", "3.13", "3.14", "3.15"),
|
|
57
58
|
dataFiles={
|
|
58
59
|
packageName: ["py.typed"]
|
|
59
60
|
}
|
|
@@ -1,56 +0,0 @@
|
|
|
1
|
-
pyTooling~=8.15
|
|
2
|
-
pyVHDLModel~=0.35.0
|
|
3
|
-
pySystemRDLModel~=0.3.0
|
|
4
|
-
pySVModel~=0.5.0
|
|
5
|
-
|
|
6
|
-
[all]
|
|
7
|
-
docutils_stubs~=0.0.22
|
|
8
|
-
sphinx_reports~=0.11.0
|
|
9
|
-
sphinx-copybutton>=0.5.2
|
|
10
|
-
Coverage~=7.14
|
|
11
|
-
pyTooling~=8.15
|
|
12
|
-
sphinx_design~=0.7.0
|
|
13
|
-
pytest~=9.0
|
|
14
|
-
sphinx_autodoc_typehints~=3.10
|
|
15
|
-
autoapi>=2.0.1
|
|
16
|
-
sphinx_rtd_theme~=3.1
|
|
17
|
-
pySystemRDLModel~=0.3.0
|
|
18
|
-
pyEDAA.OSVVM~=0.6
|
|
19
|
-
pytest-cov~=7.1
|
|
20
|
-
sphinx~=9.1
|
|
21
|
-
pySVModel~=0.5.0
|
|
22
|
-
lxml<7.0,>=6.1
|
|
23
|
-
typing_extensions~=4.15
|
|
24
|
-
pyVHDLModel~=0.35.0
|
|
25
|
-
mypy[reports]~=2.1
|
|
26
|
-
sphinxcontrib-mermaid~=2.0
|
|
27
|
-
|
|
28
|
-
[doc]
|
|
29
|
-
pySVModel~=0.5.0
|
|
30
|
-
autoapi>=2.0.1
|
|
31
|
-
sphinx_rtd_theme~=3.1
|
|
32
|
-
docutils_stubs~=0.0.22
|
|
33
|
-
pySystemRDLModel~=0.3.0
|
|
34
|
-
sphinx_reports~=0.11.0
|
|
35
|
-
pyTooling~=8.15
|
|
36
|
-
pyVHDLModel~=0.35.0
|
|
37
|
-
sphinx_design~=0.7.0
|
|
38
|
-
sphinx-copybutton>=0.5.2
|
|
39
|
-
sphinx~=9.1
|
|
40
|
-
sphinx_autodoc_typehints~=3.10
|
|
41
|
-
sphinxcontrib-mermaid~=2.0
|
|
42
|
-
|
|
43
|
-
[osvvm]
|
|
44
|
-
pyEDAA.OSVVM~=0.6
|
|
45
|
-
|
|
46
|
-
[test]
|
|
47
|
-
pySVModel~=0.5.0
|
|
48
|
-
lxml<7.0,>=6.1
|
|
49
|
-
typing_extensions~=4.15
|
|
50
|
-
pySystemRDLModel~=0.3.0
|
|
51
|
-
pyTooling~=8.15
|
|
52
|
-
pyVHDLModel~=0.35.0
|
|
53
|
-
Coverage~=7.14
|
|
54
|
-
pytest-cov~=7.1
|
|
55
|
-
pytest~=9.0
|
|
56
|
-
mypy[reports]~=2.1
|
|
File without changes
|
|
File without changes
|
|
File without changes
|
|
File without changes
|
{pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA.ProjectModel.egg-info/SOURCES.txt
RENAMED
|
File without changes
|
|
File without changes
|
{pyedaa_projectmodel-0.6.3 → pyedaa_projectmodel-0.7.0}/pyEDAA.ProjectModel.egg-info/top_level.txt
RENAMED
|
File without changes
|
|
File without changes
|