peakrdl-python 3.0.0rc2__tar.gz → 3.0.0rc4__tar.gz

{peakrdl_python-3.0.0rc2 → peakrdl_python-3.0.0rc4}/.github/workflows/action.yaml

@@ -339,7 +339,6 @@ jobs:
       matrix:
         python-version: [3.9, "3.10", "3.11", "3.12", "3.13", "3.14"]
         lib_copy: [true, false]
-        hashing_mode: ["PYTHONHASH", "SHA256"]
 
     steps:
     - uses: actions/checkout@v4
@@ -365,12 +364,12 @@ jobs:
     - name: Generate testcases (lib_copy true)
       if: matrix.lib_copy == true
       run: |
-        python generate_testcases.py --copy_libraries --output testcase_output --hashing_mode ${{ matrix.hashing_mode }}
+        python generate_testcases.py --copy_libraries --output testcase_output
 
     - name: Generate testcases (lib_copy false)
       if: matrix.lib_copy == false
       run: |
-        python generate_testcases.py --output testcase_output --hashing_mode ${{ matrix.hashing_mode }}
+        python generate_testcases.py --output testcase_output
 
     - name: Static checks
       run: |

{peakrdl_python-3.0.0rc2 → peakrdl_python-3.0.0rc4}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: peakrdl-python
-Version: 3.0.0rc2
+Version: 3.0.0rc4
 Summary: Generate Python Register Access Layer (RAL) from SystemRDL
 Author: Keith Brady
 License:                     GNU GENERAL PUBLIC LICENSE

{peakrdl_python-3.0.0rc2 → peakrdl_python-3.0.0rc4}/generate_testcases.py

@@ -49,16 +49,6 @@ CommandLineParser.add_argument('--copy_libraries', action='store_true', dest='co
                                     'and debugging as multiple copies of the libraries can cause'
                                     'confusion. Therefore by default this script does not copy '
                                     'them over.')
-CommandLineParser.add_argument('--hashing_mode',
-                               dest='hashing_mode',
-                               type=str,
-                               choices=[item.name for item in NodeHashingMethod],
-                               default='PYTHONHASH',
-                               help='The method used to generate the hash of the node, in order to '
-                                    'deduplicate the register model. Set this to `SHA256` if '
-                                    'the python names need to stay consistent one export to the '
-                                    'next. However, this mode is slower')
-
 
 def compile_rdl(infile: str,
                 incl_search_paths: Optional[List[str]] = None,
@@ -158,19 +148,22 @@ if __name__ == '__main__':
         options = {
             'asyncoutput': [True, False],
             'legacy': [True, False],
-            'skip_systemrdl_name_and_desc_in_docstring': [True, False]
+            'skip_systemrdl_name_and_desc_in_docstring': [True, False],
+            'hashing': list(NodeHashingMethod)
         }
 
-        for asyncoutput, legacy, skip_name_and_desc_in_docstring in product(
+        for asyncoutput, legacy, skip_name_and_desc_in_docstring, hashing_method in product(
                 options['asyncoutput'], options['legacy'],
-                options['skip_systemrdl_name_and_desc_in_docstring'] ):
+                options['skip_systemrdl_name_and_desc_in_docstring'],
+                options['hashing']):
 
             # test cases that use the extended widths an not be tested in the non-legacy modes
             if (testcase_name in ['extended_memories', 'extended_sizes_registers_array']) and \
                     (legacy is True):
                 continue
 
-            folder_parts = 'raw'
+            folder_parts = 'raw_'
+            folder_parts += hashing_method.name
             if asyncoutput:
                 folder_parts += '_async'
             if legacy:
@@ -184,7 +177,7 @@ if __name__ == '__main__':
                          legacy_enum_type=legacy,
                          copy_library=CommandLineArgs.copy_libraries,
                          skip_systemrdl_name_and_desc_in_docstring=skip_name_and_desc_in_docstring,
-                         hashing_mode=NodeHashingMethod[CommandLineArgs.hashing_mode])
+                         hashing_mode=hashing_method)
 
             module_fqfn = output_path / folder_parts / '__init__.py'
             with open(module_fqfn, 'w', encoding='utf-8') as fid:

{peakrdl_python-3.0.0rc2 → peakrdl_python-3.0.0rc4}/src/peakrdl_python/__about__.py

@@ -17,4 +17,4 @@ along with this program.  If not, see <https://www.gnu.org/licenses/>.
 
 Variables that describes the peakrdl-python Package
 """
-__version__ = "3.0.0rc2"
+__version__ = "3.0.0rc4"

{peakrdl_python-3.0.0rc2 → peakrdl_python-3.0.0rc4}/src/peakrdl_python/lib_test/_common_base_test_class.py

@@ -19,7 +19,7 @@ This package is intended to distributed as part of automatically generated code
 Python tool. It provide the base class common to both the async and non-async versions
 """
 import unittest
-from abc import ABC
+from abc import ABC, abstractmethod
 from typing import Union, Optional
 
 from ..lib import FieldReadWrite, FieldReadOnly, FieldWriteOnly
@@ -27,14 +27,23 @@ from ..lib import FieldEnumReadWrite, FieldEnumReadOnly, FieldEnumWriteOnly
 from ..lib import FieldAsyncReadOnly, FieldAsyncWriteOnly, FieldAsyncReadWrite
 from ..lib import FieldEnumAsyncReadOnly, FieldEnumAsyncWriteOnly, FieldEnumAsyncReadWrite
 from ..lib.base_register import BaseReg
+from ..lib import Base
 from .utilities import get_field_bitmask_int, get_field_inv_bitmask
+from ..sim_lib.simulator import BaseSimulator
 
 class CommonTestBase(unittest.TestCase, ABC):
     """
-    Base Test class for the autogenerated register test to be used for for the async and
+    Base Test class for the autogenerated register test to be used for the async and
     non-async cases
     """
 
+    @property
+    @abstractmethod
+    def simulator_instance(self) -> BaseSimulator:
+        """
+        Simulator configured for the DUT
+        """
+
     # pylint:disable-next=too-many-arguments
     def _single_field_property_test(self, *,
                                     fut: Union[FieldReadWrite,
@@ -99,3 +108,20 @@ class CommonTestBase(unittest.TestCase, ABC):
             self.assertEqual(rut.accesswidth, accesswidth)
         else:
             self.assertEqual(rut.accesswidth, width)
+
+    def _single_node_rdl_name_and_desc_test(self,
+                                            dut: Base,
+                                            rdl_name: Optional[str],
+                                            rdl_desc: Optional[str]) -> None:
+        """
+        Check the SystemRDL Name and Desc properties for a node
+        """
+        if rdl_name is None:
+            self.assertIsNone(dut.rdl_name)
+        else:
+            self.assertEqual(dut.rdl_name, rdl_name)
+
+        if rdl_desc is None:
+            self.assertIsNone(dut.rdl_desc)
+        else:
+            self.assertEqual(dut.rdl_desc, rdl_desc)

{peakrdl_python-3.0.0rc2 → peakrdl_python-3.0.0rc4}/src/peakrdl_python/lib_test/async_reg_base_test_class.py

@@ -23,9 +23,9 @@ Python tool. It provide the base class for the autogenerated tests
 # pylint:disable=duplicate-code
 
 import unittest
-from abc import ABC
+from abc import ABC, abstractmethod
 from typing import Union
-from unittest.mock import patch
+from unittest.mock import patch, Mock
 from itertools import product, chain, combinations
 from collections.abc import Iterable
 
@@ -33,12 +33,14 @@ from ..lib import FieldAsyncReadOnly, FieldAsyncWriteOnly, FieldAsyncReadWrite
 from ..lib import FieldEnumAsyncReadOnly, FieldEnumAsyncWriteOnly, FieldEnumAsyncReadWrite
 from ..lib import RegAsyncReadOnly, RegAsyncReadWrite, RegAsyncWriteOnly
 from ..lib import RegisterWriteVerifyError
-from ..sim_lib.dummy_callbacks import async_dummy_read
-from ..sim_lib.dummy_callbacks import async_dummy_write
+from ..sim_lib.register import Register as SimRegister
+from ..sim_lib.register import MemoryRegister as SimMemoryRegister
+from ..sim_lib.register import Field as SimField
 
 from .utilities import reverse_bits, expected_reg_write_data
 from .utilities import reg_value_for_field_read_with_random_base
 from .utilities import random_int_field_value, random_field_parent_reg_value
+from .utilities import random_encoded_field_value,reg_value_for_field_read
 from .utilities import random_reg_value, RandomReg
 from .utilities import RegWriteTestSequence,RegWriteZeroStartTestSequence
 
@@ -59,10 +61,9 @@ class AsyncLibTestBase(unittest.IsolatedAsyncioTestCase, CommonTestBase, ABC):
                                         width=width,
                                         accesswidth=accesswidth)
 
+    @abstractmethod
     async def read_callback(self, addr: int, width: int, accesswidth: int) -> int:
-        return await  async_dummy_read(addr=addr,
-                                       width=width,
-                                       accesswidth=accesswidth)
+        ...
 
     async def outer_write_callback(self, addr: int,
                                    width: int, accesswidth: int,
@@ -72,11 +73,9 @@ class AsyncLibTestBase(unittest.IsolatedAsyncioTestCase, CommonTestBase, ABC):
                                          accesswidth=accesswidth,
                                          data=data)
 
+    @abstractmethod
     async def write_callback(self, addr: int, width: int, accesswidth: int, data: int) -> None:
-        return await  async_dummy_write(addr=addr,
-                                        width=width,
-                                        accesswidth=accesswidth,
-                                        data=data)
+        ...
 
     # pylint:enable=missing-function-docstring
 
@@ -91,6 +90,10 @@ class AsyncLibTestBase(unittest.IsolatedAsyncioTestCase, CommonTestBase, ABC):
         # `test_field_properties` so do no need to checked here. Similarly, the properties of
         # parent register are checked as part of `test_register_properties`
 
+        await self.__single_int_field_simulator_read_and_write_test(fut=fut,
+                                                                    is_sw_readable=is_sw_readable,
+                                                                    is_sw_writable=is_sw_writable)
+
         if is_sw_readable:
             if not isinstance(fut, (FieldAsyncReadOnly, FieldAsyncReadWrite)):
                 raise TypeError('Test can not proceed as the fut is not a readable field')
@@ -298,27 +301,35 @@ class AsyncLibTestBase(unittest.IsolatedAsyncioTestCase, CommonTestBase, ABC):
         # `test_field_properties` so do not need to checked here. Similarly, the properties of
         # parent register are checked as part of `test_register_properties`
 
+        await self.__single_enum_field_simulator_read_and_write_test(fut=fut,
+                                                                     is_sw_readable=is_sw_readable,
+                                                                     is_sw_writable=is_sw_writable)
+
         if is_sw_readable:
             if not isinstance(fut, (FieldEnumAsyncReadOnly, FieldEnumAsyncReadWrite)):
                 raise TypeError('Test can not proceed as the fut is not a readable field')
             await self.__single_enum_field_read_test(fut=fut,
-                                               enum_definition=enum_definition)
+                                                     enum_definition=enum_definition)
 
         if is_sw_writable:
             if not isinstance(fut, (FieldEnumAsyncWriteOnly, FieldEnumAsyncReadWrite)):
                 raise TypeError('Test can not proceed as the fut is not a writable field')
             await self.__single_enum_field_write_test(fut=fut,
-                                                enum_definition=enum_definition)
+                                                      enum_definition=enum_definition)
 
-    async def _single_register_read_and_write_test(self,
-                                             rut: Union[RegAsyncReadOnly,
-                                                        RegAsyncReadWrite,
-                                                        RegAsyncWriteOnly],
-                                             has_sw_readable: bool,
-                                             has_sw_writable: bool) -> None:
+    async def _single_register_read_and_write_test(
+            self,
+            rut: Union[RegAsyncReadOnly, RegAsyncReadWrite, RegAsyncWriteOnly],
+            has_sw_readable: bool,
+            has_sw_writable: bool) -> None:
 
         # the register properties are tested separately so are available to be used here
 
+        await self.__single_register_simulator_read_and_write_test(
+            rut=rut,
+            has_sw_readable=has_sw_readable,
+            has_sw_writable=has_sw_writable)
+
         if has_sw_readable:
             if not isinstance(rut, (RegAsyncReadOnly, RegAsyncReadWrite)):
                 raise TypeError('Test can not proceed as the rut is not a readable register')
@@ -517,3 +528,364 @@ class AsyncLibTestBase(unittest.IsolatedAsyncioTestCase, CommonTestBase, ABC):
             read_callback_mock.assert_not_called()
             write_callback_mock.reset_mock()
             read_callback_mock.reset_mock()
+
+    async def __single_register_simulator_read_and_write_test(
+            self,
+            rut: Union[RegAsyncReadOnly,RegAsyncReadWrite,RegAsyncWriteOnly],
+            has_sw_readable: bool,
+            has_sw_writable: bool) -> None:
+
+        sim_register = self.simulator_instance.register_by_full_name(rut.full_inst_name)
+
+        self.assertIsInstance(sim_register, (SimRegister, SimMemoryRegister))
+        register_read_callback = Mock()
+        register_write_callback = Mock()
+
+        if has_sw_readable:
+            if not isinstance(rut, (RegAsyncReadOnly, RegAsyncReadWrite)):
+                raise TypeError('Test can not proceed as the rut is not a readable register')
+            # register read checks
+            # update the value via the backdoor in the simulator
+            random_value = random_reg_value(rut)
+            sim_register.value = random_value
+            self.assertEqual(await rut.read(), random_value)
+            # up to now the callback should not have been called
+            sim_register.read_callback = register_read_callback
+            sim_register.write_callback = register_write_callback
+            random_value = random_reg_value(rut)
+            sim_register.value = random_value
+            self.assertEqual(await rut.read(), random_value)
+            register_write_callback.assert_not_called()
+            register_read_callback.assert_called_once_with(value=random_value)
+            register_write_callback.reset_mock()
+            register_read_callback.reset_mock()
+            sim_register.value = random_value
+            sim_register.read_callback = None
+            sim_register.write_callback = None
+            self.assertEqual(await rut.read(), random_value)
+            register_write_callback.assert_not_called()
+            register_read_callback.assert_not_called()
+
+        if has_sw_writable:
+            if not isinstance(rut, (RegAsyncWriteOnly, RegAsyncReadWrite)):
+                raise TypeError('Test can not proceed as the rut is not a writable register')
+            # register write checks
+            random_value = random_reg_value(rut)
+            await rut.write(random_value)
+            self.assertEqual(sim_register.value, random_value)
+            # up to now the callback should not have been called
+            sim_register.read_callback = register_read_callback
+            sim_register.write_callback = register_write_callback
+            random_value = random_reg_value(rut)
+            await rut.write(random_value)
+            self.assertEqual(sim_register.value, random_value)
+            register_write_callback.assert_called_once_with(value=random_value)
+            register_read_callback.assert_not_called()
+            register_write_callback.reset_mock()
+            register_read_callback.reset_mock()
+            sim_register.read_callback = None
+            sim_register.write_callback = None
+            random_value = random_reg_value(rut)
+            await rut.write(random_value)
+            self.assertEqual(sim_register.value, random_value)
+            if has_sw_readable:
+                if not isinstance(rut, RegAsyncReadWrite):
+                    raise TypeError('Test can not proceed as the rut is not a read '
+                                    'and writable register')
+                self.assertEqual(await rut.read(), random_value)
+
+    async def __single_int_field_simulator_read_and_write_test(
+            self,
+            fut: Union[FieldAsyncReadOnly, FieldAsyncWriteOnly, FieldAsyncReadWrite],
+            is_sw_readable: bool,
+            is_sw_writable: bool) -> None:
+        #pylint:disable=too-many-statements
+
+        sim_register = self.simulator_instance.register_by_full_name(
+            fut.parent_register.full_inst_name)
+        self.assertIsInstance(sim_register, (SimRegister, SimMemoryRegister))
+        sim_field = self.simulator_instance.field_by_full_name(fut.full_inst_name)
+        self.assertIsInstance(sim_field, SimField)
+        register_read_callback = Mock()
+        register_write_callback = Mock()
+        field_read_callback = Mock()
+        field_write_callback = Mock()
+
+        # pylint:disable-next=protected-access
+        readable_reg = fut.parent_register._is_readable
+
+        if is_sw_readable:
+            # register read checks
+            # update the register value via the backdoor in the simulator
+            if not isinstance(fut, (FieldAsyncReadOnly, FieldAsyncReadWrite)):
+                raise TypeError('Test can not proceed as the fut is not a readable field')
+
+            random_field_value = random_int_field_value(fut)
+            random_value = reg_value_for_field_read_with_random_base(
+                fut=fut,
+                field_value=random_field_value)
+            sim_register.value = random_value
+            self.assertEqual(await fut.read(), random_field_value)
+            # update the field value via the backdoor in the simulator
+            previous_register_value = random_value
+
+            random_field_value = random_int_field_value(fut)
+            sim_field.value = random_field_value
+            random_value = reg_value_for_field_read(
+                fut=fut,
+                reg_base_value=previous_register_value,
+                field_value=random_field_value)
+            self.assertEqual(sim_register.value, random_value)
+            self.assertEqual(await fut.read(), random_field_value)
+            # hook up the callbacks to check they work correctly
+            random_field_value = random_int_field_value(fut)
+            random_value = reg_value_for_field_read_with_random_base(
+                fut=fut,
+                field_value=random_field_value)
+            sim_register.value = random_value
+            sim_register.read_callback = register_read_callback
+            sim_register.write_callback = register_write_callback
+            sim_field.read_callback = field_read_callback
+            sim_field.write_callback = field_write_callback
+            self.assertEqual(await fut.read(), random_field_value)
+            register_write_callback.assert_not_called()
+            register_read_callback.assert_called_once_with(value=random_value)
+            field_write_callback.assert_not_called()
+            field_read_callback.assert_called_once_with(value=random_field_value)
+            # revert the callbacks and check again
+            register_write_callback.reset_mock()
+            register_read_callback.reset_mock()
+            field_write_callback.reset_mock()
+            field_read_callback.reset_mock()
+            sim_register.read_callback = None
+            sim_register.write_callback = None
+            sim_field.read_callback = None
+            sim_field.write_callback = None
+            #random_field_value = random_int_field_value(fut)
+            random_value = reg_value_for_field_read_with_random_base(
+                fut=fut,
+                field_value=random_field_value)
+            sim_register.value = random_value
+            self.assertEqual(await fut.read(), random_field_value)
+            register_write_callback.assert_not_called()
+            register_read_callback.assert_not_called()
+            field_write_callback.assert_not_called()
+            field_read_callback.assert_not_called()
+
+        if is_sw_writable:
+            # register write checks
+            # update the register value via the backdoor in the simulator, then perform a field
+            # write and make sure it is updated
+
+            if not isinstance(fut, (FieldAsyncWriteOnly, FieldAsyncReadWrite)):
+                raise TypeError('Test can not proceed as the fut is not a writable field')
+
+            if readable_reg:
+                initial_reg_random_value = random_field_parent_reg_value(fut)
+                sim_register.value = initial_reg_random_value
+            else:
+                # if the register is not readable the write assumes the rest of the register is 0
+                initial_reg_random_value = 0
+
+            random_field_value = random_int_field_value(fut)
+            sim_field.value = random_field_value
+            random_value = reg_value_for_field_read(
+                fut=fut,
+                reg_base_value=initial_reg_random_value,
+                field_value=random_field_value)
+            await fut.write(random_field_value)
+            self.assertEqual(sim_register.value, random_value)
+
+            register_write_callback.assert_not_called()
+            register_read_callback.assert_not_called()
+            field_write_callback.assert_not_called()
+            field_read_callback.assert_not_called()
+            # hook up the call backs
+            sim_register.read_callback = None
+            sim_register.write_callback = register_write_callback
+            sim_field.read_callback = None
+            sim_field.write_callback = field_write_callback
+            random_field_value = random_int_field_value(fut)
+            await fut.write(random_field_value)
+            random_value = reg_value_for_field_read(
+                fut=fut,
+                reg_base_value=initial_reg_random_value,
+                field_value=random_field_value)
+            self.assertEqual(sim_register.value, random_value)
+            register_write_callback.assert_called_once_with(
+                value=random_value)
+            field_write_callback.assert_called_once_with(
+                value=random_field_value)
+            register_read_callback.assert_not_called()
+            field_read_callback.assert_not_called()
+            # revert the callbacks and check again
+            register_write_callback.reset_mock()
+            register_read_callback.reset_mock()
+            field_write_callback.reset_mock()
+            field_read_callback.reset_mock()
+            sim_register.write_callback = None
+            sim_field.write_callback = None
+            random_field_value = random_int_field_value(fut)
+            await fut.write(random_field_value)
+            random_value = reg_value_for_field_read(
+                fut=fut,
+                reg_base_value=initial_reg_random_value,
+                field_value=random_field_value)
+            self.assertEqual(sim_register.value, random_value)
+            register_write_callback.assert_not_called()
+            register_read_callback.assert_not_called()
+            field_write_callback.assert_not_called()
+            field_read_callback.assert_not_called()
+
+    async def __single_enum_field_simulator_read_and_write_test(
+            self,
+            fut: Union[FieldEnumAsyncReadOnly, FieldEnumAsyncWriteOnly, FieldEnumAsyncReadWrite],
+            is_sw_readable: bool,
+            is_sw_writable: bool) -> None:
+        # pylint:disable=too-many-statements
+
+        sim_register = self.simulator_instance.register_by_full_name(
+            fut.parent_register.full_inst_name)
+        self.assertIsInstance(sim_register, (SimRegister, SimMemoryRegister))
+        sim_field = self.simulator_instance.field_by_full_name(fut.full_inst_name)
+        self.assertIsInstance(sim_field, SimField)
+        register_read_callback = Mock()
+        register_write_callback = Mock()
+        field_read_callback = Mock()
+        field_write_callback = Mock()
+
+        # pylint:disable-next=protected-access
+        readable_reg = fut.parent_register._is_readable
+
+        if is_sw_readable:
+            # register read checks
+            # update the register value via the backdoor in the simulator
+
+            if not isinstance(fut, (FieldEnumAsyncReadOnly, FieldEnumAsyncReadWrite)):
+                raise TypeError('Test can not proceed as the fut is not a readable field')
+
+            random_field_value = random_encoded_field_value(fut)
+            random_value = reg_value_for_field_read_with_random_base(
+                fut=fut,
+                field_value=random_field_value.value)
+
+            sim_register.value = random_value
+            self.assertEqual(await fut.read(), random_field_value)
+            # update the field value via the backdoor in the simulator
+            previous_register_value = random_value
+            random_field_value = random_encoded_field_value(fut)
+            sim_field.value = random_field_value.value
+            random_value = reg_value_for_field_read(
+                fut=fut,
+                reg_base_value=previous_register_value,
+                field_value=random_field_value.value)
+            self.assertEqual(sim_register.value, random_value)
+            self.assertEqual(await fut.read(), random_field_value)
+
+
+            # hook up the callbacks to check they work correctly
+            random_field_value = random_encoded_field_value(fut)
+            random_value = reg_value_for_field_read_with_random_base(
+                fut=fut,
+                field_value=random_field_value.value)
+
+            sim_register.value = random_value
+            sim_register.read_callback = register_read_callback
+            sim_register.write_callback = register_write_callback
+            sim_field.read_callback = field_read_callback
+            sim_field.write_callback = field_write_callback
+            self.assertEqual(await fut.read(), random_field_value)
+            register_write_callback.assert_not_called()
+            register_read_callback.assert_called_once_with(value=random_value)
+            field_write_callback.assert_not_called()
+            field_read_callback.assert_called_once_with(value=random_field_value.value)
+
+            # revert the callbacks and check again
+            register_write_callback.reset_mock()
+            register_read_callback.reset_mock()
+            field_write_callback.reset_mock()
+            field_read_callback.reset_mock()
+            sim_register.read_callback = None
+            sim_register.write_callback = None
+            sim_field.read_callback = None
+            sim_field.write_callback = None
+            random_field_value = random_encoded_field_value(fut)
+            random_value = reg_value_for_field_read_with_random_base(
+                fut=fut,
+                field_value=random_field_value.value)
+
+            sim_register.value = random_value
+            self.assertEqual(await fut.read(), random_field_value)
+            register_write_callback.assert_not_called()
+            register_read_callback.assert_not_called()
+            field_write_callback.assert_not_called()
+            field_read_callback.assert_not_called()
+
+
+        if is_sw_writable:
+            # register write checks
+            # update the register value via the backdoor in the simulator, then perform a field
+            # write and make sure it is updated
+
+            if not isinstance(fut, (FieldEnumAsyncWriteOnly, FieldEnumAsyncReadWrite)):
+                raise TypeError('Test can not proceed as the fut is not a writable field')
+
+            if readable_reg:
+                initial_reg_random_value = random_field_parent_reg_value(fut)
+                sim_register.value = initial_reg_random_value
+            else:
+                # if the register is not readable the write assumes the rest of the register is 0
+                initial_reg_random_value = 0
+
+
+            random_field_value = random_encoded_field_value(fut)
+            sim_field.value = random_field_value.value
+            random_value = reg_value_for_field_read(
+                fut=fut,
+                reg_base_value=initial_reg_random_value,
+                field_value=random_field_value.value)
+            await fut.write(random_field_value)
+
+
+            self.assertEqual(sim_register.value, random_value)
+
+            register_write_callback.assert_not_called()
+            register_read_callback.assert_not_called()
+            field_write_callback.assert_not_called()
+            field_read_callback.assert_not_called()
+            # hook up the call backs
+            sim_register.read_callback = None
+            sim_register.write_callback = register_write_callback
+            sim_field.read_callback = None
+            sim_field.write_callback = field_write_callback
+            random_field_value = random_encoded_field_value(fut)
+            await fut.write(random_field_value)
+            random_value = reg_value_for_field_read(
+                fut=fut,
+                reg_base_value=initial_reg_random_value,
+                field_value=random_field_value.value)
+            self.assertEqual(sim_register.value, random_value)
+            register_write_callback.assert_called_once_with(
+                value=random_value)
+            field_write_callback.assert_called_once_with(
+                value=random_field_value.value)
+            register_read_callback.assert_not_called()
+            field_read_callback.assert_not_called()
+            # revert the callbacks and check again
+            register_write_callback.reset_mock()
+            register_read_callback.reset_mock()
+            field_write_callback.reset_mock()
+            field_read_callback.reset_mock()
+            sim_register.write_callback = None
+            sim_field.write_callback = None
+            random_field_value = random_encoded_field_value(fut)
+            await fut.write(random_field_value)
+            random_value = reg_value_for_field_read(
+                fut=fut,
+                reg_base_value=initial_reg_random_value,
+                field_value=random_field_value.value)
+            self.assertEqual(sim_register.value, random_value)
+            register_write_callback.assert_not_called()
+            register_read_callback.assert_not_called()
+            field_write_callback.assert_not_called()
+            field_read_callback.assert_not_called()