peakrdl-python 1.2.1rc3__tar.gz → 1.2.1rc4__tar.gz

{peakrdl_python-1.2.1rc3 → peakrdl_python-1.2.1rc4}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: peakrdl-python
-Version: 1.2.1rc3
+Version: 1.2.1rc4
 Summary: Generate Python Register Access Layer (RAL) from SystemRDL
 Author: Keith Brady
 License:                     GNU GENERAL PUBLIC LICENSE

{peakrdl_python-1.2.1rc3 → peakrdl_python-1.2.1rc4}/src/peakrdl_python/__about__.py

@@ -17,4 +17,4 @@ along with this program.  If not, see <https://www.gnu.org/licenses/>.
 
 Variables that describes the peakrdl-python Package
 """
-__version__ = "1.2.1rc3"
+__version__ = "1.2.1rc4"

{peakrdl_python-1.2.1rc3 → peakrdl_python-1.2.1rc4}/src/peakrdl_python/templates/addrmap_tb.py.jinja

@@ -459,7 +459,7 @@ class {{fq_block_name}}_single_access({{top_node.inst_name}}_TestCase): # type:
 
                         {% if asyncoutput %}await {%endif %}self.dut.{{'.'.join(get_python_path_segments(node))}}.write(field_value) # type: ignore[union-attr]
 
-                        {% if (((node.high+1) - node.low) < (node.parent.size*8)) and (node.parent.has_sw_readable) %}
+                        {% if (node.width < (node.parent.size*8)) and (node.parent.has_sw_readable) %}
                         read_callback_mock.assert_called_once_with(
                                     addr={{node.parent.absolute_address}},
                                     width={{node.parent.size * 8}},
@@ -548,14 +548,17 @@ class {{fq_block_name}}_single_access({{top_node.inst_name}}_TestCase): # type:
                                     accesswidth=self.dut.{{'.'.join(get_python_path_segments(node))}}.parent_register.accesswidth) # type: ignore[union-attr]
                 {% endfor %}
 
-                {% if node.get_property('encode').__len__() < (2**((node.high+1) - node.low)) %}
-                # check that other values of the field int
-                # that don't appear in the enum generate an
-                # error
-                for field_value in range(0, {{get_field_max_value_hex_string(node)}}+1):
-                    if field_value in [{%- for value_of_enum_needed in node.get_property('encode') -%}{{value_of_enum_needed.value}}{% if not loop.last %}, {% endif %}{%- endfor %}]:
-                        # legal int value of the eunm so no test is needed
-                        continue
+                {# only run this if there are field values that are not part of the enum #}
+                {% if node.get_property('encode').__len__() < (2**node.width) %}
+                # check that other values of the field int that don't appear in the enum generate
+                # an error
+                    {% if node.width <= 8 %}
+                    {# for enumerated fields of up to 8 bit all combinations can be exhaustively tested #}
+                for field_value in set(range({{get_field_max_value_hex_string(node)}}+1)) - { {%- for value_of_enum_needed in node.get_property('encode') -%}{{value_of_enum_needed.value}}{% if not loop.last %}, {% endif %}{%- endfor %} }:
+                    {% else %}
+                    {# for enumerated fields of with larger sizes look for up to 100 illegal values #}
+                for field_value in { random.randint(0, {{get_field_max_value_hex_string(node)}}+1) for _ in range(100)  } - { {%- for value_of_enum_needed in node.get_property('encode') -%}{{value_of_enum_needed.value}}{% if not loop.last %}, {% endif %}{%- endfor %} }:
+                    {% endif %}
                     with self.assertRaises(ValueError):
                         read_callback_mock.reset_mock()
                         random_reg_value = random.randrange(0, {{get_reg_max_value_hex_string(node.parent)}} + 1)

{peakrdl_python-1.2.1rc3 → peakrdl_python-1.2.1rc4}/src/peakrdl_python.egg-info/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: peakrdl-python
-Version: 1.2.1rc3
+Version: 1.2.1rc4
 Summary: Generate Python Register Access Layer (RAL) from SystemRDL
 Author: Keith Brady
 License:                     GNU GENERAL PUBLIC LICENSE

{peakrdl_python-1.2.1rc3 → peakrdl_python-1.2.1rc4}/src/peakrdl_python.egg-info/SOURCES.txt

@@ -143,6 +143,7 @@ tests/testcases/simple.xml
 tests/testcases/simulator_test.rdl
 tests/testcases/sizes_registers.rdl
 tests/testcases/sizes_registers_array.rdl
+tests/testcases/sparse_enum_issue_200.rdl
 tests/testcases/user_defined_properties.rdl
 tests/testcases/write_only_enum_with_undefined_reset.rdl
 tests/unit_tests/__init__.py

peakrdl_python-1.2.1rc4/tests/testcases/sparse_enum_issue_200.rdl

@@ -0,0 +1,51 @@
+/*
+Testcase for a spare enumeration that caused an issue for excessive test times
+*/
+
+enum block_validity {
+			erased = 0xFFFF_FFFF { name = "Erased"; };
+			invalid = 0x0 { name = "Invalid"; };
+			valid = 0xDEAD_BEEF { name = "Valid"; };
+		};
+
+enum block_validity_short {
+			erased = 0x7F { name = "Erased"; };
+			invalid = 0x0 { name = "Invalid"; };
+			valid = 0x5A { name = "Valid"; };
+		};
+
+enum block_validity_very_short {
+			erased = 0x7 { name = "Erased"; };
+			invalid = 0x0 { name = "Invalid"; };
+			valid = 0x5 { name = "Valid"; };
+		};
+
+addrmap sparse_enum_issue_200 {
+
+	reg {
+	    default sw = rw;
+	    regwidth = 128;
+	    field { encode = block_validity; sw=rw; fieldwidth=32; } valid_rw;
+	    field { encode = block_validity; sw=r; fieldwidth=32; } valid_r;
+	    field { encode = block_validity; sw=w; fieldwidth=32; } valid_w;
+	    field { encode = block_validity_short; sw=rw; fieldwidth=7; } valid_short_rw;
+	    field { encode = block_validity_short; sw=r; fieldwidth=7; } valid_short_r;
+	    field { encode = block_validity_short; sw=w; fieldwidth=7; } valid_short_w;
+	    field { encode = block_validity_very_short; sw=rw; fieldwidth=3; } valid_very_short_rw;
+	    field { encode = block_validity_very_short; sw=r; fieldwidth=3; } valid_very_short_r;
+	    field { encode = block_validity_very_short; sw=w; fieldwidth=3; } valid_very_short_w;
+	} block_valid_rw;
+
+	reg {
+	    default sw = r;
+	    regwidth = 128;
+	    field { encode = block_validity; sw=r; fieldwidth=32; } valid_r;
+	} block_valid_r;
+
+	reg {
+	    default sw = w;
+	    regwidth = 128;
+	    field { encode = block_validity; sw=w; fieldwidth=32; } valid_w;
+	} block_valid_w;
+
+};