peakrdl-python 0.8.0__tar.gz → 0.9.0__tar.gz

{peakrdl_python-0.8.0 → peakrdl_python-0.9.0}/.github/workflows/action.yaml

@@ -8,7 +8,8 @@ on:
   push:
     branches: [ main ]
   pull_request:
-    branches: [ main ]
+    branches:
+    - main
   schedule:
     - cron: '00 6 1 * *'
   release:
@@ -35,10 +36,16 @@ jobs:
           python -m pip install .
           python -m pip install -U pylint
 
-      - name: Run Lint
-        #run: pylint --rcfile tests/pylint.rc src/peakrdl_python tests/unit_tests
+      - name: Run Main code Lint
         run: pylint --rcfile tests/pylint.rc src/peakrdl_python
 
+      - name: Install dependencies for unit tests
+        run: |
+          python -m pip install .[unit_test] -U
+
+      - name: Run unit tests Lint
+        run: pylint --rcfile tests/pylint.rc src/peakrdl_python tests/unit_tests
+
   mypy:
     runs-on: ubuntu-latest
     steps:
@@ -77,7 +84,9 @@ jobs:
       - name: Install dependencies
         run: |
           python -m pip install --upgrade pip
-          python -m pip install .
+          # the unit tests need the development version of installer as tomllib may be needed
+          # for older versions of python
+          python -m pip install .[unit_test]
 
       - name: Run Unit Tests
         run: |
@@ -124,6 +133,14 @@ jobs:
 
           python -m generate_and_test --RDL_source_file tests/testcases/accelera-generic_example.rdl --root_node some_register_map
 
+          python -m generate_and_test --RDL_source_file tests/testcases/user_defined_properties.rdl --root_node user_defined_properties --udp bool_property_to_include
+          python -m generate_and_test --RDL_source_file tests/testcases/user_defined_properties.rdl --root_node user_defined_properties --udp bool_property_to_include enum_property_to_include
+          python -m generate_and_test --RDL_source_file tests/testcases/user_defined_properties.rdl --root_node user_defined_properties --udp bool_property_to_include enum_property_to_include int_property_to_include
+          python -m generate_and_test --RDL_source_file tests/testcases/user_defined_properties.rdl --root_node user_defined_properties --udp bool_property_to_include enum_property_to_include int_property_to_include str_property_to_include
+          python -m generate_and_test --RDL_source_file tests/testcases/user_defined_properties.rdl --root_node user_defined_properties --udp bool_property_to_include enum_property_to_include int_property_to_include str_property_to_include struct_property_to_include double_layer_struct_property_to_include
+
+          python -m generate_and_test --RDL_source_file tests/testcases/reserved_elements.rdl --root_node reserved_elements --hide_regex "(?:[\w_\[\]]+\.)+RSVD"
+
   peakrdl_integration:
     needs:
       - mypy
@@ -152,13 +169,32 @@ jobs:
         run: |
 
           peakrdl python tests/testcases/basic.rdl -o peakrdl_out/raw/
+          peakrdl python tests/testcases/hidden_property.rdl -o peakrdl_out/raw/
+          peakrdl python tests/testcases/hidden_property.rdl -o peakrdl_out/raw/show_hidden/ --show_hidden
           peakrdl python tests/testcases/simple.xml tests/testcases/multifile.rdl -o peakrdl_out/raw
+          peakrdl python tests/testcases/extended_memories.rdl -o peakrdl_out/raw/
+          peakrdl python tests/testcases/user_defined_properties.rdl -o peakrdl_out/raw/ --udp bool_property_to_include
+          peakrdl python tests/testcases/reserved_elements.rdl -o peakrdl_out/raw/ --hide_regex "(?:[\w_\[\]]+\.)+RSVD"
           python -m unittest discover -s peakrdl_out/raw
+
           peakrdl python tests/testcases/basic.rdl -o peakrdl_out/raw_async/ --async
+          peakrdl python tests/testcases/hidden_property.rdl -o peakrdl_out/raw_async/ --async
+          peakrdl python tests/testcases/hidden_property.rdl -o peakrdl_out/raw_async/show_hidden/ --show_hidden --async
           python -m unittest discover -s peakrdl_out/raw_async
+          peakrdl python tests/testcases/basic.rdl -o peakrdl_out/raw_legacy/ --legacy_block_access
+          python -m unittest discover -s peakrdl_out/raw_legacy
 
           peakrdl python tests/testcases/basic.rdl -o peakrdl_out/no_test/ --skip_test_case_generation
 
+          # test a TOMl file that passes in overridden templates
+          peakrdl python tests/testcases/basic.rdl -o peakrdl_out/simple_user_template/ --peakrdl-cfg tests/alternative_templates_toml/peakrdl.toml
+          python tests/alternative_templates_toml/header_check.py --generated_package_location peakrdl_out/simple_user_template/ --top_name basic
+          peakrdl python tests/testcases/basic.rdl -o peakrdl_out/dynamic_user_template/ --peakrdl-cfg tests/alternative_templates_dynamic_toml/peakrdl.toml
+          python tests/alternative_templates_dynamic_toml/header_check.py --generated_package_location peakrdl_out/dynamic_user_template/ --top_name basic
+
+
+
+
       - name: Check Examples
         run: |
 
@@ -248,17 +284,58 @@ jobs:
 
         python -m unittest discover -s testcase_output
 
-    - name: Test Autoformating
+  autoformating:
+    needs:
+      - integration_tests
+
+    runs-on: ubuntu-latest
+    strategy:
+      matrix:
+        # reduced matrix because the autoformatter was having issues with python 3.8 so we will
+        # limit this to modern versions of python only
+        python-version: [3.8, 3.9, "3.10", "3.11", "3.12"]
+
+    steps:
+    - uses: actions/checkout@v4
+
+    - name: Set up Python ${{ matrix.python-version }}
+      uses: actions/setup-python@v5
+      with:
+        python-version: ${{ matrix.python-version }}
+
+    - name: Install dependencies
       run: |
+        python -m pip install --upgrade pip
+        python -m pip install .
+        python -m pip install mypy
+        # one of the test cases uses IPxact so we need the importer
+        python -m pip install peakrdl-ipxact
+        # black is the autoformatter used for this this testing
         python -m pip install black
-        cp testcase_output autoformatted_testcase_output -r
-        black autoformatted_testcase_output --line-length 120
-        python -m unittest discover -s autoformatted_testcase_output
+
+        # retrieve the example code from the systemRDL compiler
+        wget -L https://raw.githubusercontent.com/SystemRDL/systemrdl-compiler/main/examples/accelera-generic_example.rdl -O tests/testcases/accelera-generic_example.rdl
+
+    - name: Generate testcases
+      run: |
+        # black will ignore files in the .gitingore by default, so we need to ensure that the
+        # content is generated with a different name
+        python generate_testcases.py --output autoformatted_output --test_case accelera-generic_example.rdl
+        # no need to check them as they are tested in the previous test
+
+    - name: Test Autoformating
+      run: |
+        # run the autoformatting
+        black autoformatted_output --line-length 120
+        # check the files are correct with mypy and unittesting
+        mypy autoformatted_output --config-file=tests/.mypy.ini
+        python -m unittest discover -s autoformatted_output
 
   #-------------------------------------------------------------------------------
   build:
     needs:
       - integration_tests
+      - autoformating
       - dev_runner
       - peakrdl_integration
     name: Build source distribution

{peakrdl_python-0.8.0 → peakrdl_python-0.9.0}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.1
 Name: peakrdl-python
-Version: 0.8.0
+Version: 0.9.0
 Summary: Generate Python Register Access Layer (RAL) from SystemRDL
 Author: Keith Brady
 License:                     GNU GENERAL PUBLIC LICENSE
@@ -700,7 +700,7 @@ Classifier: Topic :: Scientific/Engineering :: Electronic Design Automation (EDA
 Requires-Python: >=3.7
 Description-Content-Type: text/markdown
 License-File: LICENSE
-Requires-Dist: systemrdl-compiler>=1.24.0
+Requires-Dist: systemrdl-compiler>=1.25.0
 Requires-Dist: jinja2
 Requires-Dist: asynctest; python_version < "3.8"
 Requires-Dist: typing-extensions; python_version < "3.11"
@@ -711,6 +711,9 @@ Requires-Dist: coverage; extra == "dev"
 Requires-Dist: peakrdl-ipxact; extra == "dev"
 Provides-Extra: peakrdl
 Requires-Dist: peakrdl; extra == "peakrdl"
+Provides-Extra: unit-test
+Requires-Dist: peakrdl; extra == "unit-test"
+Requires-Dist: tomli; python_version < "3.11" and extra == "unit-test"
 
 ![CI](https://github.com/krcb197/PeakRDL-python/actions/workflows/action.yaml/badge.svg)
 [![PyPI - Python Version](https://img.shields.io/pypi/pyversions/peakrdl-python.svg)](https://pypi.org/project/peakrdl-python)
@@ -723,4 +726,15 @@ Generate Python Register Access Layer (RAL) from SystemRDL
 ## Documentation
 See the [peakrdl-python Documentation](https://peakrdl-python.readthedocs.io/) for more details
 
+## Upgrading from pre 0.9.0
+
+In order to address a major limitation of peakrdl-python that prevented it from implementing the
+full systemRDL specification, a breaking API change was needed for handling blocks:
+* registers (in register array)
+* memory entries in a memory
+
+Users are encouraged to upgrade in order to avoid this limitation. However, there is a legacy mode
+to support users with existing designs, see: _Legacy Block Callback and Block Access_ in the 
+documentation
+
 

{peakrdl_python-0.8.0 → peakrdl_python-0.9.0}/README.md

@@ -9,4 +9,15 @@ Generate Python Register Access Layer (RAL) from SystemRDL
 ## Documentation
 See the [peakrdl-python Documentation](https://peakrdl-python.readthedocs.io/) for more details
 
+## Upgrading from pre 0.9.0
+
+In order to address a major limitation of peakrdl-python that prevented it from implementing the
+full systemRDL specification, a breaking API change was needed for handling blocks:
+* registers (in register array)
+* memory entries in a memory
+
+Users are encouraged to upgrade in order to avoid this limitation. However, there is a legacy mode
+to support users with existing designs, see: _Legacy Block Callback and Block Access_ in the 
+documentation
+
 

{peakrdl_python-0.8.0 → peakrdl_python-0.9.0}/docs/api.rst

@@ -18,13 +18,15 @@ Example
 The following example shows the compiling an SystemRDL file and then generating
 the python register access layer using PeakRDL Python.
 
+
+
 .. code-block:: python
 
-    from systemrdl import RDLCompiler
+    from peakrdl_python import compiler_with_udp_registers
     from peakrdl_python.exporter import PythonExporter
 
     # compile the systemRDL
-    rdlc = RDLCompiler()
+    rdlc = compiler_with_udp_registers()
     rdlc.compile_file('basic.rdl')
     spec = rdlc.elaborate(top_def_name='basic').top
 
@@ -36,6 +38,25 @@ the python register access layer using PeakRDL Python.
 PythonExporter
 ==============
 
+The main exported class used to build the python register access layer:
+
 .. autoclass:: peakrdl_python.exporter.PythonExporter
     :members:
-    :special-members: __init__
+    :special-members: __init__
+
+Compiler Extensions
+-------------------
+
+PeakRDL Python uses two User Defined Properties to help the generation, there are definitions of
+these available to register with a the Compiler
+
+.. autoclass:: peakrdl_python.PythonHideUDP
+    :members:
+
+
+.. autoclass:: peakrdl_python.PythonInstNameUDP
+    :members:
+
+The compiler factory function will generate an instance of the compiler with these registered
+
+.. autofunction:: peakrdl_python.compiler_with_udp_registers

{peakrdl_python-0.8.0 → peakrdl_python-0.9.0}/docs/design_decisions.rst

@@ -20,4 +20,12 @@ Integer Data Types
 ===================
 
 All the APIs present memory, register and field entries as python integers. This abstracts, the
-complexity of byte ordering and reversed registers.
+complexity of byte ordering and reversed registers.
+
+Blocks of Data
+==============
+
+.. versionchanged:: 0.9.0
+
+    blocks of data (for example memories were accessed as python array.array previously. This
+    did not support width of larger than 128 bits therefore this was changed to list.

{peakrdl_python-0.8.0 → peakrdl_python-0.9.0}/docs/generated_package.rst

@@ -104,6 +104,37 @@ The callbacks are passed into the register access layer using either:
 * ``AsyncCallbackSet`` for async python function callbacks, these are called from the library using
   ``await``
 
+Legacy Block Callback and Block Access
+--------------------------------------
+
+.. versionchanged:: 0.9.0
+
+   Previous versions of PeakRDL Python used the python ``array.array`` for efficiently moving blocks
+   of data. This was changed in version 0.9.0 in order to accommodate memories which were larger
+   than 64 bit wide which could not be supported as the array type only support entries of up to
+   64 bit.
+
+   .. warning::
+      The developers apologise for making a breaking change, however, not being able to fully the
+      systemRDL specification was determined to be a major limitation that needed to be addressed.
+
+      It could have left this as a future compatibility mode before making a breaking change but
+      that would just delay the pain it was felt to be better to get as many users onto the new
+      API as soon as possible whilst PeakRDL Python is in beta.
+
+   If you really want to just keep on with the array based interface and make only minimal changes
+   to existing code, there are two simple steps:
+
+   1. The northbound interfaces that are provided by the generated package expect lists of integers
+      rather than array. The old interfaces can be retained by using the ``legacy_block_access``
+      build option.
+   2. The southbound interfaces into the callbacks again need to use lists for the
+      ``read_block_callback`` and ``write_block_callback`` methods. If you want to continue to use
+      the old scheme use the following callback classes which are part of the callbacks:
+      * ``NormalCallbackSetLegacy`` for standard python function callbacks
+      * ``AsyncCallbackSetLegacy`` for async python function callbacks, these are called from the library using ``await``
+
+
 Using the Register Access Layer
 ===============================
 
@@ -170,7 +201,9 @@ The following example shows the usage of the enumeration
 Array Access
 ------------
 
-SystemRDL supports multi-dimensional arrays, the following example shows an definition with an 1D and 3D array with various methods to access individual elements of the array and use of the iterators to walk through elements in loops
+SystemRDL supports multi-dimensional arrays, the following example shows an definition with an 1D
+and 3D array with various methods to access individual elements of the array and use of the
+iterators to walk through elements in loops
 
 .. literalinclude :: ../example/array_access/array_access.rdl
    :language: systemrdl
@@ -350,13 +383,38 @@ worry if they are in an array or not.
 .. literalinclude :: ../example/tranversing_address_map/reseting_registers.py
    :language: python
 
+Exposing User Defined Properties
+--------------------------------
+
+SystemRDL allows properties to be added to any component (Field, Memory, Register, Register File,
+Address Map), so called *User Defined Properties (UDP)*.
+
+Consider the following systemRDL example with a user defined property: ``component_usage``
+
+.. literalinclude :: ../example/user_defined_properties/user_defined_properties.rdl
+   :language: systemrdl
+
+User Defined Properties are not automatically included they must be specified, as shown:
+
+.. code-block:: bash
+
+   peakrdl python chip_with_registers.rdl -o chip_with_registers
+
+The user defined properties are stored in a ``udp`` property of all component in the generated
+register access and can be accessed as follows:
+
+.. literalinclude :: ../example/user_defined_properties/demo_user_defined_properties.py
+   :language: python
+
 Python Safe Names
 =================
 
 The systemRDL structure is converted to a python class structure, there are two concerns:
 
 * if any systemRDL node name is a python keyname
-* if any systemRDL node name clashes with part of the peakrdl_standard types, for example all register nodes have an ``address`` property that would clash with a field of that register called ``address``
+* if any systemRDL node name clashes with part of the peakrdl_standard types, for example all
+  register nodes have an ``address`` property that would clash with a field of that register
+  called ``address``
 
 consider the following example:
 
@@ -400,9 +458,68 @@ field from the example above
 .. literalinclude :: ../example/overridden_names/demo_over_ridden_names.py
    :language: python
 
+Hidden Elements
+===============
+
+Commonly some parts of the register map want to be hidden from some users, for example register
+included to reserve space or test functions.
+
+User Defined Property
+---------------------
+
+PeakRDL Python supports a User Defined Property (UDP): ``python_hide`` that can be used to hide
+items that should not appear in the generated python wrappers.
+
+In the following example, python wrapper generated would have the registers:
+
+* ``explictly_visible_reg``
+* ``implicitly_visible_reg``
+
+However the ``hidden_reg`` would not be included in the python wrappers
+
+.. code-block:: systemrdl
+
+   property python_hide { type = boolean; component = addrmap | regfile | reg | field | mem; };
+
+   addrmap my_addr_map {
+
+       reg {
+           default sw = rw;
+           default hw = r;
+           python_hide = true;
+           field { fieldwidth=1; } field_a;
+       } hidden_reg;
+
+      reg {
+           default sw = rw;
+           default hw = r;
+           python_hide = false;
+           field { fieldwidth=1; } field_a;
+       } explictly_visible_reg;
+
+      reg {
+           default sw = rw;
+           default hw = r;
+           field { fieldwidth=1; } field_a;
+       } implicitly_visible_reg;
+
+   };
+
+The ``python_hide`` property can be overridden with the ``show_hidden`` argument to the peakrdl
+command line tool or the ``export`` method.
+
+Regular Expression
+------------------
+
+PeakRDL Python supports hiding elements of the based on a regular expression.
+
+.. note:: The expression uses the python re.match, for example to hide all fields, registers,
+          regfiles, address maps or memories  with the name ``RSVD``, the regular expression
+          must match on the full name e.g. ``(?:[\w_\[\]]+\.)+RSVD``
+
 
-Autoformating
-=============
+Autoformatting
+==============
 
 The generated code is not perfect it often has lots of spare black lines, over time this will
 improve but the quickest way to resolve these issue is to include an autoformatter
@@ -424,7 +541,7 @@ PeakRDL Python also generates an simulator, this can be used to test and develop
 generated package. The simulator is used in a the examples shown earlier in this section. The
 simulator has the option to attach a callback to the read and write operations of either a
 register or field. In addition there is a ``value`` property that allows access to the register
-or feild content, this allows the contents to be accessed or updated without activating the
+or field content, this allows the contents to be accessed or updated without activating the
 callbacks, this is intended to allow the simulator to be extended with behaviour that is not
 fully described by the systemRDL.
 

{peakrdl_python-0.8.0 → peakrdl_python-0.9.0}/docs/index.rst

@@ -38,7 +38,7 @@ At some point another software component called a Hardware Abstraction Layer (HA
 get produced that abstracts the device function providing functions to do more useful things.
 The RAL could be used as part of a HAL.
 
-.. note:: The Hardware Abstraction Layer (HAL) provides abstact functionality and allows
+.. note:: The Hardware Abstraction Layer (HAL) provides abstract functionality and allows
           people to use the device without needing a full knowledge of how it works.
 
 What does it do
@@ -91,7 +91,7 @@ manipulations
 .. warning:: A Register Access Layer (RAL) is not for everyone. Some engineers like to see the
              address of each register and the content of a register as a hex word. You may be quite
              happy with this, if that is you please stop, the overhead of an extra
-             layer, its opaque nature and inefficency will annoy you.
+             layer, its opaque nature and inefficiency will annoy you.
 
 In order to move on the systemRDL code for the registers needs to exist
 
@@ -111,7 +111,7 @@ Once built, a set of test cases can be run on the code to confirm its integrity,
 
    python -m unittest discover -s gpio\tests -t .
 
-Using the RAL allows for much simipler to understand code that does the function that was intended
+Using the RAL allows for much simpler to understand code that does the function that was intended
 
 .. literalinclude :: ../example/why_ral/with_ral.py
    :language: python

{peakrdl_python-0.8.0 → peakrdl_python-0.9.0}/example/optimised_access/demo_optimised_array_access.py

@@ -1,8 +1,6 @@
 """
 PeakRDL Python example to show the different methods to access the a register array
 """
-from array import array as Array
-
 from optimised_array_access.reg_model.optimised_array_access import optimised_array_access_cls
 from optimised_array_access.sim.optimised_array_access import optimised_array_access_simulator_cls
 

peakrdl_python-0.9.0/example/user_defined_properties/demo_user_defined_properties.py

@@ -0,0 +1,16 @@
+from user_defined_property.reg_model.user_defined_property import user_defined_property_cls
+from user_defined_property.sim_lib.dummy_callbacks import dummy_read, dummy_write
+from user_defined_property.lib.callbacks import NormalCallbackSet
+
+if __name__ == '__main__':
+
+    # create an instance of the class
+    regmodel = user_defined_property_cls(callbacks=NormalCallbackSet(read_callback=dummy_read,
+                                                                     write_callback=dummy_write))
+
+    # loop through the the fields in the register access model and print out the value of the
+    # component_usage property
+    for field in regmodel.control_register.readable_fields:
+        field_usage = field.udp['component_usage']
+        print(f"Control register field:{field.inst_name} has recommend usage {field_usage.name}")
+

peakrdl_python-0.9.0/example/user_defined_properties/user_defined_properties.rdl

@@ -0,0 +1,17 @@
+enum component_type {
+			test_function = 0 { name = "test the design"; };
+			device_configuration = 1 { name = "configuring_the_device"; };
+			normal_use = 2 { desc="normal device usage"; };
+		};
+
+property component_usage { type = component_type; component = addrmap | regfile | reg | field | mem; };
+
+addrmap user_defined_property {
+
+    reg  {
+        field { fieldwidth=4; component_usage=component_type::test_function;  } data_loop_back;
+        field { fieldwidth=1; component_usage=component_type::device_configuration; } power_control;
+        field { fieldwidth=1; component_usage=component_type::normal_use;  } led_control;
+    } control_register;
+
+};

{peakrdl_python-0.8.0 → peakrdl_python-0.9.0}/generate_and_test.py

@@ -35,14 +35,13 @@ from unittest import TestLoader
 from unittest import TestSuite
 from unittest import TextTestRunner
 
-from coverage import Coverage
+#from coverage import Coverage
 
-from systemrdl import RDLCompiler
-
-from peakrdl_ipxact import IPXACTImporter
+#from peakrdl_ipxact import IPXACTImporter
 
 sys.path.append('src')
 from peakrdl_python import PythonExporter
+from peakrdl_python import compiler_with_udp_registers
 
 CommandLineParser = argparse.ArgumentParser(description='Test the framework')
 CommandLineParser.add_argument('--RDL_source_file', dest='root_RDL_file',
@@ -79,6 +78,21 @@ CommandLineParser.add_argument('--copy_libraries', action='store_true', dest='co
                                     'and debugging as multiple copies of the libraries can cause'
                                     'confusion. Therefore by default this script does not copy '
                                     'them over.')
+CommandLineParser.add_argument('--legacy_block_access', action='store_true',
+                               dest='legacy_block_access',
+                               help='peakrdl python has two methods to hold blocks of data, the '
+                                    'legacy mode based on Array or the new mode using lists')
+CommandLineParser.add_argument('--udp', dest='udp', nargs='*',
+                               type=str, help='any user defined properties to include in the '
+                                              'reg_model')
+CommandLineParser.add_argument('--hide_regex', dest='hide_regex', type=str,
+                               help='A regex that will cause any matching fully qualified node to '
+                                    'be hidden')
+CommandLineParser.add_argument('--full_inst_file', dest='full_inst_file',
+                               type=pathlib.Path, required=False,
+                               help='export a text file with a list of the all qualified instance'
+                                    'names in the systemRDL')
+
 
 def build_logging_cong(logfilepath:str):
     return {
@@ -127,6 +141,7 @@ def build_logging_cong(logfilepath:str):
         }
     }
 
+
 if __name__ == '__main__':
 
     CommandLineArgs = CommandLineParser.parse_args()
@@ -134,7 +149,7 @@ if __name__ == '__main__':
     logfile_path = build_logging_cong(CommandLineArgs.output_path / f'{__file__}.log')
     logging.config.dictConfig(logfile_path)
 
-    rdlc = RDLCompiler()
+    rdlc = compiler_with_udp_registers()
 
     if CommandLineArgs.ipxact is not None:
 
@@ -156,12 +171,21 @@ if __name__ == '__main__':
         node_list.append(node)
         print(node.inst_name)
 
+    # write out text file of all the nodes names, this can be used to debug regex issues
+    if CommandLineArgs.full_inst_file is not None:
+        with CommandLineArgs.full_inst_file.open('w', encoding='utf-8') as fid:
+            for child in spec.descendants(unroll=True):
+                fid.write('.'.join(child.get_path_segments()) + '\n')
+
     exporter = PythonExporter()
     start_time = time.time()
     exporter.export(node=spec, path=str(CommandLineArgs.output_path / 'generate_and_test_output'),
                     asyncoutput=CommandLineArgs.asyncoutput,
                     delete_existing_package_content=not CommandLineArgs.suppress_cleanup,
-                    skip_library_copy=not CommandLineArgs.copy_libraries)
+                    skip_library_copy=not CommandLineArgs.copy_libraries,
+                    legacy_block_access=CommandLineArgs.legacy_block_access,
+                    user_defined_properties_to_include=CommandLineArgs.udp,
+                    hidden_inst_name_regex=CommandLineArgs.hide_regex)
     print(f'generation time {time.time() - start_time}s')
 
     if not CommandLineArgs.export_only:
@@ -190,9 +214,15 @@ if __name__ == '__main__':
                                                 globals(), locals(), ['CallbackSet'], 0)
 
         if CommandLineArgs.asyncoutput is True:
-            callbackset_cls = getattr(peakrdl_python_package, 'AsyncCallbackSet')
+            if CommandLineArgs.legacy_block_access is True:
+                callbackset_cls = getattr(peakrdl_python_package, 'AsyncCallbackSetLegacy')
+            else:
+                callbackset_cls = getattr(peakrdl_python_package, 'AsyncCallbackSet')
         else:
-            callbackset_cls = getattr(peakrdl_python_package, 'NormalCallbackSet')
+            if CommandLineArgs.legacy_block_access is True:
+                callbackset_cls = getattr(peakrdl_python_package, 'NormalCallbackSetLegacy')
+            else:
+                callbackset_cls = getattr(peakrdl_python_package, 'NormalCallbackSet')
 
         sim_cls = getattr(sim_module, sim_class_name)
         sim = sim_cls(address=0)
@@ -210,6 +240,4 @@ if __name__ == '__main__':
             cov.stop()
             cov.html_report(directory=str(CommandLineArgs.coverage_report_path / CommandLineArgs.root_node))
 
-        sim.memory_for_address(64)
-