peakrdl-python 0.7.4__tar.gz → 0.8.0__tar.gz
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- peakrdl_python-0.8.0/.github/workflows/action.yaml +306 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/.gitignore +1 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/PKG-INFO +8 -1
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/docs/api_components.rst +3 -2
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/docs/generated_package.rst +26 -8
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/docs/index.rst +1 -4
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/array_access/demo_array_access.py +5 -17
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/enumerated_fields/demo_enumerated_fields.py +2 -19
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/optimised_access/demo_optimised_access.py +4 -34
- peakrdl_python-0.8.0/example/optimised_access/demo_optimised_array_access.py +42 -0
- peakrdl_python-0.8.0/example/overridden_names/demo_over_ridden_names.py +17 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/simulating_callbacks/chip_with_a_GPIO.rdl +3 -2
- peakrdl_python-0.8.0/example/simulating_callbacks/flashing_the_LED.py +99 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/tranversing_address_map/dumping_register_state_to_json_file.py +4 -39
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/tranversing_address_map/reseting_registers.py +9 -41
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/tranversing_address_map/writing_register_state_from_json_file.py +4 -38
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/why_ral/with_hal.py +2 -4
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/why_ral/with_ral.py +2 -4
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/why_ral/without_ral.py +21 -3
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/generate_and_test.py +30 -51
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/pyproject.toml +10 -1
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/__about__.py +1 -1
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/exporter.py +300 -125
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/lib/async_register.py +77 -26
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/lib/fields.py +1 -4
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/lib/register.py +74 -65
- peakrdl_python-0.8.0/src/peakrdl_python/sim_lib/__init__.py +0 -0
- peakrdl_python-0.8.0/src/peakrdl_python/sim_lib/_callbacks.py +95 -0
- peakrdl_python-0.8.0/src/peakrdl_python/sim_lib/base.py +34 -0
- peakrdl_python-0.8.0/src/peakrdl_python/sim_lib/dummy_callbacks.py +175 -0
- peakrdl_python-0.8.0/src/peakrdl_python/sim_lib/field.py +154 -0
- peakrdl_python-0.8.0/src/peakrdl_python/sim_lib/memory.py +162 -0
- peakrdl_python-0.8.0/src/peakrdl_python/sim_lib/register.py +221 -0
- peakrdl_python-0.8.0/src/peakrdl_python/sim_lib/simulator.py +361 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/templates/addrmap.py.jinja +35 -35
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/templates/addrmap_field.py.jinja +2 -0
- peakrdl_python-0.8.0/src/peakrdl_python/templates/addrmap_simulation_tb.py.jinja +409 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/templates/addrmap_tb.py.jinja +22 -22
- peakrdl_python-0.8.0/src/peakrdl_python/templates/baseclass_simulation_tb.py.jinja +65 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/templates/baseclass_tb.py.jinja +15 -47
- peakrdl_python-0.8.0/src/peakrdl_python/templates/example.py.jinja +13 -0
- peakrdl_python-0.8.0/src/peakrdl_python/templates/sim_addrmap.py.jinja +65 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python.egg-info/PKG-INFO +8 -1
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python.egg-info/SOURCES.txt +14 -3
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python.egg-info/requires.txt +9 -0
- peakrdl_python-0.8.0/tests/testcases/simulator_test.rdl +44 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/unit_tests/test_reg.py +202 -0
- peakrdl-python-0.7.4/.github/workflows/action.yaml +0 -217
- peakrdl-python-0.7.4/example/optimised_access/demo_optimised_array_access.py +0 -102
- peakrdl-python-0.7.4/example/overridden_names/over_ridden_names.py +0 -32
- peakrdl-python-0.7.4/example/simulating_callbacks/flashing_the_LED.py +0 -144
- peakrdl-python-0.7.4/example/why_ral/hardware_sim.py +0 -25
- peakrdl-python-0.7.4/src/peakrdl_python/templates/addrmap_simulation_tb.jinja +0 -17
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/.readthedocs.yaml +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/LICENSE +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/MANIFEST.in +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/README.md +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/docs/api.rst +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/docs/command_line.rst +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/docs/conf.py +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/docs/customisation.rst +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/docs/design_decisions.rst +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/docs/design_tools.rst +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/docs/genindex.rst +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/docs/installation.rst +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/docs/requirements.txt +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/array_access/array_access.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/enumerated_fields/enumerated_fields.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/optimised_access/optimised_access.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/optimised_access/optimised_array_access.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/overridden_names/overridden_names.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/tranversing_address_map/chip_with_registers.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/tranversing_address_map/reg_dump.json +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/why_ral/__init__.py +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/why_ral/gpio.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/generate_testcases.py +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/setup.cfg +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/.coveragerc +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/__init__.py +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/__peakrdl__.py +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/_node_walkers.py +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/lib/__init__.py +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/lib/base.py +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/lib/callbacks.py +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/lib/memory.py +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/lib/utility_functions.py +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/safe_name_utility.py +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/systemrdl_node_utility_functions.py +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/templates/__init__.py +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/templates/addrmap_memory.py.jinja +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/templates/addrmap_register.py.jinja +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/templates/addrmap_simulation.py.jinja +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/templates/header.py.jinja +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/templates/header_tb.py.jinja +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python/templates/reg_definitions.py.jinja +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python.egg-info/dependency_links.txt +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python.egg-info/entry_points.txt +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/src/peakrdl_python.egg-info/top_level.txt +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/.mypy.ini +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/alternative_template_toml/peakrdl.toml +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/alternative_templates/header.py.jinja +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/alternative_templates/header_tb.py.jinja +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/pylint.rc +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/RDLFormatCode_example.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/addr_map.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/all_register_access_types.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/basic.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/block_a.xml +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/block_b.xml +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/different_array_types.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/enum_example.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/example_issue_106.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/field_scope.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/field_with_overridden_reset.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/fields_with_HW_write.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/fields_with_reset_values.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/memories.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/memories_with_registers.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/msb0_and_lsb0.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/multi_block.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/multifile.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/name_clash.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/overridden_python_name.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/parametrised_readonly_and_readwrite.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/regfile_and_arrays.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/same_but_different_enum.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/signals_definitions_at_various_levels.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/simple.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/simple.xml +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/sizes_registers.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/sizes_registers_array.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/testcases/write_only_enum_with_undefined_reset.rdl +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/unit_tests/__init__.py +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/unit_tests/simple_components.py +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/unit_tests/test_array_indexing.py +0 -0
- {peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/tests/unit_tests/test_optimised_reg_array.py +0 -0
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|
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mypy testcase_output --config-file=tests/.mypy.ini
|
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# pylint --rcfile tests/pylint.rc testcase_output/autopep8 --disable=duplicate-code,line-too-long,too-many-statements,invalid-name,unused-import,too-many-instance-attributes,too-many-arguments,too-many-lines
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|
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run: |
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|
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|
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|
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|
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|
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|
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#-------------------------------------------------------------------------------
|
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|
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|
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|
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|
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|
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|
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|
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|
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|
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path: |
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dist/*.tar.gz
|
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|
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dist/*.whl
|
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|
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#-------------------------------------------------------------------------------
|
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|
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|
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|
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|
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|
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|
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|
|
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|
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# Only publish when a GitHub Release is created.
|
|
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|
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|
|
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|
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|
|
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|
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|
|
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with:
|
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name: artifact
|
|
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path: dist
|
|
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|
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|
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|
|
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|
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|
|
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|
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user: __token__
|
|
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|
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password: ${{ secrets.PYPI_API_TOKEN }}
|
|
@@ -1,6 +1,6 @@
|
|
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1
1
|
Metadata-Version: 2.1
|
|
2
2
|
Name: peakrdl-python
|
|
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|
-
Version: 0.
|
|
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|
+
Version: 0.8.0
|
|
4
4
|
Summary: Generate Python Register Access Layer (RAL) from SystemRDL
|
|
5
5
|
Author: Keith Brady
|
|
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6
|
License: GNU GENERAL PUBLIC LICENSE
|
|
@@ -704,6 +704,13 @@ Requires-Dist: systemrdl-compiler>=1.24.0
|
|
|
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704
|
Requires-Dist: jinja2
|
|
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|
Requires-Dist: asynctest; python_version < "3.8"
|
|
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706
|
Requires-Dist: typing-extensions; python_version < "3.11"
|
|
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|
+
Provides-Extra: dev
|
|
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|
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Requires-Dist: mypy; extra == "dev"
|
|
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|
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Requires-Dist: pylint; extra == "dev"
|
|
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|
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Requires-Dist: coverage; extra == "dev"
|
|
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|
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Requires-Dist: peakrdl-ipxact; extra == "dev"
|
|
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|
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Provides-Extra: peakrdl
|
|
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|
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Requires-Dist: peakrdl; extra == "peakrdl"
|
|
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714
|
|
|
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715
|

|
|
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716
|
[](https://pypi.org/project/peakrdl-python)
|
|
@@ -65,7 +65,7 @@ Memories
|
|
|
65
65
|
:inherited-members:
|
|
66
66
|
|
|
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|
Registers
|
|
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|
-
|
|
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|
+
=========
|
|
69
69
|
|
|
70
70
|
.. autoclass:: peakrdl_python.lib.register.RegReadOnly
|
|
71
71
|
:members:
|
|
@@ -93,6 +93,7 @@ Registers
|
|
|
93
93
|
|
|
94
94
|
Register Fields
|
|
95
95
|
^^^^^^^^^^^^^^^
|
|
96
|
+
A register will always have fields within it
|
|
96
97
|
|
|
97
98
|
.. autoclass:: peakrdl_python.lib.fields.FieldReadOnly
|
|
98
99
|
:members:
|
|
@@ -116,4 +117,4 @@ Register Fields
|
|
|
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|
|
|
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118
|
.. autoclass:: peakrdl_python.lib.fields.FieldEnumReadWrite
|
|
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|
:members:
|
|
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|
-
:inherited-members:
|
|
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|
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:inherited-members:
|
|
@@ -9,8 +9,11 @@ will be based on the top level address map name with the package was generated
|
|
|
9
9
|
|
|
10
10
|
| ``<root_name>``
|
|
11
11
|
| ├── ``lib``
|
|
12
|
+
| ├── ``sim_lib``
|
|
12
13
|
| ├── ``reg_model``
|
|
13
14
|
| │ └── ``<root_name>.py``
|
|
15
|
+
| ├── ``sim``
|
|
16
|
+
| │ └── ``<root_name>.py``
|
|
14
17
|
| └── ``tests``
|
|
15
18
|
| └── ``test_<root_name>.py``
|
|
16
19
|
|
|
@@ -57,7 +60,7 @@ access layer package so that it can be used from the console:
|
|
|
57
60
|
Args:
|
|
58
61
|
addr: Address to write to
|
|
59
62
|
width: Width of the register in bits
|
|
60
|
-
accesswidth:
|
|
63
|
+
accesswidth: Minimum access width of the register in bits
|
|
61
64
|
|
|
62
65
|
Returns:
|
|
63
66
|
value inputted by the used
|
|
@@ -69,8 +72,8 @@ access layer package so that it can be used from the console:
|
|
|
69
72
|
|
|
70
73
|
def write_addr_space(addr: int, width: int, accesswidth: int, data: int) -> None:
|
|
71
74
|
"""
|
|
72
|
-
Callback to simulate the operation of the package, everytime the
|
|
73
|
-
|
|
75
|
+
Callback to simulate the operation of the package, everytime the write is called, it will
|
|
76
|
+
print out the result.
|
|
74
77
|
|
|
75
78
|
Args:
|
|
76
79
|
addr: Address to write to
|
|
@@ -130,11 +133,10 @@ a file called ``chip_with_a_GPIO.rdl``:
|
|
|
130
133
|
.. tip:: It is always good practice to run the unittests on the generated code.
|
|
131
134
|
|
|
132
135
|
Once the register access layer has been generated and it can be used. The following example
|
|
133
|
-
does not actually use a device driver. Instead it chip simulator with a
|
|
136
|
+
does not actually use a device driver. Instead it chip simulator with a Tkinter GUI,
|
|
134
137
|
incorporating a RED circle to represent the LED. The chip simulator has read and write methods (
|
|
135
|
-
equivalent to those offered by a device driver),
|
|
136
|
-
|
|
137
|
-
simulator.
|
|
138
|
+
equivalent to those offered by a hardware device driver), in this case they use the simulator
|
|
139
|
+
provided by PeakRDL Python.
|
|
138
140
|
|
|
139
141
|
.. literalinclude :: ../example/simulating_callbacks/flashing_the_LED.py
|
|
140
142
|
:language: python
|
|
@@ -395,7 +397,7 @@ User Defined Property), attributes can be accessed using the ``get_child_by_syst
|
|
|
395
397
|
method of any object in the register model. The following example shows both methods to access the
|
|
396
398
|
field from the example above
|
|
397
399
|
|
|
398
|
-
.. literalinclude :: ../example/overridden_names/
|
|
400
|
+
.. literalinclude :: ../example/overridden_names/demo_over_ridden_names.py
|
|
399
401
|
:language: python
|
|
400
402
|
|
|
401
403
|
|
|
@@ -414,3 +416,19 @@ to clean up the generated code. This had two issues:
|
|
|
414
416
|
peakrdl-python uses the Black `Black <https://pypi.org/project/black/L>`_ in the CI tests to check
|
|
415
417
|
that the generated code is compatible with an autoformatter.
|
|
416
418
|
|
|
419
|
+
|
|
420
|
+
Simulator
|
|
421
|
+
=========
|
|
422
|
+
|
|
423
|
+
PeakRDL Python also generates an simulator, this can be used to test and develop using the
|
|
424
|
+
generated package. The simulator is used in a the examples shown earlier in this section. The
|
|
425
|
+
simulator has the option to attach a callback to the read and write operations of either a
|
|
426
|
+
register or field. In addition there is a ``value`` property that allows access to the register
|
|
427
|
+
or feild content, this allows the contents to be accessed or updated without activating the
|
|
428
|
+
callbacks, this is intended to allow the simulator to be extended with behaviour that is not
|
|
429
|
+
fully described by the systemRDL.
|
|
430
|
+
|
|
431
|
+
.. warning:: The PeakRDL Python simulator is not intended to replace an RTL simulation of the
|
|
432
|
+
design. It does not simulate the hardware, it is intended as a simple tool for
|
|
433
|
+
development and testing of the python wrappers or code that uses them.
|
|
434
|
+
|
|
@@ -68,13 +68,10 @@ set the state to `1`. The device has 8 GPIO pins controlled from two registers.
|
|
|
68
68
|
| | | | | | | | | | | GPIO configured as out |
|
|
69
69
|
+----------+---------+------------+------------+------------+------------+------------+------------+------------+------------+------------------------+
|
|
70
70
|
|
|
71
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This example uses
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This example uses the peakrdl python simulator to mimic the behaviour of the device offering ``read`` and ``write``
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methods to offer register read and write access to the device. In the real work this would likely go
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via a device driver or JTAG emulator, if the software is running off chip (i.e. a PC).
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.. literalinclude :: ../example/why_ral/hardware_sim.py
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:language: python
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To configure pin 0 and set its state you would need to do the following steps:
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1. Read the DIR register (to make sure you preserve the states of other pins)
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@@ -2,28 +2,16 @@ import json
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from typing import Union
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3
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from array_access.reg_model.array_access import array_access_cls
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from array_access.sim.array_access import array_access_simulator_cls
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from array_access.lib.callbacks import NormalCallbackSet
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# dummy functions to demonstrate the class
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def read_addr_space(addr: int, width: int, accesswidth: int) -> int:
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"""
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Callback to simulate the operation of the package, everytime the read is called, it return
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an integer value of 0
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Args:
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addr: Address to write to
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width: Width of the register in bits
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accesswidth: Minimum access width of the register in bits
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Returns:
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value inputted by the used
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"""
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return int(0)
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if __name__ == '__main__':
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9
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# setup the simple simulator
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sim = array_access_simulator_cls(0)
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+
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# create an instance of the class
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-
regmodel = array_access_cls(callbacks=NormalCallbackSet(read_callback=
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regmodel = array_access_cls(callbacks=NormalCallbackSet(read_callback=sim.read))
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# access a entry in the 1D array
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print(regmodel.reg_array_1D[0].field_a.read())
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{peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/enumerated_fields/demo_enumerated_fields.py
RENAMED
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@@ -4,29 +4,12 @@ A demonstration of using enumeration
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from enumerated_fields.lib import NormalCallbackSet
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from enumerated_fields.reg_model.enumerated_fields import enumerated_fields_cls as GPIO
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class HardwareSimulator:
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def __init__(self):
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# use a python dictionary to simulate the hardware
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self._address_space = {0x00: 0, 0x04: 0}
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def read(self, addr: int, width: int = 32, accesswidth: int = 32) -> int:
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"""
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function to simulate a device read
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"""
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return self._address_space[addr]
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def write(self, addr: int, data: int, width: int=32, accesswidth: int=32) -> None:
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"""
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function to simulate a device read
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"""
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self._address_space[addr] = data
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from enumerated_fields.sim.enumerated_fields import enumerated_fields_simulator_cls as HardwareSimulator
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if __name__ == '__main__':
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# create an instance of the hardware simulator
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hw = HardwareSimulator()
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hw = HardwareSimulator(0)
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# create an instance of the RAL with the callbacks directed at the hardware simulator
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gpio = GPIO(callbacks=NormalCallbackSet(read_callback=hw.read, write_callback=hw.write))
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{peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/optimised_access/demo_optimised_access.py
RENAMED
|
@@ -3,48 +3,18 @@ PeakRDL Python example to show the different methods to access the fields of a r
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3
3
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"""
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from optimised_access.reg_model.optimised_access import optimised_access_cls, \
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optimised_access_gpio_direction_enc_enumcls
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+
from optimised_access.sim.optimised_access import optimised_access_simulator_cls
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from optimised_access.lib import NormalCallbackSet
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8
9
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# dummy functions to demonstrate the class
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def read_addr_space(addr: int, width: int, accesswidth: int) -> int:
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"""
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Callback to simulate the operation of the package, everytime the read is called, it return
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an integer value of 0
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Args:
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|
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addr: Address to write to
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width: Width of the register in bits
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|
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accesswidth: Minimum access width of the register in bits
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Returns:
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value inputted by the used
|
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"""
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|
-
return int(0)
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-
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-
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26
|
-
def write_addr_space(addr: int, width: int, accesswidth: int, data: int) -> None:
|
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27
|
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"""
|
|
28
|
-
Callback to simulate the operation of the package, everytime the read is called, it will
|
|
29
|
-
request the user input the value to be read back.
|
|
30
|
-
|
|
31
|
-
Args:
|
|
32
|
-
addr: Address to write to
|
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33
|
-
width: Width of the register in bits
|
|
34
|
-
accesswidth: Minimum access width of the register in bits
|
|
35
|
-
data: value to be written to the register
|
|
36
|
-
|
|
37
|
-
Returns:
|
|
38
|
-
None
|
|
39
|
-
"""
|
|
40
|
-
print(f'0x{data:X} written to 0x{addr:X}')
|
|
41
10
|
|
|
42
11
|
if __name__ == '__main__':
|
|
43
12
|
|
|
44
13
|
# create an instance of the address map with the simulated callback necessary to demonstrate
|
|
45
14
|
# the example
|
|
46
|
-
|
|
47
|
-
|
|
15
|
+
sim = optimised_access_simulator_cls(0)
|
|
16
|
+
dut = optimised_access_cls(callbacks=NormalCallbackSet(read_callback=sim.read,
|
|
17
|
+
write_callback=sim.write))
|
|
48
18
|
|
|
49
19
|
# configure the GPIO 0 and GPIO 1 without affecting the state of the GPIO 2 and GPIO 3
|
|
50
20
|
# configuration.
|
|
@@ -0,0 +1,42 @@
|
|
|
1
|
+
"""
|
|
2
|
+
PeakRDL Python example to show the different methods to access the a register array
|
|
3
|
+
"""
|
|
4
|
+
from array import array as Array
|
|
5
|
+
|
|
6
|
+
from optimised_array_access.reg_model.optimised_array_access import optimised_array_access_cls
|
|
7
|
+
from optimised_array_access.sim.optimised_array_access import optimised_array_access_simulator_cls
|
|
8
|
+
|
|
9
|
+
from optimised_array_access.lib import NormalCallbackSet
|
|
10
|
+
|
|
11
|
+
|
|
12
|
+
|
|
13
|
+
if __name__ == '__main__':
|
|
14
|
+
|
|
15
|
+
# create an instance of the address map with the simulated callback necessary to demonstrate
|
|
16
|
+
# the example
|
|
17
|
+
sim = optimised_array_access_simulator_cls(0)
|
|
18
|
+
dut = optimised_array_access_cls(callbacks=NormalCallbackSet(read_block_callback=sim.read_block,
|
|
19
|
+
write_block_callback=sim.write_block,
|
|
20
|
+
read_callback=sim.read,
|
|
21
|
+
write_callback=sim.write))
|
|
22
|
+
|
|
23
|
+
# the following will involve 2 reads and 2 writes (one per feild) for each register (8 in total)
|
|
24
|
+
for idx in range(len(dut.gpio_register)):
|
|
25
|
+
dut.gpio_register[idx].gpio_direction.write(dut.gpio_register[idx].gpio_direction.enum_cls.GPIO_OUT)
|
|
26
|
+
dut.gpio_register[idx].gpio_pullup.write(False)
|
|
27
|
+
# leave the drive strength untouched
|
|
28
|
+
|
|
29
|
+
# the following will involve 1 reads and 1 writes for each register (8 in total)
|
|
30
|
+
# also note the use of the register array iterator (so you don't need range and indexing)
|
|
31
|
+
for gpio_register in dut.gpio_register:
|
|
32
|
+
with gpio_register.single_read_modify_write() as reg:
|
|
33
|
+
reg.gpio_direction.write(reg.gpio_direction.enum_cls.GPIO_OUT)
|
|
34
|
+
reg.gpio_pullup.write(False)
|
|
35
|
+
# leave the drive strength untouched
|
|
36
|
+
|
|
37
|
+
# the following will do one block read and one block write for the same thing
|
|
38
|
+
with dut.gpio_register.single_read_modify_write() as reg_array:
|
|
39
|
+
for reg in reg_array:
|
|
40
|
+
reg.gpio_direction.write(reg.gpio_direction.enum_cls.GPIO_OUT)
|
|
41
|
+
reg.gpio_pullup.write(False)
|
|
42
|
+
# leave the drive strength untouched
|
|
@@ -0,0 +1,17 @@
|
|
|
1
|
+
import json
|
|
2
|
+
from typing import Union
|
|
3
|
+
|
|
4
|
+
from over_ridden_names.reg_model.over_ridden_names import over_ridden_names_cls
|
|
5
|
+
from over_ridden_names.lib import NormalCallbackSet
|
|
6
|
+
from over_ridden_names.sim_lib.dummy_callbacks import dummy_read
|
|
7
|
+
|
|
8
|
+
if __name__ == '__main__':
|
|
9
|
+
|
|
10
|
+
# create an instance of the class
|
|
11
|
+
over_ridden_names = over_ridden_names_cls(callbacks=NormalCallbackSet(read_callback=dummy_read))
|
|
12
|
+
|
|
13
|
+
# access the field value directly
|
|
14
|
+
print(over_ridden_names.overridden_reg_a.overridden_field_a.read())
|
|
15
|
+
|
|
16
|
+
# access the feild value using the original systemRDL names
|
|
17
|
+
print(over_ridden_names.get_child_by_system_rdl_name('reg_a').get_child_by_system_rdl_name('field_a').read())
|
{peakrdl-python-0.7.4 → peakrdl_python-0.8.0}/example/simulating_callbacks/chip_with_a_GPIO.rdl
RENAMED
|
@@ -18,6 +18,7 @@ addrmap mychip {
|
|
|
18
18
|
sw=rw;
|
|
19
19
|
hw=r;
|
|
20
20
|
reset={GPIO_direction::dir_in}; };
|
|
21
|
+
|
|
21
22
|
field GPIO_output_field_type {
|
|
22
23
|
fieldwidth = 1;
|
|
23
24
|
sw=rw;
|
|
@@ -27,12 +28,12 @@ addrmap mychip {
|
|
|
27
28
|
name="GPIO Direction";
|
|
28
29
|
desc="Register to set the direction of each GPIO pin";
|
|
29
30
|
GPIO_direction_field_type PIN_0;
|
|
30
|
-
} GPIO_dir
|
|
31
|
+
} GPIO_dir;
|
|
31
32
|
|
|
32
33
|
reg {
|
|
33
34
|
name="GPIO Set State";
|
|
34
35
|
desc="Register to set the state of a GPIO Pin";
|
|
35
36
|
GPIO_output_field_type PIN_0;
|
|
36
|
-
} GPIO_state
|
|
37
|
+
} GPIO_state;
|
|
37
38
|
} GPIO;
|
|
38
39
|
};
|