peakrdl-busdecoder 0.7.1__tar.gz → 0.7.2__tar.gz

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Files changed (112) hide show
  1. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/PKG-INFO +1 -1
  2. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/cpuif/apb.rst +5 -0
  3. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/pyproject.toml +1 -1
  4. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/apb3/apb3_cpuif.py +6 -4
  5. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/apb4/apb4_cpuif.py +6 -4
  6. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder.egg-info/PKG-INFO +1 -1
  7. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/uv.lock +1 -1
  8. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/.devcontainer/Dockerfile +0 -0
  9. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/.devcontainer/devcontainer.json +0 -0
  10. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/.github/ISSUE_TEMPLATE/bug_report.md +0 -0
  11. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/.github/ISSUE_TEMPLATE/feature_request.md +0 -0
  12. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/.github/ISSUE_TEMPLATE/question.md +0 -0
  13. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/.github/pull_request_template.md +0 -0
  14. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/.github/workflows/build.yml +0 -0
  15. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/.github/workflows/docs.yml +0 -0
  16. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/.github/workflows/format.yml +0 -0
  17. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/.github/workflows/lint.yml +0 -0
  18. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/.github/workflows/release.yml +0 -0
  19. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/.github/workflows/test.yml +0 -0
  20. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/.github/workflows/typecheck.yml +0 -0
  21. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/.gitignore +0 -0
  22. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/.readthedocs.yaml +0 -0
  23. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/CONTRIBUTING.md +0 -0
  24. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/LICENSE +0 -0
  25. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/MANIFEST.in +0 -0
  26. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/README.md +0 -0
  27. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/Makefile +0 -0
  28. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/api.rst +0 -0
  29. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/architecture.rst +0 -0
  30. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/conf.py +0 -0
  31. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/configuring.rst +0 -0
  32. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/cpuif/axi4lite.rst +0 -0
  33. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/cpuif/customizing.rst +0 -0
  34. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/cpuif/internal_protocol.rst +0 -0
  35. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/cpuif/introduction.rst +0 -0
  36. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/dev_notes/Alpha-Beta Versioning +0 -0
  37. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/dev_notes/Hierarchy-and-Indexing +0 -0
  38. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/dev_notes/Program Flow +0 -0
  39. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/dev_notes/Resets +0 -0
  40. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/dev_notes/Signal Dereferencer +0 -0
  41. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/dev_notes/Validation Needed +0 -0
  42. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/dev_notes/template-layers/1-port-declaration +0 -0
  43. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/dev_notes/template-layers/1.1.hardware-interface +0 -0
  44. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/dev_notes/template-layers/2-CPUIF +0 -0
  45. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/dev_notes/template-layers/3-address-decode +0 -0
  46. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/dev_notes/template-layers/4-fields +0 -0
  47. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/dev_notes/template-layers/5-readback-mux +0 -0
  48. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/dev_notes/template-layers/6-output-port-mapping +0 -0
  49. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/diagrams/arch.png +0 -0
  50. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/diagrams/diagrams.odg +0 -0
  51. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/diagrams/rbuf.png +0 -0
  52. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/diagrams/readback.png +0 -0
  53. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/diagrams/wbuf.png +0 -0
  54. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/img/err.svg +0 -0
  55. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/img/ok.svg +0 -0
  56. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/img/warn.svg +0 -0
  57. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/index.rst +0 -0
  58. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/licensing.rst +0 -0
  59. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/limitations.rst +0 -0
  60. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/parameters.rst +0 -0
  61. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/requirements.txt +0 -0
  62. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/hdl-src/README.md +0 -0
  63. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/hdl-src/apb3_intf.sv +0 -0
  64. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/hdl-src/apb4_intf.sv +0 -0
  65. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/hdl-src/avalon_mm_intf.sv +0 -0
  66. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/hdl-src/axi4lite_intf.sv +0 -0
  67. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/setup.cfg +0 -0
  68. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/__init__.py +0 -0
  69. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/__peakrdl__.py +0 -0
  70. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/body/__init__.py +0 -0
  71. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/body/body.py +0 -0
  72. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/body/combinational_body.py +0 -0
  73. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/body/for_loop_body.py +0 -0
  74. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/body/if_body.py +0 -0
  75. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/body/struct_body.py +0 -0
  76. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/__init__.py +0 -0
  77. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/apb3/__init__.py +0 -0
  78. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/apb3/apb3_interface.py +0 -0
  79. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/apb3/apb3_tmpl.sv +0 -0
  80. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/apb4/__init__.py +0 -0
  81. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/apb4/apb4_interface.py +0 -0
  82. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/apb4/apb4_tmpl.sv +0 -0
  83. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/axi4lite/__init__.py +0 -0
  84. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/axi4lite/axi4_lite_cpuif.py +0 -0
  85. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/axi4lite/axi4_lite_interface.py +0 -0
  86. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/axi4lite/axi4_lite_tmpl.sv +0 -0
  87. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/base_cpuif.py +0 -0
  88. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/fanin_gen.py +0 -0
  89. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/fanin_intermediate_gen.py +0 -0
  90. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/fanout_gen.py +0 -0
  91. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/interface.py +0 -0
  92. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/decode_logic_gen.py +0 -0
  93. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/design_scanner.py +0 -0
  94. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/design_state.py +0 -0
  95. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/exporter.py +0 -0
  96. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/identifier_filter.py +0 -0
  97. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/listener.py +0 -0
  98. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/module_tmpl.sv +0 -0
  99. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/package_tmpl.sv +0 -0
  100. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/py.typed +0 -0
  101. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/rdl_params.py +0 -0
  102. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/struct_gen.py +0 -0
  103. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/sv_int.py +0 -0
  104. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/udps/__init__.py +0 -0
  105. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/utils.py +0 -0
  106. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/validate_design.py +0 -0
  107. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder.egg-info/SOURCES.txt +0 -0
  108. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder.egg-info/dependency_links.txt +0 -0
  109. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder.egg-info/entry_points.txt +0 -0
  110. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder.egg-info/requires.txt +0 -0
  111. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder.egg-info/top_level.txt +0 -0
  112. {peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/tools/shims/xargs +0 -0
{peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/PKG-INFO RENAMED
@@ -1,6 +1,6 @@
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  Metadata-Version: 2.4
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  Name: peakrdl-busdecoder
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- Version: 0.7.1
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+ Version: 0.7.2
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  Summary: Generate a SystemVerilog bus decoder from SystemRDL for splitting CPU interfaces to multiple sub-address spaces
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  Author: Arnav Sacheti
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  License: LGPLv3
{peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/docs/cpuif/apb.rst RENAMED
@@ -8,6 +8,11 @@ APB interfaces omit these ports entirely. When using a SystemVerilog interface,
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  the clock and reset fields remain part of the interface definition but must be
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  connected externally to each endpoint.
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+ An unmapped address completes with an error in the first access cycle. The
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+ decoder asserts ``PREADY`` and ``PSLVERR`` together only when ``PSEL`` and
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+ ``PENABLE`` are high; both remain low during setup and while unselected.
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+ Mapped transfers pass through the selected endpoint's response signals.
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+
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  .. warning::
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  Some IP vendors will incorrectly implement the address signalling
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  assuming word-addresses. (that each increment of ``PADDR`` is the next word)
{peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/pyproject.toml RENAMED
@@ -4,7 +4,7 @@ build-backend = "setuptools.build_meta"
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  [project]
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  name = "peakrdl-busdecoder"
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- version = "0.7.1"
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+ version = "0.7.2"
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  requires-python = ">=3.10"
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  dependencies = [
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  "jinja2~=3.1",
{peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/apb3/apb3_cpuif.py RENAMED
@@ -72,8 +72,9 @@ class APB3CpuifFlat(BaseCpuif):
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  fanin["cpuif_wr_ack"] = "'0"
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  fanin["cpuif_wr_err"] = "'0"
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  if error:
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- fanin["cpuif_wr_ack"] = "'1"
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- fanin["cpuif_wr_err"] = "cpuif_wr_sel.cpuif_err"
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+ # The error branch is already selected; respond only in the access phase.
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+ fanin["cpuif_wr_ack"] = self.signal("PENABLE")
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+ fanin["cpuif_wr_err"] = self.signal("PENABLE")
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  else:
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  fanin["cpuif_wr_ack"] = self.signal("PREADY", node, "i")
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  fanin["cpuif_wr_err"] = self.signal("PSLVERR", node, "i")
@@ -86,8 +87,9 @@ class APB3CpuifFlat(BaseCpuif):
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  fanin["cpuif_rd_err"] = "'0"
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  fanin["cpuif_rd_data"] = "'0"
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  if error:
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- fanin["cpuif_rd_ack"] = "'1"
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- fanin["cpuif_rd_err"] = "cpuif_rd_sel.cpuif_err"
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+ # The error branch is already selected; respond only in the access phase.
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+ fanin["cpuif_rd_ack"] = self.signal("PENABLE")
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+ fanin["cpuif_rd_err"] = self.signal("PENABLE")
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  else:
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  fanin["cpuif_rd_ack"] = self.signal("PREADY", node, "i")
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  fanin["cpuif_rd_err"] = self.signal("PSLVERR", node, "i")
{peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder/cpuif/apb4/apb4_cpuif.py RENAMED
@@ -74,8 +74,9 @@ class APB4CpuifFlat(BaseCpuif):
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  fanin["cpuif_wr_ack"] = "'0"
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  fanin["cpuif_wr_err"] = "'0"
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  if error:
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- fanin["cpuif_wr_ack"] = "'1"
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- fanin["cpuif_wr_err"] = "cpuif_wr_sel.cpuif_err"
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+ # The error branch is already selected; respond only in the access phase.
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+ fanin["cpuif_wr_ack"] = self.signal("PENABLE")
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+ fanin["cpuif_wr_err"] = self.signal("PENABLE")
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  else:
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  fanin["cpuif_wr_ack"] = self.signal("PREADY", node, "i")
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  fanin["cpuif_wr_err"] = self.signal("PSLVERR", node, "i")
@@ -88,8 +89,9 @@ class APB4CpuifFlat(BaseCpuif):
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  fanin["cpuif_rd_err"] = "'0"
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  fanin["cpuif_rd_data"] = "'0"
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  if error:
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- fanin["cpuif_rd_ack"] = "'1"
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- fanin["cpuif_rd_err"] = "cpuif_rd_sel.cpuif_err"
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+ # The error branch is already selected; respond only in the access phase.
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+ fanin["cpuif_rd_ack"] = self.signal("PENABLE")
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+ fanin["cpuif_rd_err"] = self.signal("PENABLE")
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  else:
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  fanin["cpuif_rd_ack"] = self.signal("PREADY", node, "i")
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  fanin["cpuif_rd_err"] = self.signal("PSLVERR", node, "i")
{peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/src/peakrdl_busdecoder.egg-info/PKG-INFO RENAMED
@@ -1,6 +1,6 @@
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  Metadata-Version: 2.4
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  Name: peakrdl-busdecoder
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- Version: 0.7.1
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+ Version: 0.7.2
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  Summary: Generate a SystemVerilog bus decoder from SystemRDL for splitting CPU interfaces to multiple sub-address spaces
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  Author: Arnav Sacheti
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  License: LGPLv3
{peakrdl_busdecoder-0.7.1 → peakrdl_busdecoder-0.7.2}/uv.lock RENAMED
@@ -540,7 +540,7 @@ wheels = [
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  [[package]]
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  name = "peakrdl-busdecoder"
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- version = "0.7.1"
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+ version = "0.7.2"
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  source = { editable = "." }
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  dependencies = [
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  { name = "jinja2" },