ordec 0.1.0__tar.gz

ordec-0.1.0/.gitignore

@@ -0,0 +1,9 @@
+__pycache__
+*.egg-info
+.ipynb_checkpoints
+.hypothesis
+.coverage
+.idea/
+*.ipynb
+*.swp
+dist/

ordec-0.1.0/LICENSE.txt

@@ -0,0 +1,202 @@
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ordec-0.1.0/MANIFEST.in

@@ -0,0 +1,6 @@
+recursive-exclude .gitignore
+exclude .readthedocs.yaml
+exclude base.Dockerfile
+exclude Dockerfile
+exclude .dockerignore
+prune .github

ordec-0.1.0/PKG-INFO

@@ -0,0 +1,70 @@
+Metadata-Version: 2.4
+Name: ordec
+Version: 0.1.0
+Summary: ORDeC
+Maintainer-email: Tobias Kaiser <kaiser@tu-berlin.de>
+Project-URL: Homepage, https://github.com/tub-msc/ordec
+Project-URL: Documentation, https://ordec.readthedocs.io
+Classifier: Programming Language :: Python :: 3
+Requires-Python: >=3.6
+Description-Content-Type: text/markdown
+License-File: LICENSE.txt
+Requires-Dist: pyrsistent>=0.18.1
+Requires-Dist: lark>=1.1.5
+Requires-Dist: astor>=0.8.1
+Requires-Dist: numpy>=1.24.2
+Requires-Dist: scipy>=1.10.1
+Requires-Dist: atpublic>=6.0.1
+Requires-Dist: websockets>=15.0.1
+Requires-Dist: tabulate>=0.8.9
+Provides-Extra: test
+Requires-Dist: pytest>=7.2.1; extra == "test"
+Requires-Dist: pytest-cov>=4.0.0; extra == "test"
+Provides-Extra: extra
+Requires-Dist: black>=23.1.0; extra == "extra"
+Dynamic: license-file
+
+![ORDeC](docs/ordec_logo.svg)
+
+**ORDeC** (Open Rapid Design Composer) is an open-source **custom IC design platform**. Its goal is to provide an accessible and streamlined interface to design and analyze analog, mixed-signal and custom digital integrated circuits from schematic to layout. ORDeC consists of:
+
+- the ORD hardware description language (HDL) for design entry,
+- a data model and data structures for representing IC design data (such as schematics),
+- external tool integration (e.g. to Ngspice for simulation),
+- a web interface for immediate graphical feedback during the design process.
+
+ORDeC is developed by the [Mixed Signal Circuit Design Group](https://www.tu.berlin/msc) at Technische Universität Berlin. 
+
+The development of ORDeC is currently at an early, experimental stage. The main branch of this repository provides a **working demo of some basic features and ideas**:
+
+## Getting Started
+
+The easiest way to get started is via Docker:
+
+```
+docker run --rm -p 127.0.0.1:8100:8100 -it ghcr.io/tub-msc/ordec:latest
+```
+
+Then, visit http://localhost:8100 to access the web interface and try out examples.
+
+![Web interface screenshot](docs/screenshot_demo.png)
+
+Further documentation is located in the *docs/* folder and is available online: https://ordec.readthedocs.io/
+
+## Motivation
+
+ORDeC's goal is to provide an accessible and streamlined interface to design and analyze analog, mixed-signal and custom digital integrated circuits from schematic to layout.
+
+Established open-source interfaces for IC design are mostly based on old-fashioned technologies (Tcl/Tk, C etc.) and lack a coherent experience across design stages such as schematic entry, simulation and layout. ORDeC offers a hardware description language (HDL) and interactive web interface across design stages. In the future, a public web-based ORDeC instance might make it possible to get started in custom IC design without any local setup. ORDeC's core is written in Python and is designed to make it easy to analyze and transform design data.
+
+Why a new HDL instead of a WYSIWYG interface? The motivation is to make custom IC design more software-like. Design data is made transparent and suitable for software-style version control (e.g. Git), which improves maintainability and makes it possible to adapt workflows from software engineering.
+
+Further goals of ORDeC are: built-in support for open PDKs, and visualizing silicon area and energy efficiency as sustainability design parameters. 
+
+## Contact
+
+Questions and feedback via GitHub issues are welcome! Alternatively, feel free to email Tobias Kaiser (kaiser@tu-berlin.de).
+
+## Acknowledgements
+
+This work is supported by the German Federal Ministry of Research, Technology and Space (BMFTR) under grant [16ME0996 (DI-ORDeC)](https://www.elektronikforschung.de/projekte/di-ordec).

ordec-0.1.0/README.md

@@ -0,0 +1,44 @@
+![ORDeC](docs/ordec_logo.svg)
+
+**ORDeC** (Open Rapid Design Composer) is an open-source **custom IC design platform**. Its goal is to provide an accessible and streamlined interface to design and analyze analog, mixed-signal and custom digital integrated circuits from schematic to layout. ORDeC consists of:
+
+- the ORD hardware description language (HDL) for design entry,
+- a data model and data structures for representing IC design data (such as schematics),
+- external tool integration (e.g. to Ngspice for simulation),
+- a web interface for immediate graphical feedback during the design process.
+
+ORDeC is developed by the [Mixed Signal Circuit Design Group](https://www.tu.berlin/msc) at Technische Universität Berlin. 
+
+The development of ORDeC is currently at an early, experimental stage. The main branch of this repository provides a **working demo of some basic features and ideas**:
+
+## Getting Started
+
+The easiest way to get started is via Docker:
+
+```
+docker run --rm -p 127.0.0.1:8100:8100 -it ghcr.io/tub-msc/ordec:latest
+```
+
+Then, visit http://localhost:8100 to access the web interface and try out examples.
+
+![Web interface screenshot](docs/screenshot_demo.png)
+
+Further documentation is located in the *docs/* folder and is available online: https://ordec.readthedocs.io/
+
+## Motivation
+
+ORDeC's goal is to provide an accessible and streamlined interface to design and analyze analog, mixed-signal and custom digital integrated circuits from schematic to layout.
+
+Established open-source interfaces for IC design are mostly based on old-fashioned technologies (Tcl/Tk, C etc.) and lack a coherent experience across design stages such as schematic entry, simulation and layout. ORDeC offers a hardware description language (HDL) and interactive web interface across design stages. In the future, a public web-based ORDeC instance might make it possible to get started in custom IC design without any local setup. ORDeC's core is written in Python and is designed to make it easy to analyze and transform design data.
+
+Why a new HDL instead of a WYSIWYG interface? The motivation is to make custom IC design more software-like. Design data is made transparent and suitable for software-style version control (e.g. Git), which improves maintainability and makes it possible to adapt workflows from software engineering.
+
+Further goals of ORDeC are: built-in support for open PDKs, and visualizing silicon area and energy efficiency as sustainability design parameters. 
+
+## Contact
+
+Questions and feedback via GitHub issues are welcome! Alternatively, feel free to email Tobias Kaiser (kaiser@tu-berlin.de).
+
+## Acknowledgements
+
+This work is supported by the German Federal Ministry of Research, Technology and Space (BMFTR) under grant [16ME0996 (DI-ORDeC)](https://www.elektronikforschung.de/projekte/di-ordec).

ordec-0.1.0/docs/.gitignore

@@ -0,0 +1 @@
+_build

ordec-0.1.0/docs/Makefile

@@ -0,0 +1,23 @@
+# Minimal makefile for Sphinx documentation
+#
+
+# You can set these variables from the command line, and also
+# from the environment for the first two.
+SPHINXOPTS    ?=
+SPHINXBUILD   ?= sphinx-build
+SOURCEDIR     = .
+BUILDDIR      = _build
+
+.PHONY: default
+default: html
+
+# Put it first so that "make" without argument is like "make help".
+help:
+	@$(SPHINXBUILD) -M help "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)
+
+.PHONY: help Makefile
+
+# Catch-all target: route all unknown targets to Sphinx using the new
+# "make mode" option.  $(O) is meant as a shortcut for $(SPHINXOPTS).
+%: Makefile
+	@$(SPHINXBUILD) -M $@ "$(SOURCEDIR)" "$(BUILDDIR)" $(SPHINXOPTS) $(O)

ordec-0.1.0/docs/cell_lib/base.py

@@ -0,0 +1,31 @@
+# ---
+# jupyter:
+#   jupytext:
+#     text_representation:
+#       extension: .py
+#       format_name: light
+#       format_version: '1.5'
+#       jupytext_version: 1.16.4
+#   kernelspec:
+#     display_name: Python 3 (ipykernel)
+#     language: python
+#     name: python3
+# ---
+
+# # Base
+#
+# This page shows some of ORDeC's built-in design library:
+
+from ordec import lib
+
+# ## Transistors
+
+lib.Nmos().symbol
+
+lib.Pmos().symbol
+
+# ## Inverter
+
+lib.Inv().symbol
+
+lib.Inv().schematic

ordec-0.1.0/docs/cell_lib/index.rst

@@ -0,0 +1,18 @@
+Cell Library
+============
+
+.. toctree::
+   :maxdepth: 2
+   :caption: Contents:
+
+   base
+
+IHP SG13G2
+----------
+
+*Coming soon.*
+
+SKY130
+------
+
+*Coming soon.*

ordec-0.1.0/docs/conf.py

@@ -0,0 +1,52 @@
+# Configuration file for the Sphinx documentation builder.
+#
+# For the full list of built-in configuration values, see the documentation:
+# https://www.sphinx-doc.org/en/master/usage/configuration.html
+
+# -- Project information -----------------------------------------------------
+# https://www.sphinx-doc.org/en/master/usage/configuration.html#project-information
+
+project = 'ORDeC'
+copyright = '2025, ORDeC Contributors'
+author = 'ORDeC Contributors'
+
+# -- General configuration ---------------------------------------------------
+# https://www.sphinx-doc.org/en/master/usage/configuration.html#general-configuration
+
+extensions = [
+    'sphinx_rtd_theme',
+    'sphinx.ext.autodoc',
+    'sphinx.ext.napoleon',
+    #'jupyter_sphinx',
+    #'nbsphinx',
+    "myst_nb",
+]
+
+templates_path = ['_templates']
+exclude_patterns = ['_build', 'Thumbs.db', '.DS_Store', 'conf.py', 'data_model.rst']
+
+napoleon_use_ivar = True
+
+autodoc_default_options = {
+    'show-inheritance': True,
+}
+autodoc_class_signature = 'separated'
+
+
+# -- Options for HTML output -------------------------------------------------
+# https://www.sphinx-doc.org/en/master/usage/configuration.html#options-for-html-output
+
+#html_theme = 'python_docs_theme'
+html_theme = 'sphinx_rtd_theme'
+#html_theme = 'alabaster'
+html_static_path = ['_static']
+
+
+import jupytext
+
+#nbsphinx_custom_formats = {
+#    '.py': lambda s: jupytext.reads(s, '.py'),
+#}
+nb_custom_formats = {
+  ".py": ["jupytext.reads", {"fmt": "py"}]
+}

ordec-0.1.0/docs/dev/containers_and_ci.rst

@@ -0,0 +1,33 @@
+.. _containers_and_ci:
+
+Containers & continuous integration
+===================================
+
+For containerization and continuous integration, Docker and GitHub Actions are used.
+
+ordec-base Docker image
+-----------------------
+
+The custom base image `ordec-base <https://github.com/tub-msc/ordec/pkgs/container/ordec-base>`_ is used for building and testing ORDeC in the subsequent stages. It contains all (or most) dependencies, including a custom Ngspice build. In the future, PDKs and OpenVAF will also be included in the base image.
+
+This base image prevents having to recompile the fixed environment too often. Additionally, it is somwhat optimized for size (e.g., build dependencies of ngspice are not in final image).
+
+This image is automatically built through *.github/workflows/base.yaml* using *base.Dockerfile*. It can of course also be built manually using *base.Dockerfile*.
+
+ordec Docker image
+------------------
+
+The `ordec <https://github.com/tub-msc/ordec/pkgs/container/ordec>`_ image is built on top of ordec-base. Its default run command starts the web interface on port 8100. This image makes it possible to install + run ORDeC through a single docker command, as is described in :ref:`getting_started` and the readme file.
+
+This image is automatically built through *.github/workflows/build.yaml* using *Dockerfile*. It can also be built manually using this *Dockerfile*.
+
+Automated pytest runs
+---------------------
+
+Pytest is run automatically through *.github/workflows/tests.yaml*. Here, ordec-base is used as container in which the tests are run.
+
+There are some slight mismatches between this GitHub action and the ordec-base image (maybe this can be addressed in the future):
+
+- While ordec-base uses the *app* user, GitHub actions seem to only work properly as the *root* user inside of a container.
+- The user venv */home/app/venv*, where parts of the dependencies are installed, is reused by root.
+- The directory */home/app/ordec*, where ORDeC is "supposed to go" in the logic of ordec-base, is ignored here.

ordec-0.1.0/docs/dev/design_decisions.rst

@@ -0,0 +1,13 @@
+Design Decisions
+================
+
+We collect some past and future design decisions here.
+
+- ORDeC is organized as a **monorepo**. Inside it, things should be as modular as possible.
+- Use ORDB for internal data as much as possible. Avoid YAML and flat string keys.
+- Support common exchange formats like Verilog, Spice netlists, DEF/LEF and GDS.
+- Design tasks should be pure functions.
+- The native design entry format (ORD/Python) is separate from the native exchange format (serialized ORDB). Foreign exchange formats can be used for both purposes, design entry and exchange.
+- Do not generate code for the user. Eliminate the need for boilerplate and overly verbose code.
+- The ORD or Python design input should act as single source of truth.
+- Try to minimize external dependencies, especially if they are large and at risk of becoming unmaintained.

ordec-0.1.0/docs/dev/index.rst

@@ -0,0 +1,12 @@
+Developer's Corner
+==================
+
+.. toctree::
+   :maxdepth: 2
+   :caption: Contents:
+
+   containers_and_ci
+   ipython_integration
+   ngspice_pipe_mode
+   design_decisions
+   todos

ordec-0.1.0/docs/dev/ipython_integration.rst

@@ -0,0 +1,13 @@
+IPython integration
+-------------------
+
+*IPython.display.SVG* leads to problems, in my case with font rendering. This is a known problem (see `IPython issue #1866`_ and `IPython issue #700`_). The underlying problem is that the provided data is directly embedded into Jupyter's DOM. One solution seems to be to mess around with the XML (proposed in `IPython issue #700`_).
+
+The working solution is to use a *\<img\>* tag and embed the SVG as Base64 data url. This is now done by through the **\_repr_html\_** method of selected View classes.
+
+An earlier, more explicit approach was to write::
+
+  IPython.display.Image(url=svg2url(render_schematic(lib.Inverter().schematic)))
+
+.. _`IPython issue #700`: https://github.com/ipython/ipython/issues/700
+.. _`IPython issue #1866`: https://github.com/ipython/ipython/issues/1866/

ordec-0.1.0/docs/dev/ngspice_pipe_mode.rst

@@ -0,0 +1,36 @@
+Ngspice pipe mode
+=================
+
+sim2 currently uses Ngspice in pipe mode (:code:`ngspice -p`). Unfortunately, Ngspice has slightly different I/O behavior depending on whether it is built with libreadline, libedit or neither.
+
+Behavior with neither libreadline nor libedit::
+
+    $ echo -e "echo hello\necho world\nquit" | /home/app/ngspice/install_min/bin/ngspice -p 
+    ngspice 1 -> hello
+    ngspice 2 -> world
+    ngspice 3 -> ngspice-44.2 done
+
+Behavior with libreadline::
+
+    $ echo -e "echo hello\necho world\nquit" | /home/app/ngspice/install_readline/bin/ngspice -p 
+    ngspice 1 -> echo hello
+    hello
+    ngspice 2 -> echo world
+    world
+    ngspice 3 -> quit
+    ngspice-44.2 done
+
+Behavior with libedit::
+
+    $ echo -e "echo hello\necho world\nquit" | /home/app/ngspice/install_editline/bin/ngspice -p 
+    hello
+    world
+    ngspice-44.2 done
+
+These differences are addressed in ordec/sim2/ngspice.py.
+
+TODO: Add automated testing for this in container, such as::
+
+    PATH=/home/app/ngspice/install_min/bin:$PATH_ORIG pytest tests/test_sim2.py
+    PATH=/home/app/ngspice/install_readline/bin:$PATH_ORIG pytest tests/test_sim2.py
+    PATH=/home/app/ngspice/install_editline/bin:$PATH_ORIG pytest tests/test_sim2.py

ordec-0.1.0/docs/dev/todos.rst

@@ -0,0 +1,57 @@
+Todos
+=====
+
+ORDB
+----
+
+- Add tree() method to Cursor that descends using NPath
+- Implement subgraph directory index + Cursor.iterdir()
+- Attr has outgrown dataclass, so do it manually.
+- Add test for legacy and new @generate
+- (Add test for cursormethod)
+- Invert Cursor-Node relationship, this should make the types more natural. Also, this makes cursormethod the default.
+- External references:
+
+  - new Attr subclass for subgraph reference?
+  - add some kind of index to detect DanglingExternalRefs either on adding the ExternalRef or when updating the subgraph reference Attr.
+  - do we need any other indices for external references?
+
+- LocalRef type checking (refs_ntype)
+- Cursor deletion:
+  
+  - delete path + node + "dependent" nodes?
+  - Stuff that gets added together (MultiInserter) should also be deleted together?
+  - complex example: PolyVec2R
+
+- Test indices
+  
+  - in some limited testcases with updates and removals that affect indices
+  - flag in SubgraphUpdater to track index changes (?)
+  - check whether rebuilding subgraph from node list leds to identical index
+
+- Type checking for Subgraph
+
+  - currently we must check isinstance(s, Subgraph) and isinstance(s.node, MyHead)
+  - we could add a metaclass to Subgraph and override its issubclass handler
+
+- Branching and merging of Subgraphs
+- SimHierarchy: do not duplicates the nets of Schematics and Symbols
+- Profiling
+
+SVG Renderer
+------------
+
+- understand how to properly compute the scaling factor for text instead of just guessing a value (0.045).
+- in the medium term, make the symbols more compact overall and put params outside symbol. then, we can also drop the condensed font hack.
+- can we deliver the font to the browser so that the user does not need to have inconsolate installed and the svg does not need to embed the font (some sort of browser font inheritance from the html page to the svg context)?
+- firefox and cairosvg render fonts slightly differently (baseline). figure out whether an alternative dominant-baseline setting could fix this.
+
+base.Dockerfile
+---------------
+
+Big dependencies (look into these to shrink base image further):
+
+- scipy
+- numpy
+- ace-builds
+- npm