nrflash 1.0.0__tar.gz

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nrflash-1.0.0/PKG-INFO ADDED
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+ Metadata-Version: 2.4
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+ Name: nrflash
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+ Version: 1.0.0
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+ Summary: Termux-native .bin flasher for ESP32/ESP8266 boards — no root, no esptool.py subprocess, no pyserial.
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+ Author: 7wp81x
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+ License-Expression: Apache-2.0
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+ Project-URL: Homepage, https://github.com/7wp81x/Termux-ESP-Flasher
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+ Project-URL: Repository, https://github.com/7wp81x/Termux-ESP-Flasher
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+ Project-URL: Issues, https://github.com/7wp81x/Termux-ESP-Flasher/issues
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+ Keywords: esp32,esp8266,termux,flasher,esptool,no-root,android
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+ Classifier: Development Status :: 4 - Beta
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+ Classifier: Environment :: Console
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+ Classifier: Intended Audience :: Developers
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+ Classifier: Operating System :: POSIX :: Linux
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+ Classifier: Operating System :: Android
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+ Classifier: Programming Language :: Python :: 3
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+ Classifier: Programming Language :: Python :: 3 :: Only
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+ Classifier: Topic :: Software Development :: Embedded Systems
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+ Classifier: Topic :: System :: Hardware
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+ Requires-Python: >=3.8
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+ Description-Content-Type: text/markdown
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+ License-File: LICENSE-APACHE
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+ License-File: STUB_LICENSE-APACHE
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+ License-File: STUB_LICENSE-MIT
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+ Requires-Dist: pyusb>=1.2.1
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+ Dynamic: license-file
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+
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+ # Termux-ESP-Flasher
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+
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+ A Termux-native `.bin` flasher for ESP32 boards — no root, no
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+ `esptool.py` subprocess, no pyserial.
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+
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+ Covers **two** device families, auto-detected from the USB VID:PID:
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+
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+ - **Native USB CDC** — ESP32-S3 / C3 / S2 (`303A:1001` / `303A:0002`).
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+ Talks directly to the chip's USB-Serial-JTAG peripheral; bootloader
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+ entry/exit is driven by `cdc_reset.py`.
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+ - **UART bridge** — classic ESP32 and ESP8266 devkits behind a
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+ CP2102, CH340/CH340G, CH9102, or FTDI FT232 bridge chip. The bridge
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+ is opened over raw USB (same fd-wrapping as the native path — Termux
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+ never gives you a `/dev/ttyUSB*` node without root, so this isn't
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+ optional) and its DTR/RTS lines are pulsed in the classic GPIO0+EN
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+ pattern by `uart_reset.py`.
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+
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+ Both paths upload the real ESP-IDF RAM stub for faster block writes, and
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+ both fall back automatically to the plain ROM bootloader if the stub
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+ fails to load for any reason.
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+
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+ ## Why this exists instead of just running esptool.py
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+
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+ `esptool.py` talks over pyserial, which expects a `/dev/ttyUSB*` or
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+ `/dev/ttyACM*` node. On stock no-root Termux there often isn't one —
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+ Android hands USB access to apps as a raw file descriptor via
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+ `termux-usb`, not a serial device node. This tool talks straight to the
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+ USB endpoints (and, for UART-bridge boards, straight to the bridge
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+ chip's own vendor registers) instead of assuming a tty exists.
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+
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+ **If you're on a desktop/laptop Linux box with a real `/dev/ttyUSB*`
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+ node, just use real `esptool.py` — it's more battle-tested.** This tool
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+ exists for the no-root-Termux gap esptool's pyserial transport can't
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+ reach.
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+
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+ ## What's supported
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+
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+ - **Chip auto-detection.** `--chip` is optional on `probe`, `write`, and
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+ `verify` — omit it and the tool syncs with the ROM bootloader, reads
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+ the chip's magic-value register, and picks the right chip for you.
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+ Pass `--chip` explicitly to override (still required for
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+ `erase-info`, which never touches hardware).
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+ - **Stub loader.** Both native-USB and UART-bridge sessions upload the
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+ real ESP-IDF RAM stub after syncing, switching from 1 KiB ROM-only
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+ blocks to 16 KiB stub blocks. Falls back to ROM-only if the stub
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+ upload doesn't succeed for some reason — flashing still works, just
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+ slower.
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+ - **Automatic baud renegotiation on UART-bridge boards.** Once the stub
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+ is running, the tool steps up through 921600 → 460800 → 230400 baud,
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+ verifying each one actually holds (a cheap `sync()`) before trusting
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+ it. If a candidate rate doesn't hold, it physically re-enters the ROM
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+ bootloader and rebuilds the whole session at 115200 before trying the
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+ next slower candidate — a bad guess costs a couple seconds, not the
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+ whole flash. Settles on whatever your specific board/cable can
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+ actually sustain, or stays at 115200 if nothing higher works. Native
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+ USB CDC boards skip this entirely — there's no real UART clock
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+ underneath USB CDC, so baud rate doesn't mean anything there.
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+ - **Live progress.** The flash progress bar streams in real time on the
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+ no-root Termux fd-bootstrap path — earlier builds buffered progress
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+ updates invisibly until the transfer finished, then dumped the whole
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+ bar at once, which looked like a stall.
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+ - **Multi-file writes in one session.** `write` accepts one or more
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+ `OFFSET:FILE` pairs and flashes all of them under a single USB
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+ permission prompt / bootloader handshake.
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+
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+ ## Scope / limitations (read before filing an issue)
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+
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+ - **No full-chip erase command.** `erase-info` explains why: an erase
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+ that gets interrupted by a flaky OTG connection mid-operation has no
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+ recovery path. Flash a full image (bootloader + partition table +
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+ app) at the correct offsets instead of erasing first. `write --erase`
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+ will erase exactly the bytes about to be overwritten via
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+ `ERASE_REGION` if the ROM supports it, falling back silently to
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+ `flash_begin`'s own per-block erase otherwise.
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+ - **Auto-detection is a best-effort heuristic**, not a guarantee for
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+ every silicon revision — it reads the chip magic value at a register
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+ address that's held true across ESP32/S2/S3/C3 for years, but an
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+ unrecognized value means "pass `--chip` explicitly," not a guess.
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+ - **Stub data is vendored for more chips than are currently wired up**
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+ (`esp32c2`, `c5`, `c6`, `c61`, `h2`, `h4`, `p4`, `s31` all have stub
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+ binaries already sitting in `stub_flasher_data.py`), but
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+ `CHIP_PARAMS`/`KNOWN_MAGIC`/`CHIP_CHOICES` only cover `esp32`,
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+ `esp8266`, `esp32s2`, `esp32s3`, `esp32c3` today. Wiring up one of the
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+ others means adding its real chip-magic value and SPI-attach params —
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+ open an issue (or ask) with the specific chip if you need one.
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+
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+ ## Install
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+
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+ ```bash
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+ pkg update && pkg install python termux-api libusb
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+ pip install nrflash
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+ ```
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+
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+ `pip install nrflash` pulls in `pyusb` automatically. `termux-api` and
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+ `libusb` are system packages `pip` can't install for you — they still need
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+ `pkg install`, and the **Termux:API** app from
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+ [F-Droid](https://f-droid.org) (not the Play Store) must be installed
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+ separately for the no-root USB-permission flow to work at all.
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+
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+ <details>
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+ <summary>Installing from source instead</summary>
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+
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+ ```bash
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+ git clone https://github.com/7wp81x/Termux-ESP-Flasher
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+ cd Termux-ESP-Flasher
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+ pip install .
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+ ```
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+ </details>
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+
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+ ## Usage
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+
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+ ```bash
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+ chmod +x nrflash
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+
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+ # --chip is optional everywhere except erase-info - omit it to auto-detect
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+ ./nrflash probe
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+ ./nrflash write --offset 0x0 firmware.bin
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+
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+ # Still works if you want to force a specific chip
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+ ./nrflash write --chip esp32c3 --offset 0x0 firmware.bin
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+
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+ # Flash + MD5-verify against the device afterward
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+ ./nrflash write --chip esp32s3 --offset 0x0 firmware.bin --verify
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+
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+ # Flash a sub-image at a partition offset (e.g. app partition only)
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+ ./nrflash write --offset 0x10000 app.bin
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+
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+ # Flash bootloader + partition table + app in one session
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+ ./nrflash write 0x0:bootloader.bin 0x8000:partitions.bin 0x10000:app.bin
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+
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+ # Stand-alone MD5 check against a file already on disk
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+ ./nrflash verify --chip esp32c3 --offset 0x0 firmware.bin
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+
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+ # Explicitly erase the write range first via ERASE_REGION
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+ ./nrflash write --offset 0x0 firmware.bin --erase
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+
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+ # Stay in the bootloader after flashing instead of rebooting
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+ ./nrflash write --offset 0x0 firmware.bin --no-reboot
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+ ```
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+
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+ First run on no-root Termux pops the same USB permission dialog every
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+ time — tap **OK**. The permission persists until you unplug.
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+
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+ ## What actually flashes — single binary vs. esptool's three images
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+
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+ Real `esptool.py write_flash` usually takes **three** files at three
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+ offsets (bootloader, partition table, app), e.g.:
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+
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+ ```
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+ 0x0 bootloader.bin
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+ 0x8000 partition-table.bin
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+ 0x10000 app.bin
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+ ```
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+
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+ `nrflash write` can take all three in one call (see the multi-file
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+ example above), or one file per invocation if you prefer. If your build
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+ only produces a single merged/combined `.bin` (PlatformIO can do this —
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+ check for a `firmware.factory.bin` or similar after `pio run`), one call
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+ at `0x0` is all you need.
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+
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+ ## How bootloader entry works
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+
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+ - **UART-bridge boards** (CP2102/CH340/CH9102/FTDI) have real DTR/RTS
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+ lines wired into EN/BOOT. `usb_device.py`'s `init_uart_bridge()`
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+ configures the bridge's line coding and baud divisor via its own
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+ vendor control transfers, then `uart_reset.py` pulses DTR/RTS in the
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+ classic auto-reset pattern.
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+ - **Native USB CDC boards** have no bridge chip — the chip's internal
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+ USB-Serial-JTAG peripheral watches the CDC class's
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+ `SET_CONTROL_LINE_STATE` DTR/RTS bits in hardware and maps specific
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+ transitions to an internal EN/BOOT reset, the software-only
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+ equivalent of the same trick. That sequence lives in `cdc_reset.py`,
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+ separate from `usb_device.py`'s bridge-chip logic since the two have
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+ nothing in common at the wire level.
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+
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+ ## Files
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+
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+ ```
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+ src/nrflash/
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+ __init__.py package version
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+ __main__.py enables `python3 -m nrflash.cli`
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+ cli.py CLI: argv parsing, fd bootstrap, flash/verify/probe commands
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+ rom_loader.py SLIP framing + ROM bootloader command/response protocol,
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+ chip auto-detection, baud-change command
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+ usb_device.py USB backend detection, fd wrapping, UART-bridge register
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+ init/baud reprogramming, endpoint discovery
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+ cdc_reset.py native-USB-CDC bootloader entry/exit (DTR/RTS bit tricks)
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+ uart_reset.py UART-bridge bootloader entry/exit (DTR/RTS pulse pattern)
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+ stub_flasher_data.py vendored ESP-IDF RAM stub binaries (Apache-2.0/MIT, Espressif)
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+ ```
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+
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+ `pip install nrflash` puts a `nrflash` console script on `PATH` — no
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+ `chmod +x`, no flat-directory requirement. Log/state files live under
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+ `~/.nrflash` (override with `NRFLASH_DATA_DIR`) rather than next to the
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+ installed package, since site-packages isn't guaranteed writable.
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+
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+ ## Troubleshooting
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+
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+ **`probe` reports no response from bootloader**
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+ Some clone boards need the physical BOOT button held while plugging in,
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+ or the CH340/CP2102/FTDI wired to EN+GPIO0 for auto-reset to work at
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+ all. Try unplugging/replugging the OTG cable once before assuming it's a
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+ protocol problem.
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+
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+ **Flashing is slow / progress bar looks stuck**
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+ On UART-bridge boards, check the log for a `Baud rate raised to ... and
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+ verified` line — if it's missing or stuck at 115200, your specific
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+ board/cable couldn't hold anything higher and the tool already fell back
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+ automatically. If the progress bar itself looks frozen and then jumps to
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+ 100% all at once, make sure you're on a build with the live-progress fix
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+ (see "What's supported" above) rather than an older buffered-tail-thread
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+ build.
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+
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+ **`Verify MISMATCH` after a successful-looking write**
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+ Don't trust a partial flash. Re-run `write --verify` rather than
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+ assuming the device is fine — a flaky OTG link or an unstable baud rate
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+ can drop bytes mid-transfer in a way that still returns "success" status
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+ on a given block.
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+
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+ ## Legal
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+
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+ For use on hardware you own. Flashing arbitrary firmware to a device you
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+ don't own or have written permission to modify can violate warranty
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+ terms or, depending on the device and jurisdiction, the law.
@@ -0,0 +1,224 @@
1
+ # Termux-ESP-Flasher
2
+
3
+ A Termux-native `.bin` flasher for ESP32 boards — no root, no
4
+ `esptool.py` subprocess, no pyserial.
5
+
6
+ Covers **two** device families, auto-detected from the USB VID:PID:
7
+
8
+ - **Native USB CDC** — ESP32-S3 / C3 / S2 (`303A:1001` / `303A:0002`).
9
+ Talks directly to the chip's USB-Serial-JTAG peripheral; bootloader
10
+ entry/exit is driven by `cdc_reset.py`.
11
+ - **UART bridge** — classic ESP32 and ESP8266 devkits behind a
12
+ CP2102, CH340/CH340G, CH9102, or FTDI FT232 bridge chip. The bridge
13
+ is opened over raw USB (same fd-wrapping as the native path — Termux
14
+ never gives you a `/dev/ttyUSB*` node without root, so this isn't
15
+ optional) and its DTR/RTS lines are pulsed in the classic GPIO0+EN
16
+ pattern by `uart_reset.py`.
17
+
18
+ Both paths upload the real ESP-IDF RAM stub for faster block writes, and
19
+ both fall back automatically to the plain ROM bootloader if the stub
20
+ fails to load for any reason.
21
+
22
+ ## Why this exists instead of just running esptool.py
23
+
24
+ `esptool.py` talks over pyserial, which expects a `/dev/ttyUSB*` or
25
+ `/dev/ttyACM*` node. On stock no-root Termux there often isn't one —
26
+ Android hands USB access to apps as a raw file descriptor via
27
+ `termux-usb`, not a serial device node. This tool talks straight to the
28
+ USB endpoints (and, for UART-bridge boards, straight to the bridge
29
+ chip's own vendor registers) instead of assuming a tty exists.
30
+
31
+ **If you're on a desktop/laptop Linux box with a real `/dev/ttyUSB*`
32
+ node, just use real `esptool.py` — it's more battle-tested.** This tool
33
+ exists for the no-root-Termux gap esptool's pyserial transport can't
34
+ reach.
35
+
36
+ ## What's supported
37
+
38
+ - **Chip auto-detection.** `--chip` is optional on `probe`, `write`, and
39
+ `verify` — omit it and the tool syncs with the ROM bootloader, reads
40
+ the chip's magic-value register, and picks the right chip for you.
41
+ Pass `--chip` explicitly to override (still required for
42
+ `erase-info`, which never touches hardware).
43
+ - **Stub loader.** Both native-USB and UART-bridge sessions upload the
44
+ real ESP-IDF RAM stub after syncing, switching from 1 KiB ROM-only
45
+ blocks to 16 KiB stub blocks. Falls back to ROM-only if the stub
46
+ upload doesn't succeed for some reason — flashing still works, just
47
+ slower.
48
+ - **Automatic baud renegotiation on UART-bridge boards.** Once the stub
49
+ is running, the tool steps up through 921600 → 460800 → 230400 baud,
50
+ verifying each one actually holds (a cheap `sync()`) before trusting
51
+ it. If a candidate rate doesn't hold, it physically re-enters the ROM
52
+ bootloader and rebuilds the whole session at 115200 before trying the
53
+ next slower candidate — a bad guess costs a couple seconds, not the
54
+ whole flash. Settles on whatever your specific board/cable can
55
+ actually sustain, or stays at 115200 if nothing higher works. Native
56
+ USB CDC boards skip this entirely — there's no real UART clock
57
+ underneath USB CDC, so baud rate doesn't mean anything there.
58
+ - **Live progress.** The flash progress bar streams in real time on the
59
+ no-root Termux fd-bootstrap path — earlier builds buffered progress
60
+ updates invisibly until the transfer finished, then dumped the whole
61
+ bar at once, which looked like a stall.
62
+ - **Multi-file writes in one session.** `write` accepts one or more
63
+ `OFFSET:FILE` pairs and flashes all of them under a single USB
64
+ permission prompt / bootloader handshake.
65
+
66
+ ## Scope / limitations (read before filing an issue)
67
+
68
+ - **No full-chip erase command.** `erase-info` explains why: an erase
69
+ that gets interrupted by a flaky OTG connection mid-operation has no
70
+ recovery path. Flash a full image (bootloader + partition table +
71
+ app) at the correct offsets instead of erasing first. `write --erase`
72
+ will erase exactly the bytes about to be overwritten via
73
+ `ERASE_REGION` if the ROM supports it, falling back silently to
74
+ `flash_begin`'s own per-block erase otherwise.
75
+ - **Auto-detection is a best-effort heuristic**, not a guarantee for
76
+ every silicon revision — it reads the chip magic value at a register
77
+ address that's held true across ESP32/S2/S3/C3 for years, but an
78
+ unrecognized value means "pass `--chip` explicitly," not a guess.
79
+ - **Stub data is vendored for more chips than are currently wired up**
80
+ (`esp32c2`, `c5`, `c6`, `c61`, `h2`, `h4`, `p4`, `s31` all have stub
81
+ binaries already sitting in `stub_flasher_data.py`), but
82
+ `CHIP_PARAMS`/`KNOWN_MAGIC`/`CHIP_CHOICES` only cover `esp32`,
83
+ `esp8266`, `esp32s2`, `esp32s3`, `esp32c3` today. Wiring up one of the
84
+ others means adding its real chip-magic value and SPI-attach params —
85
+ open an issue (or ask) with the specific chip if you need one.
86
+
87
+ ## Install
88
+
89
+ ```bash
90
+ pkg update && pkg install python termux-api libusb
91
+ pip install nrflash
92
+ ```
93
+
94
+ `pip install nrflash` pulls in `pyusb` automatically. `termux-api` and
95
+ `libusb` are system packages `pip` can't install for you — they still need
96
+ `pkg install`, and the **Termux:API** app from
97
+ [F-Droid](https://f-droid.org) (not the Play Store) must be installed
98
+ separately for the no-root USB-permission flow to work at all.
99
+
100
+ <details>
101
+ <summary>Installing from source instead</summary>
102
+
103
+ ```bash
104
+ git clone https://github.com/7wp81x/Termux-ESP-Flasher
105
+ cd Termux-ESP-Flasher
106
+ pip install .
107
+ ```
108
+ </details>
109
+
110
+ ## Usage
111
+
112
+ ```bash
113
+ chmod +x nrflash
114
+
115
+ # --chip is optional everywhere except erase-info - omit it to auto-detect
116
+ ./nrflash probe
117
+ ./nrflash write --offset 0x0 firmware.bin
118
+
119
+ # Still works if you want to force a specific chip
120
+ ./nrflash write --chip esp32c3 --offset 0x0 firmware.bin
121
+
122
+ # Flash + MD5-verify against the device afterward
123
+ ./nrflash write --chip esp32s3 --offset 0x0 firmware.bin --verify
124
+
125
+ # Flash a sub-image at a partition offset (e.g. app partition only)
126
+ ./nrflash write --offset 0x10000 app.bin
127
+
128
+ # Flash bootloader + partition table + app in one session
129
+ ./nrflash write 0x0:bootloader.bin 0x8000:partitions.bin 0x10000:app.bin
130
+
131
+ # Stand-alone MD5 check against a file already on disk
132
+ ./nrflash verify --chip esp32c3 --offset 0x0 firmware.bin
133
+
134
+ # Explicitly erase the write range first via ERASE_REGION
135
+ ./nrflash write --offset 0x0 firmware.bin --erase
136
+
137
+ # Stay in the bootloader after flashing instead of rebooting
138
+ ./nrflash write --offset 0x0 firmware.bin --no-reboot
139
+ ```
140
+
141
+ First run on no-root Termux pops the same USB permission dialog every
142
+ time — tap **OK**. The permission persists until you unplug.
143
+
144
+ ## What actually flashes — single binary vs. esptool's three images
145
+
146
+ Real `esptool.py write_flash` usually takes **three** files at three
147
+ offsets (bootloader, partition table, app), e.g.:
148
+
149
+ ```
150
+ 0x0 bootloader.bin
151
+ 0x8000 partition-table.bin
152
+ 0x10000 app.bin
153
+ ```
154
+
155
+ `nrflash write` can take all three in one call (see the multi-file
156
+ example above), or one file per invocation if you prefer. If your build
157
+ only produces a single merged/combined `.bin` (PlatformIO can do this —
158
+ check for a `firmware.factory.bin` or similar after `pio run`), one call
159
+ at `0x0` is all you need.
160
+
161
+ ## How bootloader entry works
162
+
163
+ - **UART-bridge boards** (CP2102/CH340/CH9102/FTDI) have real DTR/RTS
164
+ lines wired into EN/BOOT. `usb_device.py`'s `init_uart_bridge()`
165
+ configures the bridge's line coding and baud divisor via its own
166
+ vendor control transfers, then `uart_reset.py` pulses DTR/RTS in the
167
+ classic auto-reset pattern.
168
+ - **Native USB CDC boards** have no bridge chip — the chip's internal
169
+ USB-Serial-JTAG peripheral watches the CDC class's
170
+ `SET_CONTROL_LINE_STATE` DTR/RTS bits in hardware and maps specific
171
+ transitions to an internal EN/BOOT reset, the software-only
172
+ equivalent of the same trick. That sequence lives in `cdc_reset.py`,
173
+ separate from `usb_device.py`'s bridge-chip logic since the two have
174
+ nothing in common at the wire level.
175
+
176
+ ## Files
177
+
178
+ ```
179
+ src/nrflash/
180
+ __init__.py package version
181
+ __main__.py enables `python3 -m nrflash.cli`
182
+ cli.py CLI: argv parsing, fd bootstrap, flash/verify/probe commands
183
+ rom_loader.py SLIP framing + ROM bootloader command/response protocol,
184
+ chip auto-detection, baud-change command
185
+ usb_device.py USB backend detection, fd wrapping, UART-bridge register
186
+ init/baud reprogramming, endpoint discovery
187
+ cdc_reset.py native-USB-CDC bootloader entry/exit (DTR/RTS bit tricks)
188
+ uart_reset.py UART-bridge bootloader entry/exit (DTR/RTS pulse pattern)
189
+ stub_flasher_data.py vendored ESP-IDF RAM stub binaries (Apache-2.0/MIT, Espressif)
190
+ ```
191
+
192
+ `pip install nrflash` puts a `nrflash` console script on `PATH` — no
193
+ `chmod +x`, no flat-directory requirement. Log/state files live under
194
+ `~/.nrflash` (override with `NRFLASH_DATA_DIR`) rather than next to the
195
+ installed package, since site-packages isn't guaranteed writable.
196
+
197
+ ## Troubleshooting
198
+
199
+ **`probe` reports no response from bootloader**
200
+ Some clone boards need the physical BOOT button held while plugging in,
201
+ or the CH340/CP2102/FTDI wired to EN+GPIO0 for auto-reset to work at
202
+ all. Try unplugging/replugging the OTG cable once before assuming it's a
203
+ protocol problem.
204
+
205
+ **Flashing is slow / progress bar looks stuck**
206
+ On UART-bridge boards, check the log for a `Baud rate raised to ... and
207
+ verified` line — if it's missing or stuck at 115200, your specific
208
+ board/cable couldn't hold anything higher and the tool already fell back
209
+ automatically. If the progress bar itself looks frozen and then jumps to
210
+ 100% all at once, make sure you're on a build with the live-progress fix
211
+ (see "What's supported" above) rather than an older buffered-tail-thread
212
+ build.
213
+
214
+ **`Verify MISMATCH` after a successful-looking write**
215
+ Don't trust a partial flash. Re-run `write --verify` rather than
216
+ assuming the device is fine — a flaky OTG link or an unstable baud rate
217
+ can drop bytes mid-transfer in a way that still returns "success" status
218
+ on a given block.
219
+
220
+ ## Legal
221
+
222
+ For use on hardware you own. Flashing arbitrary firmware to a device you
223
+ don't own or have written permission to modify can violate warranty
224
+ terms or, depending on the device and jurisdiction, the law.