nidx-binding 6.9.5.post653__tar.gz → 6.9.5.post655__tar.gz

{nidx_binding-6.9.5.post653 → nidx_binding-6.9.5.post655}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: nidx_binding
-Version: 6.9.5.post653
+Version: 6.9.5.post655
 Classifier: Programming Language :: Rust
 Classifier: Programming Language :: Python :: Implementation :: CPython
 Classifier: Programming Language :: Python :: Implementation :: PyPy

{nidx_binding-6.9.5.post653 → nidx_binding-6.9.5.post655}/nidx_protos/pyproject.toml

@@ -10,7 +10,7 @@ build-backend = "pdm.backend"
 
 [project]
 name = "nidx_protos"
-version = "6.9.5.post653"
+version = "6.9.5.post655"
 license = "AGPL-3.0-or-later"
 description = "Protobuf definitions for nucliadb/nidx"
 authors = [{ name = "Nuclia", email = "nucliadb@nuclia.com" }]

{nidx_binding-6.9.5.post653 → nidx_binding-6.9.5.post655}/nidx_vector/src/hnsw/disk/v1.rs

@@ -264,7 +264,9 @@ impl DiskHnsw for DiskHnswV1 {
                 let cnx_start = edges_start + USIZE_LEN;
                 let cnx_end = cnx_start + number_edges * CNX_LEN;
 
-                if number_edges > 0 {
+                // All nodes are in layer 0, always deserialize even if not connected
+                // This happens when the node only has one node (so no connections are possible)
+                if layer_index == 0 || number_edges > 0 {
                     let mut ram_edges = ram.layers[layer_index]
                         .out
                         .entry(VectorAddr(node_index))
@@ -430,4 +432,22 @@ mod tests {
 
         assert_eq!(disk1.0.as_ref(), buf2.as_slice());
     }
+
+    #[test]
+    fn hnsw_deserialize_one_node() {
+        let mut hnsw = RAMHnsw::new();
+        hnsw.add_node(VectorAddr(0), 0);
+        hnsw.update_entry_point();
+
+        let dir = TempDir::new().unwrap();
+        DiskHnswV1::serialize_to(dir.path(), 1, &hnsw).unwrap();
+
+        let disk1 = DiskHnswV1::open(dir.path(), false).unwrap();
+        let mut ram = disk1.deserialize().unwrap();
+        ram.fix_broken_graph();
+
+        assert_eq!(ram.layers.len(), 1);
+        assert_eq!(ram.layers[0].out.len(), 1);
+        assert_eq!(ram.layers[0].out[&VectorAddr(0)].read().unwrap().len(), 0);
+    }
 }

{nidx_binding-6.9.5.post653 → nidx_binding-6.9.5.post655}/nidx_vector/src/hnsw/disk/v2.rs

@@ -279,7 +279,9 @@ impl DiskHnsw for DiskHnswV2 {
                 let cnx_start = edges_start + U32_LEN;
                 let cnx_end = cnx_start + number_edges * U32_LEN;
 
-                if number_edges > 0 {
+                // All nodes are in layer 0, always deserialize even if not connected
+                // This happens when the node only has one node (so no connections are possible)
+                if layer_index == 0 || number_edges > 0 {
                     let mut ram_edges = ram.layers[layer_index]
                         .out
                         .entry(VectorAddr(node_index))
@@ -456,4 +458,22 @@ mod tests {
             .unwrap();
         assert_eq!(edges1, edges2);
     }
+
+    #[test]
+    fn hnsw_deserialize_one_node() {
+        let mut hnsw = RAMHnsw::new();
+        hnsw.add_node(VectorAddr(0), 0);
+        hnsw.update_entry_point();
+
+        let dir = TempDir::new().unwrap();
+        DiskHnswV2::serialize_to(dir.path(), 1, &hnsw).unwrap();
+
+        let disk1 = DiskHnswV2::open(dir.path(), false).unwrap();
+        let mut ram = disk1.deserialize().unwrap();
+        ram.fix_broken_graph();
+
+        assert_eq!(ram.layers.len(), 1);
+        assert_eq!(ram.layers[0].out.len(), 1);
+        assert_eq!(ram.layers[0].out[&VectorAddr(0)].read().unwrap().len(), 0);
+    }
 }

{nidx_binding-6.9.5.post653 → nidx_binding-6.9.5.post655}/pyproject.toml

@@ -13,7 +13,7 @@ classifiers = [
     "Programming Language :: Python :: Implementation :: CPython",
     "Programming Language :: Python :: Implementation :: PyPy",
 ]
-version = "6.9.5.post653"
+version = "6.9.5.post655"
 
 [project.urls]
 Homepage = "https://nuclia.com"