librelane 3.0.0.dev39__tar.gz → 3.0.0.dev40__tar.gz

{librelane-3.0.0.dev39 → librelane-3.0.0.dev40}/PKG-INFO

@@ -1,41 +1,41 @@
-Metadata-Version: 2.1
+Metadata-Version: 2.4
 Name: librelane
-Version: 3.0.0.dev39
+Version: 3.0.0.dev40
 Summary: An infrastructure for implementing chip design flows
-Home-page: https://github.com/librelane/librelane
-License: Apache-2.0
-Author: Mohamed Gaber
-Author-email: me@donn.website
-Requires-Python: >=3.8.1,<4
-Classifier: License :: OSI Approved :: Apache Software License
+License-Expression: Apache-2.0
+Maintainer: Mohamed Gaber
+Maintainer-email: me@donn.website
+Requires-Python: >=3.10
 Classifier: Programming Language :: Python :: 3
-Classifier: Programming Language :: Python :: 3.9
 Classifier: Programming Language :: Python :: 3.10
 Classifier: Programming Language :: Python :: 3.11
 Classifier: Programming Language :: Python :: 3.12
 Classifier: Programming Language :: Python :: 3.13
-Requires-Dist: ciel (>=2.0.3,<3)
+Classifier: Programming Language :: Python :: 3.14
+Requires-Dist: ciel (>=2.3.1,<3)
 Requires-Dist: click (>=8,<8.2)
 Requires-Dist: cloup (>=3.0.5,<4)
 Requires-Dist: deprecated (>=1.2.10,<2)
 Requires-Dist: httpx (>=0.22.0,<0.29)
-Requires-Dist: klayout (>=0.29.0,<0.31.0)
+Requires-Dist: klayout (>=0.29.0,<0.32.0)
 Requires-Dist: lln-libparse (==0.56.*)
 Requires-Dist: lxml (>=4.9.0)
 Requires-Dist: psutil (>=5.9.0)
 Requires-Dist: pyyaml (>=5,<7)
 Requires-Dist: rapidfuzz (>=3.9.0,<4)
 Requires-Dist: rich (>=12,<15)
-Requires-Dist: semver (>=3.0.2,<4.0.0)
-Requires-Dist: yamlcore (>=0.0.2,<0.0.3)
+Requires-Dist: semver (>=3.0.2,<4)
+Requires-Dist: yamlcore (>=0.0.2,<0.1.0)
+Project-URL: Bug Tracker, https://github.com/librelane/librelane/issues
 Project-URL: Documentation, https://librelane.readthedocs.io
+Project-URL: Homepage, https://librelane.org/
 Project-URL: Repository, https://github.com/librelane/librelane
 Description-Content-Type: text/markdown
 
 <h1 align="center">LibreLane</h1>
 <p align="center">
     <a href="https://opensource.org/licenses/Apache-2.0"><img src="https://img.shields.io/badge/License-Apache%202.0-blue.svg" alt="License: Apache 2.0"/></a>
-    <a href="https://www.python.org"><img src="https://img.shields.io/badge/Python-3.8-3776AB.svg?style=flat&logo=python&logoColor=white" alt="Python 3.8.1 or higher" /></a>
+    <a href="https://www.python.org"><img src="https://img.shields.io/badge/Python-3.10-3776AB.svg?style=flat&logo=python&logoColor=white" alt="Python ≥3.10" /></a>
     <a href="https://github.com/psf/black"><img src="https://img.shields.io/badge/code%20style-black-000000.svg" alt="Code Style: black"/></a>
     <a href="https://mypy-lang.org/"><img src="https://www.mypy-lang.org/static/mypy_badge.svg" alt="Checked with mypy"/></a>
     <a href="https://nixos.org/"><img src="https://img.shields.io/static/v1?logo=nixos&logoColor=white&label=&message=Built%20with%20Nix&color=41439a" alt="Built with Nix"/></a>
@@ -72,7 +72,7 @@ Colaboratory by following
 
 You'll need the following:
 
-* Python **3.8.1** or higher with PIP, Venv and Tkinter
+* Python **3.10** or higher with PIP, Venv and Tkinter
 
 ### Nix (Recommended)
 

{librelane-3.0.0.dev39 → librelane-3.0.0.dev40}/Readme.md

@@ -1,7 +1,7 @@
 <h1 align="center">LibreLane</h1>
 <p align="center">
     <a href="https://opensource.org/licenses/Apache-2.0"><img src="https://img.shields.io/badge/License-Apache%202.0-blue.svg" alt="License: Apache 2.0"/></a>
-    <a href="https://www.python.org"><img src="https://img.shields.io/badge/Python-3.8-3776AB.svg?style=flat&logo=python&logoColor=white" alt="Python 3.8.1 or higher" /></a>
+    <a href="https://www.python.org"><img src="https://img.shields.io/badge/Python-3.10-3776AB.svg?style=flat&logo=python&logoColor=white" alt="Python ≥3.10" /></a>
     <a href="https://github.com/psf/black"><img src="https://img.shields.io/badge/code%20style-black-000000.svg" alt="Code Style: black"/></a>
     <a href="https://mypy-lang.org/"><img src="https://www.mypy-lang.org/static/mypy_badge.svg" alt="Checked with mypy"/></a>
     <a href="https://nixos.org/"><img src="https://img.shields.io/static/v1?logo=nixos&logoColor=white&label=&message=Built%20with%20Nix&color=41439a" alt="Built with Nix"/></a>
@@ -38,7 +38,7 @@ Colaboratory by following
 
 You'll need the following:
 
-* Python **3.8.1** or higher with PIP, Venv and Tkinter
+* Python **3.10** or higher with PIP, Venv and Tkinter
 
 ### Nix (Recommended)
 

{librelane-3.0.0.dev39 → librelane-3.0.0.dev40}/librelane/common/metrics/__main__.py

@@ -358,9 +358,10 @@ def compare_remote(
                 for chunk in r.iter_bytes(chunk_size=8192):
                     bio_gz.write(chunk)
             bio_gz.seek(0)
-            with gzip.GzipFile(fileobj=bio_gz) as bio, tarfile.TarFile(
-                fileobj=bio, mode="r"
-            ) as tf:
+            with (
+                gzip.GzipFile(fileobj=bio_gz) as bio,
+                tarfile.TarFile(fileobj=bio, mode="r") as tf,
+            ):
                 for file in tf:
                     if file.isdir():
                         continue

{librelane-3.0.0.dev39 → librelane-3.0.0.dev40}/librelane/config/variable.py

@@ -440,7 +440,7 @@ class Variable:
             return_value = list()
             raw = value
             if isinstance(raw, list) or isinstance(raw, tuple):
-                if validating_type == List[Path]:
+                if type_origin == list and type_args == (str,):
                     if any(isinstance(item, List) for item in raw):
                         Variable.__flatten_list(value)
                 pass

{librelane-3.0.0.dev39 → librelane-3.0.0.dev40}/librelane/flows/flow.py

@@ -916,9 +916,10 @@ class Flow(ABC):
                     # Despite the name, this is the Magic DRC report simply
                     # converted into a KLayout-compatible format. Confusing!
                     drc_xml_out = os.path.join(openlane_signoff_dir, "drc.klayout.xml")
-                    with open(drc_xml, encoding="utf8") as i, open(
-                        drc_xml_out, "w", encoding="utf8"
-                    ) as o:
+                    with (
+                        open(drc_xml, encoding="utf8") as i,
+                        open(drc_xml_out, "w", encoding="utf8") as o,
+                    ):
                         o.write(
                             "<!-- Despite the name, this is the Magic DRC report in KLayout format. -->\n"
                         )

{librelane-3.0.0.dev39 → librelane-3.0.0.dev40}/librelane/scripts/magic/drc.tcl

@@ -12,6 +12,13 @@
 # See the License for the specific language governing permissions and
 # limitations under the License.
 
+# Flatten cells
+if { [info exists ::env(MAGIC_GDS_FLATGLOB)] } {
+    foreach {gds_flatglob} $::env(MAGIC_GDS_FLATGLOB) {
+        gds flatglob $gds_flatglob
+    }
+}
+
 if { $::env(MAGIC_DRC_USE_GDS) } {
     gds read $::env(CURRENT_GDS)
 } else {

{librelane-3.0.0.dev39 → librelane-3.0.0.dev40}/librelane/scripts/openroad/ioplacer.tcl

@@ -53,6 +53,12 @@ if { $::env(IO_PIN_PLACEMENT_MODE) == "annealing" } {
     lappend arg_list -annealing
 }
 
+if { [info exists ::env(IO_EXCLUDE_PIN_REGION)] } {
+    foreach exclude $::env(IO_EXCLUDE_PIN_REGION) {
+        lappend arg_list -exclude $exclude
+    }
+}
+
 set HMETAL $::env(FP_IO_HLAYER)
 set VMETAL $::env(FP_IO_VLAYER)
 

{librelane-3.0.0.dev39 → librelane-3.0.0.dev40}/librelane/scripts/openroad/sta/check_macro_instances.tcl

@@ -27,7 +27,7 @@ read_timing_info
 
 set error_count 0
 foreach {instance_name macro_name} $::env(_check_macro_instances) {
-    set instances [get_cells -hierarchical $instance_name]
+    set instances [get_cells $instance_name]
     set instance_count [llength $instances]
     if { $instance_count < 1 } {
         puts stderr "\[ERROR\] No macro instance $instance_name found."

{librelane-3.0.0.dev39 → librelane-3.0.0.dev40}/librelane/scripts/pyosys/synthesize.py

@@ -34,6 +34,7 @@
 import os
 import json
 import shutil
+from typing import List, Optional
 
 import click
 
@@ -142,11 +143,37 @@ def librelane_opt(
 
 
 def librelane_synth(
-    d, top, flatten, report_dir, *, booth=False, abc_dff=False, undriven=True
+    d,
+    top,
+    flatten,
+    report_dir,
+    *,
+    booth=False,
+    abc_dff=False,
+    undriven=True,
+    keep_hierarchy_min_cost: Optional[int],
+    keep_hierarchy_instances: List[str],
+    keep_hierarchy_modules: List[str],
 ):
+
     d.run_pass("hierarchy", "-check", "-top", top, "-nokeep_prints", "-nokeep_asserts")
     librelane_proc(d, report_dir)
 
+    if keep_hierarchy_min_cost:
+        d.run_pass("keep_hierarchy", "-min_cost", str(keep_hierarchy_min_cost))
+
+    if keep_hierarchy_instances:
+        for keep_hierarchy_instance in keep_hierarchy_instances:
+            d.run_pass(
+                "setattr", "-set", "keep_hierarchy", "1", keep_hierarchy_instance
+            )
+
+    if keep_hierarchy_modules:
+        for keep_hierarchy_module in keep_hierarchy_modules:
+            d.run_pass(
+                "setattr", "-mod", "-set", "keep_hierarchy", "1", keep_hierarchy_module
+            )
+
     if flatten:
         d.run_pass("flatten")  # Flatten the design hierarchy
 
@@ -294,12 +321,10 @@ def synthesize(
     )
     d.run_pass("rename", "-top", config["DESIGN_NAME"])
     d.run_pass("select", "-module", config["DESIGN_NAME"])
-    try:
+    if config["SYNTH_SHOW"]:
         d.run_pass(
             "show", "-format", "dot", "-prefix", os.path.join(step_dir, "hierarchy")
         )
-    except Exception:
-        pass
     if config["SYNTH_NORMALIZE_SINGLE_BIT_VECTORS"]:
         d.run_pass("attrmap", "-remove", "single_bit_vector")
     d.run_pass("select", "-clear")
@@ -356,12 +381,15 @@ def synthesize(
         booth=config["SYNTH_MUL_BOOTH"],
         abc_dff=config["SYNTH_ABC_DFF"],
         undriven=config.get("SYNTH_TIE_UNDEFINED") is not None,
+        keep_hierarchy_min_cost=config["SYNTH_KEEP_HIERARCHY_MIN_COST"],
+        keep_hierarchy_instances=config["SYNTH_KEEP_HIERARCHY_INSTANCES"],
+        keep_hierarchy_modules=config["SYNTH_KEEP_HIERARCHY_MODULES"],
     )
 
     d.run_pass("delete", "t:$print")
     d.run_pass("delete", "t:$assert")
 
-    try:
+    if config["SYNTH_SHOW"]:
         d.run_pass(
             "show",
             "-format",
@@ -369,8 +397,6 @@ def synthesize(
             "-prefix",
             os.path.join(step_dir, "primitive_techmap"),
         )
-    except Exception:
-        pass
 
     d.run_pass("opt")
     d.run_pass("opt_clean", "-purge")

{librelane-3.0.0.dev39 → librelane-3.0.0.dev40}/librelane/scripts/pyosys/ys_common.py

@@ -112,7 +112,14 @@ def _Design_add_blackbox_models(
 
         if ext in [".v", ".sv", ".vh"]:
             self.run_pass(
-                "read_verilog", "-sv", "-lib", *include_args, *define_args, model
+                "read_verilog",
+                "-sv",
+                "-setattr",
+                "keep_hierarchy",
+                "-lib",
+                *include_args,
+                *define_args,
+                model,
             )
         elif ext in [".lib"]:
             self.run_pass(
@@ -121,6 +128,8 @@ def _Design_add_blackbox_models(
                 "-ignore_miss_dir",
                 "-setattr",
                 "blackbox",
+                "-setattr",
+                "keep_hierarchy",
                 model,
             )
         else:

{librelane-3.0.0.dev39 → librelane-3.0.0.dev40}/librelane/steps/magic.py

@@ -1,3 +1,7 @@
+# Copyright 2025 LibreLane Contributors
+#
+# Adapted from OpenLane
+#
 # Copyright 2023 Efabless Corporation
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -389,7 +393,7 @@ class DRC(MagicStep):
     name = "DRC"
     long_name = "Design Rule Checks"
 
-    inputs = [DesignFormat.DEF, DesignFormat.GDS]
+    inputs = [DesignFormat.DEF.mkOptional(), DesignFormat.GDS]
     outputs = []
 
     config_vars = MagicStep.config_vars + [
@@ -399,6 +403,11 @@ class DRC(MagicStep):
             "A flag to choose whether to run the Magic DRC checks on GDS or not. If not, then the checks will be done on the DEF view of the design, which is a bit faster, but may be less accurate as some DEF/LEF elements are abstract.",
             default=True,
         ),
+        Variable(
+            "MAGIC_GDS_FLATGLOB",
+            Optional[List[str]],
+            "Flatten cells by name pattern on input. May be used to avoid false positive DRC errors. The strings may use standard shell-type glob patterns, with * for any length string match, ? for any single character match, \\ for special characters, and [] for matching character sets or ranges.",
+        ),
     ]
 
     def get_script_path(self):
@@ -408,6 +417,10 @@ class DRC(MagicStep):
         reports_dir = os.path.join(self.step_dir, "reports")
         mkdirp(reports_dir)
 
+        # Check that the DEF exists if needed
+        if not self.config["MAGIC_DRC_USE_GDS"]:
+            assert state_in.get(DesignFormat.DEF)
+
         views_updates, metrics_updates = super().run(state_in, **kwargs)
 
         report_path = os.path.join(reports_dir, "drc_violations.magic.rpt")

{librelane-3.0.0.dev39 → librelane-3.0.0.dev40}/librelane/steps/openroad.py

@@ -1213,6 +1213,12 @@ class IOPlacement(OpenROADStep):
                 Optional[Path],
                 "Points to the DEF file to be used as a template.",
             ),
+            Variable(
+                "IO_EXCLUDE_PIN_REGION",
+                Optional[List[str]],
+                "List of regions where pins cannot be placed. The regions are strings in the format `{edge}:{interval}` where edge is `top|bottom|left|right` and the interval is either `*` to exclude the entire edge or `{begin}-{end}` to exclude a part of the edge, where `begin` and `end` are either absolute distance values or themselves `*` to denote the very start or end of an edge.",
+                units="µm",
+            ),
         ]
     )
 

{librelane-3.0.0.dev39 → librelane-3.0.0.dev40}/librelane/steps/pyosys.py

@@ -214,6 +214,12 @@ class PyosysStep(Step):
             "A fully qualified IPVT corner to use during synthesis. If unspecified, the value for `DEFAULT_CORNER` from the PDK will be used.",
             pdk=True,
         ),
+        Variable(
+            "SYNTH_SHOW",
+            bool,
+            "Generate a graphviz DOT file for the design. This will fail on a completely empty design.",
+            default=False,
+        ),
     ]
 
     @classmethod
@@ -444,7 +450,7 @@ class SynthesisCommon(VerilogStep):
         Variable(
             "SYNTH_HIERARCHY_MODE",
             Literal["flatten", "deferred_flatten", "keep"],
-            "Affects how hierarchy is maintained throughout and after synthesis. 'flatten' flattens it during and after synthesis. 'deferred_flatten' flattens it after synthesis. 'keep' never flattens it. Please note that when using the Slang plugin, you need to pass '--keep-hierarchy' to `SLANG_ARGUMENTS` separately.",
+            "Affects how hierarchy is maintained throughout and after synthesis. 'flatten' flattens it during and after synthesis. 'deferred_flatten' flattens it after synthesis. 'keep' never flattens it. Please note that when using the Slang plugin, you need to pass '--keep-hierarchy' to `SLANG_ARGUMENTS` separately. To keep the hierarchy partially, use one of the flattening options and set the 'keep_hierarchy' attribute on instances or modules via: `SYNTH_KEEP_HIERARCHY_INSTANCES`, `SYNTH_KEEP_HIERARCHY_MODULES` or `SYNTH_KEEP_HIERARCHY_MIN_COST`.",
             default="flatten",
             deprecated_names=[
                 (
@@ -453,6 +459,21 @@ class SynthesisCommon(VerilogStep):
                 )
             ],
         ),
+        Variable(
+            "SYNTH_KEEP_HIERARCHY_MIN_COST",
+            Optional[int],
+            "Sets the 'keep_hierarchy' attribute on modules where the gate count is estimated to exceed the specified threshold. This prevents larger modules from being flattened. This variable only affects the design when 'flatten' is called through `SYNTH_HIERARCHY_MODE`.",
+        ),
+        Variable(
+            "SYNTH_KEEP_HIERARCHY_INSTANCES",
+            Optional[List[str]],
+            "A list of instances for which to set the 'keep_hierarchy' attribute. This variable only affects the design when 'flatten' is called through `SYNTH_HIERARCHY_MODE`.",
+        ),
+        Variable(
+            "SYNTH_KEEP_HIERARCHY_MODULES",
+            Optional[List[str]],
+            "A list of modules for which to set the 'keep_hierarchy' attribute. This variable only affects the design when 'flatten' is called through `SYNTH_HIERARCHY_MODE`.",
+        ),
         Variable(
             "SYNTH_SHARE_RESOURCES",
             bool,

{librelane-3.0.0.dev39 → librelane-3.0.0.dev40}/librelane/steps/step.py

@@ -1016,6 +1016,7 @@ class Step(ABC):
         state_in: GenericDict[str, Any] = self.state_in.result().copy_mut()
         for format_id in state_in:
             format = DesignFormat.factory.get(format_id)
+            assert format is not None
             if format not in self.__class__.inputs and not (
                 format == DesignFormat.DEF
                 and DesignFormat.ODB

{librelane-3.0.0.dev39 → librelane-3.0.0.dev40}/librelane/steps/verilator.py

@@ -1,3 +1,7 @@
+# Copyright 2025 LibreLane Contributors
+#
+# Adapted from OpenLane
+#
 # Copyright 2023 Efabless Corporation
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -84,6 +88,23 @@ class Lint(Step):
             Optional[List[str]],
             "Linter-specific preprocessor definitions; overrides VERILOG_DEFINES for the lint step if exists",
         ),
+        Variable(
+            "LINTER_DISABLE_WARNINGS",
+            Optional[List[str]],
+            "Warning codes that are passed to the linter to be disabled.",
+            default=["DECLFILENAME", "EOFNEWLINE"],
+        ),
+        Variable(
+            "LINTER_DISABLE_WARNINGS_BLACKBOX",
+            Optional[List[str]],
+            "Warning codes that are passed to the linter to be disabled for all blackbox modules.",
+            default=["UNDRIVEN", "UNUSEDSIGNAL"],
+        ),
+        Variable(
+            "LINTER_VLT",
+            Optional[Path],
+            "Path to a Verilator Configuration format file (`.vlt`) that is passed to the linter.",
+        ),
     ]
 
     def run(self, state_in: State, **kwargs) -> Tuple[ViewsUpdate, MetricsUpdate]:
@@ -149,11 +170,16 @@ class Lint(Step):
         vlt_file = os.path.join(self.step_dir, "_deps.vlt")
         with open(vlt_file, "w") as f:
             f.write("`verilator_config\n")
-            f.write("lint_off -rule DECLFILENAME\n")
-            f.write("lint_off -rule EOFNEWLINE\n")
+            if disable_warnings := self.config["LINTER_DISABLE_WARNINGS"]:
+                for warn in disable_warnings:
+                    f.write(f"lint_off -rule {warn}\n")
+
             for blackbox in blackboxes:
-                f.write(f'lint_off -rule UNDRIVEN -file "{blackbox}"\n')
-                f.write(f'lint_off -rule UNUSEDSIGNAL -file "{blackbox}"\n')
+                if disable_warnings_bb := self.config[
+                    "LINTER_DISABLE_WARNINGS_BLACKBOX"
+                ]:
+                    for warn in disable_warnings_bb:
+                        f.write(f'lint_off -rule {warn} -file "{blackbox}"\n')
 
         extra_args.append("--Wno-fatal")
 
@@ -169,20 +195,23 @@ class Lint(Step):
         for define in defines:
             extra_args.append(f"+define+{define}")
 
+        if linter_vlt := self.config["LINTER_VLT"]:
+            extra_args.append(linter_vlt)
+
         result = self.run_subprocess(
             [
                 "verilator",
                 "--lint-only",
+                "--waiver-output",
+                os.path.join(self.step_dir, "_waivers_output.vlt"),
                 "--Wall",
-                "--Wno-DECLFILENAME",
-                "--Wno-EOFNEWLINE",
                 "--top-module",
                 self.config["DESIGN_NAME"],
                 vlt_file,
             ]
+            + extra_args
             + blackboxes
-            + self.config["VERILOG_FILES"]
-            + extra_args,
+            + self.config["VERILOG_FILES"],
             env=env,
             check=False,
         )

librelane-3.0.0.dev40/pyproject.toml

@@ -0,0 +1,73 @@
+[project]
+name = "librelane"
+version = "3.0.0.dev40"
+description = "An infrastructure for implementing chip design flows"
+maintainers = [
+    {name = "Mohamed Gaber", email = "me@donn.website"}
+]
+readme = "Readme.md"
+license = "Apache-2.0"
+requires-python = ">=3.10"
+dependencies = [
+  "click>=8,<8.2",
+  "cloup>=3.0.5,<4",
+  "pyyaml>=5,<7",
+  "rich>=12,<15",
+  "ciel>=2.3.1,<3",
+  "lxml>=4.9.0",
+  "deprecated>=1.2.10,<2",
+  "lln-libparse==0.56.*",
+  "psutil>=5.9.0",
+  "httpx>=0.22.0,<0.29",
+  "klayout>=0.29.0,<0.32.0",
+  "rapidfuzz>=3.9.0,<4",
+  "yamlcore>=0.0.2,<0.1.0",
+  "semver>=3.0.2,<4"
+]
+
+[project.urls]
+homepage = "https://librelane.org/"
+repository = "https://github.com/librelane/librelane"
+documentation = "https://librelane.readthedocs.io"
+"Bug Tracker" = "https://github.com/librelane/librelane/issues"
+
+[dependency-groups]
+
+lint = [
+    "black",
+    "flake8",
+    "flake8-pytest-style; python_version < '4'",
+    "mypy>=1.18.2",
+    "lxml-stubs",
+    "types-urllib3",
+    "types-typed-ast",
+    "types-six",
+    "types-setuptools",
+    "types-PyYAML",
+    "types-docutils",
+    "types-decorator",
+    "types-commonmark",
+    "types-colorama",
+    "types-Pygments",
+    "types-Deprecated",
+    "types-psutil",
+]
+test = [
+    "pytest",
+    "pytest-xdist",
+    "pytest-cov",
+    "pyfakefs",
+    "pillow"
+]
+
+[project.scripts]
+librelane = "librelane.__main__:cli"
+"librelane.steps" = "librelane.steps.__main__:cli"
+"librelane.config" = "librelane.config.__main__:cli"
+"librelane.state" = "librelane.state.__main__:cli"
+"librelane.help" = "librelane.help.__main__:cli"
+"librelane.env_info" = "librelane:env_info_cli"
+
+[build-system]
+requires = ["poetry-core>=2.0.0,<3"]
+build-backend = "poetry.core.masonry.api"

librelane-3.0.0.dev39/pyproject.toml

@@ -1,73 +0,0 @@
-[tool.poetry]
-name = "librelane"
-version = "3.0.0.dev39"
-description = "An infrastructure for implementing chip design flows"
-# Technically, maintainer. We cannot use the maintainers field until
-# poetry-core>=2.0.0 which requires Python version 3.9+. This field does
-# not imply primary authorship for the purposes of copyright.
-authors = ["Mohamed Gaber <me@donn.website>"]
-readme = "Readme.md"
-license = "Apache-2.0"
-repository = "https://github.com/librelane/librelane"
-documentation = "https://librelane.readthedocs.io"
-
-
-[tool.poetry.dependencies]
-python = ">=3.8.1,<4"
-click = ">=8,<8.2"
-cloup = ">=3.0.5,<4"
-pyyaml = ">=5,<7"
-rich = ">=12,<15"
-ciel = ">=2.0.3,<3"
-lxml = ">=4.9.0"
-deprecated = ">=1.2.10,<2"
-lln-libparse = "0.56.*"
-psutil = ">=5.9.0"
-httpx = ">=0.22.0,<0.29"
-klayout = ">=0.29.0,<0.31.0"
-rapidfuzz = ">=3.9.0,<4"
-yamlcore = "^0.0.2"
-semver = "^3.0.2"
-
-
-[tool.poetry.group.dev.dependencies]
-wheel = "*"
-black = ">=24.4.0,<25"
-
-flake8 = ">=7"
-flake8-pytest-style = "*"
-
-mypy = ">=1.9.0,<1.10.0"
-lxml-stubs = "*"
-types-urllib3 = "*"
-types-typed-ast = "*"
-types-six = "*"
-types-setuptools = "*"
-types-PyYAML = "*"
-types-docutils = "*"
-types-decorator = "*"
-types-commonmark = "*"
-types-colorama = "*"
-types-Pygments = "*"
-types-Deprecated = "*"
-types-psutil = "*"
-
-pytest = "*"
-pytest-xdist = "*"
-pytest-cov = "*"
-pyfakefs = ">=5.2.3,<6"
-pillow = ">=10.0.1,<11"
-
-
-[tool.poetry.scripts]
-openlane = "librelane.__main__:cli"
-librelane = "librelane.__main__:cli"
-"librelane.steps" = "librelane.steps.__main__:cli"
-"librelane.config" = "librelane.config.__main__:cli"
-"librelane.state" = "librelane.state.__main__:cli"
-"librelane.help" = "librelane.help.__main__:cli"
-"librelane.env_info" = "librelane:env_info_cli"
-
-[build-system]
-requires = ["poetry-core>=1.0.0"]
-build-backend = "poetry.core.masonry.api"