librelane 3.0.0.dev27__tar.gz → 3.0.0.dev28__tar.gz

{librelane-3.0.0.dev27 → librelane-3.0.0.dev28}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.1
 Name: librelane
-Version: 3.0.0.dev27
+Version: 3.0.0.dev28
 Summary: An infrastructure for implementing chip design flows
 Home-page: https://github.com/librelane/librelane
 License: Apache-2.0

{librelane-3.0.0.dev27 → librelane-3.0.0.dev28}/librelane/common/__init__.py

@@ -32,7 +32,7 @@ from .misc import (
     idem,
     get_librelane_root,
     get_script_dir,
-    get_opdks_rev,
+    get_pdk_hash,
     slugify,
     protected,
     final,

{librelane-3.0.0.dev27 → librelane-3.0.0.dev28}/librelane/common/metrics/__main__.py

@@ -158,7 +158,8 @@ def _compare_metric_folders(
                 continue
             basename = basename[: -len(".metrics.json")]
 
-            parts = basename.split("-", maxsplit=2)
+            # We have to rsplit, since ihp-sg13g2 contains a "-"
+            parts = basename.rsplit("-", maxsplit=2)
             if len(parts) != 3:
                 raise ValueError(
                     f"Invalid filename {basename}: not in the format {{pdk}}-{{scl}}-{{design_name}}"

{librelane-3.0.0.dev27 → librelane-3.0.0.dev28}/librelane/common/misc.py

@@ -1,3 +1,7 @@
+# Copyright 2025 LibreLane Contributors
+#
+# Adapted from OpenLane
+#
 # Copyright 2023 Efabless Corporation
 #
 # Licensed under the Apache License, Version 2.0 (the "License");
@@ -16,6 +20,7 @@ import os
 import re
 import glob
 import gzip
+import yaml
 import typing
 import pathlib
 import fnmatch
@@ -37,6 +42,7 @@ import httpx
 
 from ..__version__ import __version__
 from .types import AnyPath, Path
+from ..logging import err
 
 T = TypeVar("T")
 
@@ -68,15 +74,21 @@ def get_script_dir() -> str:
     )
 
 
-def get_opdks_rev() -> str:
+def get_pdk_hash(pdk_variant) -> str:
     """
-    Gets the Open_PDKs revision confirmed compatible with this version of LibreLane.
+    Gets the PDK version hash confirmed compatible with this version of LibreLane.
     """
-    return (
-        open(os.path.join(get_librelane_root(), "open_pdks_rev"), encoding="utf8")
-        .read()
-        .strip()
+
+    with open(os.path.join(get_librelane_root(), "pdk_hashes.yaml"), "r") as file:
+        pdk_hashes = yaml.safe_load(file)
+        for pdk_family in pdk_hashes:
+            if pdk_family in pdk_variant:
+                return pdk_hashes[pdk_family]
+
+    err(
+        f"Could not find a PDK family for '{pdk_variant}'. Please specify a PDK manually with '--manual-pdk'."
     )
+    exit(1)
 
 
 # The following code snippet has been adapted under the following license:

{librelane-3.0.0.dev27 → librelane-3.0.0.dev28}/librelane/flows/cli.py

@@ -34,7 +34,7 @@ from cloup.constraints import (
 from cloup.typing import Decorator
 
 from .flow import Flow
-from ..common import set_tpe, cli, get_opdks_rev, _get_process_limit
+from ..common import set_tpe, cli, get_pdk_hash, _get_process_limit
 from ..logging import set_log_level, verbose, err, options, LogLevels
 from ..state import State, InvalidState
 
@@ -421,7 +421,7 @@ def cloup_flow_opts(
                     import ciel
                     from ciel.source import StaticWebDataSource
 
-                    opdks_rev = volare_pdk_override or get_opdks_rev()
+                    opdks_rev = volare_pdk_override or get_pdk_hash(pdk)
                     ciel_home = ciel.get_ciel_home(pdk_root)
 
                     include_libraries = ["default"]

librelane-3.0.0.dev28/librelane/pdk_hashes.yaml

@@ -0,0 +1,3 @@
+sky130: 8afc8346a57fe1ab7934ba5a6056ea8b43078e71
+gf180mcu: 8afc8346a57fe1ab7934ba5a6056ea8b43078e71
+ihp-sg13g2: cb7daaa8901016cf7c5d272dfa322c41f024931f

{librelane-3.0.0.dev27 → librelane-3.0.0.dev28}/librelane/scripts/klayout/stream_out.py

@@ -90,6 +90,13 @@ import click
     "input",
     type=click.Path(exists=True, file_okay=True, dir_okay=False),
 )
+@click.option(
+    "--conflict-resolution",
+    "conflict_resolution",
+    type=str,
+    default="RenameCell",
+    help="Cell conflict resolution handling.",
+)
 def stream_out(
     output: str,
     input_lefs: Tuple[str, ...],
@@ -100,6 +107,7 @@ def stream_out(
     seal_gds: Optional[str],
     design_name: str,
     input: str,
+    conflict_resolution: str,
 ):  # Load technology file
     try:
         tech = pya.Technology()
@@ -109,6 +117,22 @@ def stream_out(
         layout_options.lefdef_config.lef_files = list(input_lefs)
         layout_options.lefdef_config.map_file = lym
 
+        cell_conflict_resolution = {
+            "AddToCell": pya.LoadLayoutOptions.CellConflictResolution.AddToCell,
+            "OverwriteCell": pya.LoadLayoutOptions.CellConflictResolution.OverwriteCell,
+            "RenameCell": pya.LoadLayoutOptions.CellConflictResolution.RenameCell,
+            "SkipNewCell": pya.LoadLayoutOptions.CellConflictResolution.SkipNewCell,
+        }.get(conflict_resolution)
+
+        if cell_conflict_resolution is None:
+            print(
+                f"[ERROR] Unknown conflict resolution: '{conflict_resolution}'.",
+                file=sys.stderr,
+            )
+            exit(1)
+        else:
+            layout_options.cell_conflict_resolution = cell_conflict_resolution
+
         # Load def file
         main_layout = pya.Layout()
         # main_layout.load_layer_props(props_file)
@@ -126,7 +150,7 @@ def stream_out(
         # Load in the gds to merge
         print("[INFO] Merging GDS files…")
         for gds in input_gds_files:
-            main_layout.read(gds)
+            main_layout.read(gds, layout_options)
 
         # Copy the top level only to a new layout
         print(f"[INFO] Copying top level cell '{design_name}'…")
@@ -138,7 +162,7 @@ def stream_out(
         print("[INFO] Checking for missing GDS…")
         missing_gds = False
         for i in top_only_layout.each_cell():
-            if i.is_empty():
+            if i.is_ghost_cell():
                 missing_gds = True
                 print(
                     f"[ERROR] LEF Cell '{i.name}' has no matching GDS cell.",

{librelane-3.0.0.dev27 → librelane-3.0.0.dev28}/librelane/scripts/pyosys/json_header.py

@@ -38,7 +38,7 @@ def json_header(
     defines = (
         (config["VERILOG_DEFINES"] or [])
         + [
-            f"PDK_{config['PDK']}",
+            f"PDK_{config['PDK'].replace('-','_')}",
             f"SCL_{config['STD_CELL_LIBRARY']}",
             "__librelane__",
             "__pnr__",

{librelane-3.0.0.dev27 → librelane-3.0.0.dev28}/librelane/scripts/pyosys/synthesize.py

@@ -227,7 +227,7 @@ def synthesize(
 
     includes = config.get("VERILOG_INCLUDE_DIRS") or []
     defines = (config.get("VERILOG_DEFINES") or []) + [
-        f"PDK_{config['PDK']}",
+        f"PDK_{config['PDK'].replace('-','_')}",
         f"SCL_{config['STD_CELL_LIBRARY']}",
         "__librelane__",
         "__pnr__",

{librelane-3.0.0.dev27 → librelane-3.0.0.dev28}/librelane/steps/klayout.py

@@ -24,7 +24,7 @@ import subprocess
 from os.path import abspath
 from base64 import b64encode
 from tempfile import NamedTemporaryFile
-from typing import Any, Dict, Optional, List, Sequence, Tuple, Union
+from typing import Any, Dict, Optional, List, Literal, Sequence, Tuple, Union
 
 from .step import ViewsUpdate, MetricsUpdate, Step, StepError, StepException
 
@@ -201,6 +201,17 @@ class StreamOut(KLayoutStep):
     inputs = [DesignFormat.DEF]
     outputs = [DesignFormat.GDS, DesignFormat.KLAYOUT_GDS]
 
+    config_vars = KLayoutStep.config_vars + [
+        Variable(
+            "KLAYOUT_CONFLICT_RESOLUTION",
+            Optional[
+                Literal["AddToCell", "OverwriteCell", "RenameCell", "SkipNewCell"]
+            ],
+            "Specifies the conflict resolution if a cell name conflict arises.",
+            default="RenameCell",
+        ),
+    ]
+
     def run(self, state_in: State, **kwargs) -> Tuple[ViewsUpdate, MetricsUpdate]:
         views_updates: ViewsUpdate = {}
 
@@ -223,6 +234,8 @@ class StreamOut(KLayoutStep):
                 abspath(klayout_gds_out),
                 "--top",
                 self.config["DESIGN_NAME"],
+                "--conflict-resolution",
+                self.config["KLAYOUT_CONFLICT_RESOLUTION"],
             ]
             + self.get_cli_args(include_lefs=True, include_gds=True),
             env=env,

{librelane-3.0.0.dev27 → librelane-3.0.0.dev28}/librelane/steps/yosys.py

@@ -48,7 +48,7 @@ def _generate_read_deps(
     commands = ""
 
     synth_defines = [
-        f"PDK_{config['PDK']}",
+        f"PDK_{config['PDK'].replace('-','_')}",
         f"SCL_{config['STD_CELL_LIBRARY']}",
         "__librelane__",
         "__pnr__",

{librelane-3.0.0.dev27 → librelane-3.0.0.dev28}/pyproject.toml

@@ -1,6 +1,6 @@
 [tool.poetry]
 name = "librelane"
-version = "3.0.0.dev27"
+version = "3.0.0.dev28"
 description = "An infrastructure for implementing chip design flows"
 # Technically, maintainer. We cannot use the maintainers field until
 # poetry-core>=2.0.0 which requires Python version 3.9+. This field does

librelane-3.0.0.dev27/librelane/open_pdks_rev

@@ -1 +0,0 @@
-0fe599b2afb6708d281543108caf8310912f54af