gpuwm-hex 0.2.2__tar.gz → 0.2.3__tar.gz

This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
Files changed (385) hide show
  1. {gpuwm_hex-0.2.2/src/gpuwm_hex.egg-info → gpuwm_hex-0.2.3}/PKG-INFO +67 -32
  2. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/README.md +65 -30
  3. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/docs/declared-divergences.md +39 -2
  4. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/docs/manual/02-quickstart.md +14 -11
  5. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/docs/manual/04-meshes-and-static.md +1 -1
  6. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/docs/manual/08-troubleshooting.md +1 -1
  7. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/docs/manual/09-reference.md +5 -4
  8. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/docs/manual/index.md +2 -2
  9. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/pyproject.toml +23 -13
  10. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3/src/gpuwm_hex.egg-info}/PKG-INFO +67 -32
  11. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/gpuwm_hex.egg-info/SOURCES.txt +11 -0
  12. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/gpuwm_hex.egg-info/requires.txt +1 -1
  13. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cli.py +10 -0
  14. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/config_v841.py +18 -1
  15. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_arwen_physics_v841.py +130 -73
  16. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_backend/regional_admission.py +204 -7
  17. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_driver.py +52 -19
  18. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_physics_prep_v841.py +228 -96
  19. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_physics_v841.py +184 -121
  20. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_regional_forecast_v841.py +17 -4
  21. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/engine_pin.py +117 -25
  22. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/forecast_door.py +127 -2
  23. gpuwm_hex-0.2.3/src/hexcore/pair_door.py +1062 -0
  24. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/physics_backend_admission.py +78 -0
  25. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/physics_seam.py +7 -3
  26. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/render_door.py +25 -2
  27. gpuwm_hex-0.2.3/src/hexcore/species_row.py +1007 -0
  28. gpuwm_hex-0.2.3/tests/test_backend_row_builder.py +130 -0
  29. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tests/test_capacity_copy_elisions.py +1 -1
  30. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tests/test_cuda_v841_full_physics_x4.py +6 -6
  31. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tests/test_engine_pin.py +84 -21
  32. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tests/test_forecast_door.py +87 -0
  33. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tests/test_mesh_spec_gates.py +6 -3
  34. gpuwm_hex-0.2.3/tests/test_moist_coefficients_species_row.py +232 -0
  35. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tests/test_packaging_declaration.py +5 -5
  36. gpuwm_hex-0.2.3/tests/test_pair_door.py +573 -0
  37. gpuwm_hex-0.2.3/tests/test_physics_carrier_kernels.py +134 -0
  38. gpuwm_hex-0.2.3/tests/test_plot_pair_gallery.py +585 -0
  39. gpuwm_hex-0.2.3/tests/test_prep_species_row.py +218 -0
  40. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tests/test_regional_forecast_anchor.py +2 -2
  41. gpuwm_hex-0.2.3/tests/test_species_row.py +455 -0
  42. gpuwm_hex-0.2.3/tests/test_species_row_extended.py +153 -0
  43. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tests/test_swath_door.py +5 -3
  44. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tools/battery/cpu_files.txt +9 -0
  45. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tools/battery/gpu_gates.txt +7 -2
  46. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tools/mpas_mesh_binding.py +118 -0
  47. gpuwm_hex-0.2.3/tools/plot_pair_gallery.py +1376 -0
  48. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tools/run_cuda_regional_contract.py +40 -6
  49. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tools/run_cuda_v841_forecast.py +223 -9
  50. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tools/run_cuda_v841_full_physics_x4.py +165 -37
  51. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/LICENSE +0 -0
  52. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/MANIFEST.in +0 -0
  53. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/NOTICE +0 -0
  54. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/docs/cycle-door.md +0 -0
  55. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/docs/device-memory-ledger.md +0 -0
  56. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/docs/init-door.md +0 -0
  57. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/docs/manual/01-what-this-is.md +0 -0
  58. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/docs/manual/03-concepts.md +0 -0
  59. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/docs/manual/05-initial-conditions.md +0 -0
  60. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/docs/manual/06-forecast.md +0 -0
  61. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/docs/manual/07-render.md +0 -0
  62. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/docs/native-free-init-admission.md +0 -0
  63. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/docs/obs-referee.md +0 -0
  64. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/docs/render-door.md +0 -0
  65. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/docs/source-matrix.md +0 -0
  66. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/evidence/EVIDENCE.md +0 -0
  67. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/setup.cfg +0 -0
  68. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/gpuwm_hex.egg-info/dependency_links.txt +0 -0
  69. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/gpuwm_hex.egg-info/entry_points.txt +0 -0
  70. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/gpuwm_hex.egg-info/top_level.txt +0 -0
  71. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/__init__.py +0 -0
  72. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/__main__.py +0 -0
  73. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/acoustic.py +0 -0
  74. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/acoustic_v841.py +0 -0
  75. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cascade_row.py +0 -0
  76. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cell_coordination_admission.py +0 -0
  77. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/config.py +0 -0
  78. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/config_lts.py +0 -0
  79. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/convection_admission.py +0 -0
  80. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_acoustic.py +0 -0
  81. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_acoustic_lts.py +0 -0
  82. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_acoustic_v841.py +0 -0
  83. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_backend/__init__.py +0 -0
  84. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_backend/arch_admission.py +0 -0
  85. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_backend/compile_contract.py +0 -0
  86. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_backend/containers.py +0 -0
  87. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_backend/recovery.py +0 -0
  88. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_backend/runtime.py +0 -0
  89. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_driver_lts.py +0 -0
  90. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_dualrun.py +0 -0
  91. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_dynamics_v841.py +0 -0
  92. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_fp32.py +0 -0
  93. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_ftz.py +0 -0
  94. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_ftz_v841.py +0 -0
  95. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_gwdo_v841.py +0 -0
  96. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_horizontal.py +0 -0
  97. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_horizontal_v841.py +0 -0
  98. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_physics_tier_park_v841.py +0 -0
  99. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_regional_v841.py +0 -0
  100. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_transport.py +0 -0
  101. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_transport_v841.py +0 -0
  102. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cuda_v841.py +0 -0
  103. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cull_door.py +0 -0
  104. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cycle/__init__.py +0 -0
  105. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cycle/chain.py +0 -0
  106. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cycle/delayed_start.py +0 -0
  107. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cycle/door.py +0 -0
  108. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/cycle/errors.py +0 -0
  109. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/damping_v841.py +0 -0
  110. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/data/swath/placement-policy.v2.json +0 -0
  111. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/data/swath/threat-metrics.v3.json +0 -0
  112. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/device_admission.py +0 -0
  113. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/diagnostics.py +0 -0
  114. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/doctor.py +0 -0
  115. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/driver.py +0 -0
  116. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/dt_admission.py +0 -0
  117. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/dual_edge_admission.py +0 -0
  118. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/dynamics.py +0 -0
  119. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/dynamics_v841.py +0 -0
  120. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/engines.py +0 -0
  121. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/errors.py +0 -0
  122. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/horizontal.py +0 -0
  123. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/init_door.py +0 -0
  124. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/initialization.py +0 -0
  125. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/integration.py +0 -0
  126. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/integration_v841.py +0 -0
  127. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/lbc.py +0 -0
  128. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/libm_identity.py +0 -0
  129. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/lts_v841.py +0 -0
  130. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/mesh.py +0 -0
  131. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/mesh_plan_door.py +0 -0
  132. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/mesh_row_candidate.py +0 -0
  133. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/mesh_spec_gates.py +0 -0
  134. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/mixing.py +0 -0
  135. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/mixing_v841.py +0 -0
  136. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/nomix_oracle.py +0 -0
  137. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/obs_referee/__init__.py +0 -0
  138. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/obs_referee/__main__.py +0 -0
  139. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/obs_referee/acquire.py +0 -0
  140. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/obs_referee/align.py +0 -0
  141. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/obs_referee/bootstrap.py +0 -0
  142. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/obs_referee/bundle.py +0 -0
  143. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/obs_referee/canonical.py +0 -0
  144. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/obs_referee/cli.py +0 -0
  145. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/obs_referee/errors.py +0 -0
  146. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/obs_referee/manifest.py +0 -0
  147. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/obs_referee/metrics.py +0 -0
  148. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/obs_referee/report.py +0 -0
  149. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/obs_referee/runner.py +0 -0
  150. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/obs_referee/scorecard.py +0 -0
  151. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/obs_referee/treatment.py +0 -0
  152. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/offcentering_v841.py +0 -0
  153. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/oracle.py +0 -0
  154. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/output.py +0 -0
  155. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/partition_assets_v841.py +0 -0
  156. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/partition_device_scheduler_v841.py +0 -0
  157. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/partition_executor_v841.py +0 -0
  158. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/partition_local_mesh_v841.py +0 -0
  159. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/partition_net_v841.py +0 -0
  160. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/partition_state_v841.py +0 -0
  161. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/pbl_cadence.py +0 -0
  162. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/physics_seam_v841.py +0 -0
  163. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/regional_v841.py +0 -0
  164. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/regrid.py +0 -0
  165. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/rkind_libm.py +0 -0
  166. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/rust_renderer.py +0 -0
  167. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/shipped_sources.py +0 -0
  168. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/state.py +0 -0
  169. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/step_oracle.py +0 -0
  170. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/swath/__init__.py +0 -0
  171. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/swath/detect.py +0 -0
  172. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/swath/door.py +0 -0
  173. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/swath/errors.py +0 -0
  174. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/swath/geometry.py +0 -0
  175. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/swath/history.py +0 -0
  176. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/swath/hysteresis.py +0 -0
  177. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/swath/plan.py +0 -0
  178. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/swath/rank.py +0 -0
  179. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/swath/registry.py +0 -0
  180. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/swath/sizing.py +0 -0
  181. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/swath/track.py +0 -0
  182. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/terrain.py +0 -0
  183. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/timestep_admission.py +0 -0
  184. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/src/hexcore/tracer_oracle.py +0 -0
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  359. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tools/run_real_gfs_cuda_forecast.py +0 -0
  360. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tools/run_real_gfs_cuda_x1_163842.py +0 -0
  361. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tools/run_real_gfs_forecast.py +0 -0
  362. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tools/run_real_gfs_initialization.py +0 -0
  363. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tools/run_regional_dry_ladder.py +0 -0
  364. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tools/run_rust_renderer_gate.py +0 -0
  365. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tools/run_swath_placement_chain.py +0 -0
  366. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tools/run_v841_compiled_endpoint_gate.py +0 -0
  367. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tools/run_v841_smagorinsky_authority_pin.py +0 -0
  368. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tools/scale_region_about_centroid.py +0 -0
  369. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tools/step_match_pbl_cadence_dt5.py +0 -0
  370. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tools/v841_partstream_common.py +0 -0
  371. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/tools/validate_cuda_x1_163842_remote_evidence.py +0 -0
  372. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/verification/CANONICAL-BUNDLE-CONTRACT.md +0 -0
  373. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/verification/GF-HOOK-CONTRACT.md +0 -0
  374. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/verification/README.md +0 -0
  375. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/verification/fixtures/build_synthetic_suite.py +0 -0
  376. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/verification/manifests/obs-referee-283.production.json +0 -0
  377. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/verification/producers/README.md +0 -0
  378. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/verification/producers/model_bundle.py +0 -0
  379. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/verification/producers/observation_bundles.py +0 -0
  380. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/verification/producers/select_control_cases.py +0 -0
  381. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/verification/schemas/gf-subsidence-treatment-v1.schema.json +0 -0
  382. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/verification/schemas/normalized-artifact-receipt-v1.schema.json +0 -0
  383. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/verification/vertical-specs/legacy41-v1.json +0 -0
  384. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/verification/vertical-specs/native-comparison-policy.NOT-MEASURED.json +0 -0
  385. {gpuwm_hex-0.2.2 → gpuwm_hex-0.2.3}/verification/vertical-specs/tc55-v1.json +0 -0
@@ -1,6 +1,6 @@
1
1
  Metadata-Version: 2.4
2
2
  Name: gpuwm-hex
3
- Version: 0.2.2
3
+ Version: 0.2.3
4
4
  Summary: GPU global atmospheric model on unstructured Voronoi meshes: a CUDA port of the MPAS-A v8.4.1 dycore with ArWen physics, arbitrary mesh generation, and single-card mesh streaming for 12-16 GB GPUs.
5
5
  License-Expression: Apache-2.0
6
6
  Project-URL: Homepage, https://github.com/FahrenheitResearch/gpuwm-hex
@@ -24,7 +24,7 @@ License-File: NOTICE
24
24
  Requires-Dist: numpy>=2.0
25
25
  Requires-Dist: netCDF4>=1.6
26
26
  Requires-Dist: scipy>=1.11
27
- Requires-Dist: gpuwm<2.6.2,>=2.6.1
27
+ Requires-Dist: gpuwm<2.6.6,>=2.6.4
28
28
  Provides-Extra: gpu-cu12
29
29
  Requires-Dist: cupy-cuda12x[ctk]>=14.0; extra == "gpu-cu12"
30
30
  Provides-Extra: gpu-cu13
@@ -182,7 +182,7 @@ verdict for each divergence is in
182
182
  | Python | 3.11 or newer |
183
183
  | GPU | A CUDA device. Memory is set by mesh size *and* by the card, and not by a line through the two: the footprint is a per-card core, plus the Grell-Freitas and YSU column workspaces charged at `min(cells, tile)`, plus a per-cell term, all in `hexcore.device_admission`. Measured 2026-08-26 on an RTX 5090 at the merged tip: the published 40,962-cell global mesh (x1.40962, about 120 km) peaked at **8,874 MiB — inside a 12 GiB card's budget**; the 163,842-cell mesh (x4.163842, about 24 km) peaked at **20,446 MiB**, and every free-memory gate admits at the measured floor — the prediction plus that card's own margin, **about 21.7 GiB free at x4** — so x4 remains in practice a 32 GiB-card configuration. The core is a property of the card, not the mesh, and the door reads the card's multiprocessor count at the decision rather than assuming a 5090: the 16 GiB and 10 GiB parts each carry their own measured row, and a card nobody has measured gets a derived row that is labelled derived. A card with its own #264 ledger can still supply it with `--device-fixed-mib` / `--device-bytes-per-cell`. Receipts: `evidence/memory-row-refit-20260826/node2/`, `evidence/l6-capacity-20260825/` and `evidence/memory-shape-20260827/`. |
184
184
  | CUDA | CuPy matching your driver's CUDA major — there is no way for pip to detect it, so you choose (below). |
185
- | Engine | The `gpuwm` distribution, `>=2.6.1,<2.6.2` — a bounded range, and pip resolves it for you: the physics seam, and the bundle that carries the MPAS bridge binaries the doors drive. **Plus a `gpuwm` source checkout at `v2.6.1` for the forecast lane** — see *The engine pin*. |
185
+ | Engine | The `gpuwm` distribution, `>=2.6.4,<2.6.6` — a bounded range, and pip resolves it for you: the physics seam, and the bundle that carries the MPAS bridge binaries the doors drive. **Plus a `gpuwm` source checkout at `v2.6.4` for the forecast lane** — see *The engine pin*. |
186
186
  | Assets | A mesh grid file, a matching static file, and (for the init door) a vertical-grid declaration — normally a `--vertical-spec` JSON; a native-minted init file as a capsule is the compatibility mode. **gpuwm-hex ships none of these and has no fetch path for them.** See *Assets you must supply*. |
187
187
  | Rust binaries | `rw_mpas_init` for the init door; `rw_mpas_convert` and `rw_wrfbatch` for the render door. They are built from the `gpuwm` source tree — see *Building the Rust engines*. |
188
188
 
@@ -242,44 +242,56 @@ unchanged.
242
242
 
243
243
  ### The engine pin
244
244
 
245
- gpuwm-hex depends on `gpuwm>=2.6.1,<2.6.2` — a **bounded range**, and the
245
+ gpuwm-hex depends on `gpuwm>=2.6.4,<2.6.6` — a **bounded range**, and the
246
246
  bound is the point. The port pins the engine's physics seam by the SHA-256 of
247
247
  **sixteen individual gpuwm source files**, and the gap between a published
248
- stamp and the pinned bytes has recurred at every cut. Re-measured 2026-09-01
248
+ stamp and the pinned bytes has recurred at every cut. Re-measured 2026-09-02
249
249
  against the real published bytes of every 2.5.x and 2.6.x release, plus the
250
- `v2.5.5` tag that has no release at all — JSON at
251
- `evidence/repin-261-20260901/engine-verdicts.json`, instrument at
250
+ `v2.5.5` and `v2.6.2` tags that have no release at all — JSON at
251
+ `evidence/repin-265-20260902/engine-verdicts.json`, instrument at
252
252
  `evidence/standalone-20260827/measure_engine_verdicts.py`:
253
253
 
254
254
  | gpuwm | on PyPI | seam pin | `--offline` build road |
255
255
  | --- | --- | --- | --- |
256
256
  | 2.5.0 | yes | 11 of 16 moved | complete |
257
257
  | 2.5.1 | yes | 11 of 16 moved | complete |
258
- | 2.5.2 | yes | 10 of 16 moved | complete |
259
- | 2.5.3 | yes | 7 of 16 moved | complete |
260
- | 2.5.4 | yes | 7 of 16 moved | complete |
261
- | 2.5.5 | **no — a git tag with no release** | 7 of 16 moved | **broken** |
262
- | 2.5.6 | yes | 7 of 16 moved | complete |
263
- | 2.5.7 | yes | 6 of 16 moved | complete |
264
- | 2.5.8 | yes | 5 of 16 moved | complete |
265
- | 2.6.0 | yes | 3 of 16 moved | complete |
266
- | **2.6.1** | yes | **matches** | complete |
267
-
268
- **2.6.1 is the only published engine whose bytes match the pin**, so it is the
269
- floor, and with the exclusive ceiling one patch above it, it is the whole
270
- range.
258
+ | 2.5.2 | yes | 11 of 16 moved | complete |
259
+ | 2.5.3 | yes | 10 of 16 moved | complete |
260
+ | 2.5.4 | yes | 10 of 16 moved | complete |
261
+ | 2.5.5 | **no — a git tag with no release** | 10 of 16 moved | **broken** |
262
+ | 2.5.6 | yes | 10 of 16 moved | complete |
263
+ | 2.5.7 | yes | 9 of 16 moved | complete |
264
+ | 2.5.8 | yes | 9 of 16 moved | complete |
265
+ | 2.6.0 | yes | 8 of 16 moved | complete |
266
+ | 2.6.1 | yes | 8 of 16 moved | complete |
267
+ | 2.6.2 | **no — a git tag with no release** | 6 of 16 moved | complete |
268
+ | 2.6.3 | yes | 6 of 16 moved | complete |
269
+ | **2.6.4** | yes | **matches** | complete |
270
+ | **2.6.5** | yes | **matches** | complete |
271
+
272
+ **2.6.4 and 2.6.5 are the only published engines whose bytes match the pin,
273
+ and they match it with the same bytes**: all sixteen pinned files are
274
+ byte-identical between the two published wheels
275
+ (`evidence/repin-265-20260902/wheel-pair-264-265.txt`), so 2.6.4 is the
276
+ floor, 2.6.5 is admitted, and the exclusive ceiling sits one patch above it at
277
+ 2.6.6. 2.6.3, published three hours before 2.6.4 and the floor that morning,
278
+ fails it by 6 files; 2.6.2 fails by the same 6 and its publish job died
279
+ besides, so nothing of it reached PyPI — a floor pip cannot install is not a
280
+ floor, the same finding 2.5.5 forced.
271
281
 
272
282
  That is the same narrow claim this page has carried since 2026-08-28, and the
273
283
  reason is not that an engine regressed. The `moved` column is measured against
274
284
  **this port's** seam manifest, so re-pinning that manifest moves every row at
275
- once, including rows for engines cut long before it: 2.6.0 read `matches`
276
- under the previous manifest and reads `3 of 16 moved` under this one. A row
285
+ once, including rows for engines cut long before it: 2.6.3 read `matches`
286
+ under the previous manifest and reads `6 of 16 moved` under this one, and
287
+ 2.6.1, which read `3 of 16 moved` under the previous manifest, reads
288
+ `8 of 16 moved` now. A row
277
289
  from the old table is not comparable with a row from this one, and neither is
278
290
  a row anyone patches by hand.
279
291
 
280
- The consequence is worth stating rather than discovering: **this port has no
281
- fallback engine.** If 2.6.1 were withdrawn, the answer would be to publish a
282
- new engine and re-measure, not to widen the range.
292
+ The consequence is worth stating rather than discovering: **the two admitted
293
+ engines are the whole fallback.** If both were withdrawn, the answer would be
294
+ to publish a new engine and re-measure, not to widen the range.
283
295
 
284
296
  Two facts about 2.5.5 that this page used to give as floor reasons are still
285
297
  true and are now beside the point, because 2.5.5 fails the re-pinned manifest
@@ -299,7 +311,7 @@ stops there with `failed to open file .../cc/src/target/generated.rs`.
299
311
  > reported the estate healthy and exited 0. A green install and a dead run.
300
312
  >
301
313
  > The ceiling is exclusive and sits at the first engine that is not measured
302
- > usable, so a future 2.6.2 is excluded exactly as 2.6.0 is today. Admitting a
314
+ > usable, so a future 2.6.6 is excluded exactly as 2.6.3 is today. Admitting a
303
315
  > new engine is a deliberate act: re-run
304
316
  > `evidence/standalone-20260827/measure_engine_verdicts.py`, splice its JSON
305
317
  > into the table in `hexcore.engine_pin` with
@@ -326,15 +338,17 @@ verified against the packaged pin** — the four above, plus `rw_wrfbatch` and
326
338
  the `rw_mpas_lbc` the limited-area lane needs.
327
339
 
328
340
  *(The gpuwm source tree publishes too: `github.com/FahrenheitResearch/arwen`
329
- carries tags `v2.5.0` through `v2.6.1` with the full tree, `docs/mpas-seam.md`
341
+ carries tags `v2.5.0` through `v2.6.5` with the full tree, `docs/mpas-seam.md`
330
342
  and `gpuwm/core/mpas_column_batch.py` included. The table above was taken by
331
- hashing the pinned files at all eleven of those tags, so the build road below
343
+ hashing the pinned files at every one of those tags, so the build road below
332
344
  is open to anyone, subject to the 2.5.5 vendor gap noted above.)*
333
345
 
334
346
  **Installing `gpuwm` is necessary but not sufficient for the forecast lane.**
335
347
  The `forecast` door refuses without `--gpuwm-checkout`: a gpuwm **git
336
348
  checkout** at the pinned commit (`--arwen-checkout` on the driver beneath it),
337
- in addition to the installed distribution. Clone `v2.6.1`. This is stated
349
+ in addition to the installed distribution. Clone `v2.6.4` (the floor, and
350
+ the tag every card proof of record was taken at; `v2.6.5` carries the same
351
+ sixteen pinned files byte for byte). This is stated
338
352
  plainly because the alternative — discovering it as a `FileNotFoundError` deep
339
353
  in a launch — is the trap; the `forecast` door refuses by name instead, and so
340
354
  does `gpuwm-hex doctor`.
@@ -472,7 +486,7 @@ bundle carries `rw_wrfbatch` and **not** `rw_mpas_init` or `rw_mpas_convert`.
472
486
  On that engine `gpuwm fetch-bridges` gives you the renderer and nothing that
473
487
  opens either MPAS door. That measurement is why the dependency floor cleared
474
488
  2.5.3 and never fell back: 2.5.3 is where the four MPAS bridge binaries
475
- enter the bundle, and the current `gpuwm>=2.6.1,<2.6.2` range keeps that
489
+ enter the bundle, and the current `gpuwm>=2.6.4,<2.6.6` range keeps that
476
490
  guarantee, so pip cannot resolve you onto an engine that strands both doors. A
477
491
  conforming install therefore never sees the 2.5.2 shortfall; it is recorded
478
492
  here because it is the reason the floor first moved.
@@ -797,10 +811,11 @@ Measured over 24 h, two independent weather cases, two mixing regimes,
797
811
  They entered this repository already finished on 2026-08-20, and there is no
798
812
  receipt directory, no card and no run commit for them anywhere in the tree.
799
813
  What can be established is a ceiling: the commit that introduced them pinned
800
- engine `629ddb6f0`, so they were measured at or before that pin. Five engine
814
+ engine `629ddb6f0`, so they were measured at or before that pin. Seven engine
801
815
  pin moves have landed since — `0d04db712` (2026-08-24), `26daaab7e`
802
816
  (2026-08-25), `659962929` (2026-08-28), `7e34a48` (2026-08-31, gpuwm
803
- 2.6.0) and `df5f34c5c` (2026-09-01, gpuwm 2.6.1). The **2.5.8** move is measured to change nothing: a four-arm byte A/B
817
+ `2.6.0`), `df5f34c5c` (2026-09-01, gpuwm 2.6.1), `636ab1b4b`
818
+ (2026-09-02, gpuwm 2.6.3) and `d60b883e7` (2026-09-02, gpuwm 2.6.4). The **2.5.8** move is measured to change nothing: a four-arm byte A/B
804
819
  on one card found the old and new pins identical on the atmosphere half of
805
820
  the per-step fingerprint at all 31 steps and on 0 of 138 history variables
806
821
  (`evidence/seam-258-ab-20260828/`) — one mesh, one case, one hour. The
@@ -814,6 +829,26 @@ eight-species transport — and is measured the same way at the same scope:
814
829
  the x4 proof re-run at that pin wrote all four snapshots (F000, F030, F001
815
830
  and the restarted F001) byte-identical to the 2.6.0 proof's, so one F001
816
831
  SHA-256 now spans three engines (`evidence/repin-261-20260901/x4-proof/`).
832
+ The **2.6.3** move touches the same batch driver (the aerosol-aware Thompson
833
+ species row) plus a config-relative file key off the physics path; its
834
+ one-hour byte arm was not run separately: the 2.6.4 arm below, taken
835
+ ninety minutes after that pin was superseded, covers it by inclusion
836
+ (`evidence/repin-263-20260902/x4-proof/SKIPPED.md`). The
837
+ **2.6.4** move crosses the executed seam more widely than any since 2.5.8:
838
+ six of the sixteen pinned files moved between the two published wheels,
839
+ among them the phase-one driver `gpuwm/core/physics.py` (the cumulus adapter
840
+ contract grew for a third cumulus scheme), the Grell-Freitas adapter
841
+ `gpuwm/core/gf.py` and its kernel source `gpuwm/core/kernels/gf.cu` (the
842
+ glibc float32 words moved into a header the loader prepends), the kernel
843
+ loader, the config loader and the restart identity table; the column batch
844
+ and the contract document did not move. Its one-hour byte arm is the x4
845
+ frozen-source proof re-run at the 2.6.4 pins
846
+ (`evidence/repin-264-20260902/x4-proof/`): all four snapshots (F000, F030,
847
+ F001 and the restarted F001) byte-identical to the 2.6.1 proof's, so one
848
+ F001 SHA-256 now spans 2.5.8, 2.6.0, 2.6.1 and 2.6.4. The published
849
+ **2.6.5** moved none of the sixteen pinned files
850
+ (`evidence/repin-265-20260902/wheel-pair-264-265.txt`), so it is admitted
851
+ by the range without a pin move and the 2.6.4 arm covers it.
817
852
  The two earliest moves have no such arm, and none of the three magnitudes
818
853
  has been re-measured over 24 h since. Whether any of them moved is **NOT MEASURED**.
819
854
  Read them as the numbers from the pre-2026-08-20 engine, not as today's.
@@ -144,7 +144,7 @@ verdict for each divergence is in
144
144
  | Python | 3.11 or newer |
145
145
  | GPU | A CUDA device. Memory is set by mesh size *and* by the card, and not by a line through the two: the footprint is a per-card core, plus the Grell-Freitas and YSU column workspaces charged at `min(cells, tile)`, plus a per-cell term, all in `hexcore.device_admission`. Measured 2026-08-26 on an RTX 5090 at the merged tip: the published 40,962-cell global mesh (x1.40962, about 120 km) peaked at **8,874 MiB — inside a 12 GiB card's budget**; the 163,842-cell mesh (x4.163842, about 24 km) peaked at **20,446 MiB**, and every free-memory gate admits at the measured floor — the prediction plus that card's own margin, **about 21.7 GiB free at x4** — so x4 remains in practice a 32 GiB-card configuration. The core is a property of the card, not the mesh, and the door reads the card's multiprocessor count at the decision rather than assuming a 5090: the 16 GiB and 10 GiB parts each carry their own measured row, and a card nobody has measured gets a derived row that is labelled derived. A card with its own #264 ledger can still supply it with `--device-fixed-mib` / `--device-bytes-per-cell`. Receipts: `evidence/memory-row-refit-20260826/node2/`, `evidence/l6-capacity-20260825/` and `evidence/memory-shape-20260827/`. |
146
146
  | CUDA | CuPy matching your driver's CUDA major — there is no way for pip to detect it, so you choose (below). |
147
- | Engine | The `gpuwm` distribution, `>=2.6.1,<2.6.2` — a bounded range, and pip resolves it for you: the physics seam, and the bundle that carries the MPAS bridge binaries the doors drive. **Plus a `gpuwm` source checkout at `v2.6.1` for the forecast lane** — see *The engine pin*. |
147
+ | Engine | The `gpuwm` distribution, `>=2.6.4,<2.6.6` — a bounded range, and pip resolves it for you: the physics seam, and the bundle that carries the MPAS bridge binaries the doors drive. **Plus a `gpuwm` source checkout at `v2.6.4` for the forecast lane** — see *The engine pin*. |
148
148
  | Assets | A mesh grid file, a matching static file, and (for the init door) a vertical-grid declaration — normally a `--vertical-spec` JSON; a native-minted init file as a capsule is the compatibility mode. **gpuwm-hex ships none of these and has no fetch path for them.** See *Assets you must supply*. |
149
149
  | Rust binaries | `rw_mpas_init` for the init door; `rw_mpas_convert` and `rw_wrfbatch` for the render door. They are built from the `gpuwm` source tree — see *Building the Rust engines*. |
150
150
 
@@ -204,44 +204,56 @@ unchanged.
204
204
 
205
205
  ### The engine pin
206
206
 
207
- gpuwm-hex depends on `gpuwm>=2.6.1,<2.6.2` — a **bounded range**, and the
207
+ gpuwm-hex depends on `gpuwm>=2.6.4,<2.6.6` — a **bounded range**, and the
208
208
  bound is the point. The port pins the engine's physics seam by the SHA-256 of
209
209
  **sixteen individual gpuwm source files**, and the gap between a published
210
- stamp and the pinned bytes has recurred at every cut. Re-measured 2026-09-01
210
+ stamp and the pinned bytes has recurred at every cut. Re-measured 2026-09-02
211
211
  against the real published bytes of every 2.5.x and 2.6.x release, plus the
212
- `v2.5.5` tag that has no release at all — JSON at
213
- `evidence/repin-261-20260901/engine-verdicts.json`, instrument at
212
+ `v2.5.5` and `v2.6.2` tags that have no release at all — JSON at
213
+ `evidence/repin-265-20260902/engine-verdicts.json`, instrument at
214
214
  `evidence/standalone-20260827/measure_engine_verdicts.py`:
215
215
 
216
216
  | gpuwm | on PyPI | seam pin | `--offline` build road |
217
217
  | --- | --- | --- | --- |
218
218
  | 2.5.0 | yes | 11 of 16 moved | complete |
219
219
  | 2.5.1 | yes | 11 of 16 moved | complete |
220
- | 2.5.2 | yes | 10 of 16 moved | complete |
221
- | 2.5.3 | yes | 7 of 16 moved | complete |
222
- | 2.5.4 | yes | 7 of 16 moved | complete |
223
- | 2.5.5 | **no — a git tag with no release** | 7 of 16 moved | **broken** |
224
- | 2.5.6 | yes | 7 of 16 moved | complete |
225
- | 2.5.7 | yes | 6 of 16 moved | complete |
226
- | 2.5.8 | yes | 5 of 16 moved | complete |
227
- | 2.6.0 | yes | 3 of 16 moved | complete |
228
- | **2.6.1** | yes | **matches** | complete |
229
-
230
- **2.6.1 is the only published engine whose bytes match the pin**, so it is the
231
- floor, and with the exclusive ceiling one patch above it, it is the whole
232
- range.
220
+ | 2.5.2 | yes | 11 of 16 moved | complete |
221
+ | 2.5.3 | yes | 10 of 16 moved | complete |
222
+ | 2.5.4 | yes | 10 of 16 moved | complete |
223
+ | 2.5.5 | **no — a git tag with no release** | 10 of 16 moved | **broken** |
224
+ | 2.5.6 | yes | 10 of 16 moved | complete |
225
+ | 2.5.7 | yes | 9 of 16 moved | complete |
226
+ | 2.5.8 | yes | 9 of 16 moved | complete |
227
+ | 2.6.0 | yes | 8 of 16 moved | complete |
228
+ | 2.6.1 | yes | 8 of 16 moved | complete |
229
+ | 2.6.2 | **no — a git tag with no release** | 6 of 16 moved | complete |
230
+ | 2.6.3 | yes | 6 of 16 moved | complete |
231
+ | **2.6.4** | yes | **matches** | complete |
232
+ | **2.6.5** | yes | **matches** | complete |
233
+
234
+ **2.6.4 and 2.6.5 are the only published engines whose bytes match the pin,
235
+ and they match it with the same bytes**: all sixteen pinned files are
236
+ byte-identical between the two published wheels
237
+ (`evidence/repin-265-20260902/wheel-pair-264-265.txt`), so 2.6.4 is the
238
+ floor, 2.6.5 is admitted, and the exclusive ceiling sits one patch above it at
239
+ 2.6.6. 2.6.3, published three hours before 2.6.4 and the floor that morning,
240
+ fails it by 6 files; 2.6.2 fails by the same 6 and its publish job died
241
+ besides, so nothing of it reached PyPI — a floor pip cannot install is not a
242
+ floor, the same finding 2.5.5 forced.
233
243
 
234
244
  That is the same narrow claim this page has carried since 2026-08-28, and the
235
245
  reason is not that an engine regressed. The `moved` column is measured against
236
246
  **this port's** seam manifest, so re-pinning that manifest moves every row at
237
- once, including rows for engines cut long before it: 2.6.0 read `matches`
238
- under the previous manifest and reads `3 of 16 moved` under this one. A row
247
+ once, including rows for engines cut long before it: 2.6.3 read `matches`
248
+ under the previous manifest and reads `6 of 16 moved` under this one, and
249
+ 2.6.1, which read `3 of 16 moved` under the previous manifest, reads
250
+ `8 of 16 moved` now. A row
239
251
  from the old table is not comparable with a row from this one, and neither is
240
252
  a row anyone patches by hand.
241
253
 
242
- The consequence is worth stating rather than discovering: **this port has no
243
- fallback engine.** If 2.6.1 were withdrawn, the answer would be to publish a
244
- new engine and re-measure, not to widen the range.
254
+ The consequence is worth stating rather than discovering: **the two admitted
255
+ engines are the whole fallback.** If both were withdrawn, the answer would be
256
+ to publish a new engine and re-measure, not to widen the range.
245
257
 
246
258
  Two facts about 2.5.5 that this page used to give as floor reasons are still
247
259
  true and are now beside the point, because 2.5.5 fails the re-pinned manifest
@@ -261,7 +273,7 @@ stops there with `failed to open file .../cc/src/target/generated.rs`.
261
273
  > reported the estate healthy and exited 0. A green install and a dead run.
262
274
  >
263
275
  > The ceiling is exclusive and sits at the first engine that is not measured
264
- > usable, so a future 2.6.2 is excluded exactly as 2.6.0 is today. Admitting a
276
+ > usable, so a future 2.6.6 is excluded exactly as 2.6.3 is today. Admitting a
265
277
  > new engine is a deliberate act: re-run
266
278
  > `evidence/standalone-20260827/measure_engine_verdicts.py`, splice its JSON
267
279
  > into the table in `hexcore.engine_pin` with
@@ -288,15 +300,17 @@ verified against the packaged pin** — the four above, plus `rw_wrfbatch` and
288
300
  the `rw_mpas_lbc` the limited-area lane needs.
289
301
 
290
302
  *(The gpuwm source tree publishes too: `github.com/FahrenheitResearch/arwen`
291
- carries tags `v2.5.0` through `v2.6.1` with the full tree, `docs/mpas-seam.md`
303
+ carries tags `v2.5.0` through `v2.6.5` with the full tree, `docs/mpas-seam.md`
292
304
  and `gpuwm/core/mpas_column_batch.py` included. The table above was taken by
293
- hashing the pinned files at all eleven of those tags, so the build road below
305
+ hashing the pinned files at every one of those tags, so the build road below
294
306
  is open to anyone, subject to the 2.5.5 vendor gap noted above.)*
295
307
 
296
308
  **Installing `gpuwm` is necessary but not sufficient for the forecast lane.**
297
309
  The `forecast` door refuses without `--gpuwm-checkout`: a gpuwm **git
298
310
  checkout** at the pinned commit (`--arwen-checkout` on the driver beneath it),
299
- in addition to the installed distribution. Clone `v2.6.1`. This is stated
311
+ in addition to the installed distribution. Clone `v2.6.4` (the floor, and
312
+ the tag every card proof of record was taken at; `v2.6.5` carries the same
313
+ sixteen pinned files byte for byte). This is stated
300
314
  plainly because the alternative — discovering it as a `FileNotFoundError` deep
301
315
  in a launch — is the trap; the `forecast` door refuses by name instead, and so
302
316
  does `gpuwm-hex doctor`.
@@ -434,7 +448,7 @@ bundle carries `rw_wrfbatch` and **not** `rw_mpas_init` or `rw_mpas_convert`.
434
448
  On that engine `gpuwm fetch-bridges` gives you the renderer and nothing that
435
449
  opens either MPAS door. That measurement is why the dependency floor cleared
436
450
  2.5.3 and never fell back: 2.5.3 is where the four MPAS bridge binaries
437
- enter the bundle, and the current `gpuwm>=2.6.1,<2.6.2` range keeps that
451
+ enter the bundle, and the current `gpuwm>=2.6.4,<2.6.6` range keeps that
438
452
  guarantee, so pip cannot resolve you onto an engine that strands both doors. A
439
453
  conforming install therefore never sees the 2.5.2 shortfall; it is recorded
440
454
  here because it is the reason the floor first moved.
@@ -759,10 +773,11 @@ Measured over 24 h, two independent weather cases, two mixing regimes,
759
773
  They entered this repository already finished on 2026-08-20, and there is no
760
774
  receipt directory, no card and no run commit for them anywhere in the tree.
761
775
  What can be established is a ceiling: the commit that introduced them pinned
762
- engine `629ddb6f0`, so they were measured at or before that pin. Five engine
776
+ engine `629ddb6f0`, so they were measured at or before that pin. Seven engine
763
777
  pin moves have landed since — `0d04db712` (2026-08-24), `26daaab7e`
764
778
  (2026-08-25), `659962929` (2026-08-28), `7e34a48` (2026-08-31, gpuwm
765
- 2.6.0) and `df5f34c5c` (2026-09-01, gpuwm 2.6.1). The **2.5.8** move is measured to change nothing: a four-arm byte A/B
779
+ `2.6.0`), `df5f34c5c` (2026-09-01, gpuwm 2.6.1), `636ab1b4b`
780
+ (2026-09-02, gpuwm 2.6.3) and `d60b883e7` (2026-09-02, gpuwm 2.6.4). The **2.5.8** move is measured to change nothing: a four-arm byte A/B
766
781
  on one card found the old and new pins identical on the atmosphere half of
767
782
  the per-step fingerprint at all 31 steps and on 0 of 138 history variables
768
783
  (`evidence/seam-258-ab-20260828/`) — one mesh, one case, one hour. The
@@ -776,6 +791,26 @@ eight-species transport — and is measured the same way at the same scope:
776
791
  the x4 proof re-run at that pin wrote all four snapshots (F000, F030, F001
777
792
  and the restarted F001) byte-identical to the 2.6.0 proof's, so one F001
778
793
  SHA-256 now spans three engines (`evidence/repin-261-20260901/x4-proof/`).
794
+ The **2.6.3** move touches the same batch driver (the aerosol-aware Thompson
795
+ species row) plus a config-relative file key off the physics path; its
796
+ one-hour byte arm was not run separately: the 2.6.4 arm below, taken
797
+ ninety minutes after that pin was superseded, covers it by inclusion
798
+ (`evidence/repin-263-20260902/x4-proof/SKIPPED.md`). The
799
+ **2.6.4** move crosses the executed seam more widely than any since 2.5.8:
800
+ six of the sixteen pinned files moved between the two published wheels,
801
+ among them the phase-one driver `gpuwm/core/physics.py` (the cumulus adapter
802
+ contract grew for a third cumulus scheme), the Grell-Freitas adapter
803
+ `gpuwm/core/gf.py` and its kernel source `gpuwm/core/kernels/gf.cu` (the
804
+ glibc float32 words moved into a header the loader prepends), the kernel
805
+ loader, the config loader and the restart identity table; the column batch
806
+ and the contract document did not move. Its one-hour byte arm is the x4
807
+ frozen-source proof re-run at the 2.6.4 pins
808
+ (`evidence/repin-264-20260902/x4-proof/`): all four snapshots (F000, F030,
809
+ F001 and the restarted F001) byte-identical to the 2.6.1 proof's, so one
810
+ F001 SHA-256 now spans 2.5.8, 2.6.0, 2.6.1 and 2.6.4. The published
811
+ **2.6.5** moved none of the sixteen pinned files
812
+ (`evidence/repin-265-20260902/wheel-pair-264-265.txt`), so it is admitted
813
+ by the range without a pin move and the 2.6.4 arm covers it.
779
814
  The two earliest moves have no such arm, and none of the three magnitudes
780
815
  has been re-measured over 24 h since. Whether any of them moved is **NOT MEASURED**.
781
816
  Read them as the numbers from the pre-2026-08-20 engine, not as today's.
@@ -56,10 +56,11 @@ is no receipt directory, no card and no run commit for them anywhere in the
56
56
  tree -- which is the opposite of how the obs-referee numbers below are
57
57
  recorded, and the gap is worth naming rather than papering over. What can be
58
58
  established is a ceiling: the commit that introduced them pinned engine
59
- `629ddb6f0`, so the run happened at or before that pin. Five engine pin moves
59
+ `629ddb6f0`, so the run happened at or before that pin. Seven engine pin moves
60
60
  have landed since -- `0d04db712` (2026-08-24), `26daaab7e` (2026-08-25),
61
61
  `659962929` (2026-08-28, gpuwm 2.5.8), `7e34a48` (2026-08-31, gpuwm
62
- 2.6.0) and `df5f34c5c` (2026-09-01, gpuwm 2.6.1).
62
+ 2.6.0), `df5f34c5c` (2026-09-01, gpuwm 2.6.1), `636ab1b4b`
63
+ (2026-09-02, gpuwm 2.6.3) and `d60b883e7` (2026-09-02, gpuwm 2.6.4).
63
64
 
64
65
  The 2.5.8 move crosses the executed seam and **has been measured**, in
65
66
  the strongest form available short of a re-run: a four-arm byte A/B on one
@@ -80,6 +81,42 @@ F001 history byte-identical to the 2.5.8 proof's -- one SHA-256, two
80
81
  engines (receipt `evidence/repin-260-20260831/x4-proof/`). One mesh, one
81
82
  case, one hour, same caveat as above.
82
83
 
84
+ The 2026-09-01 move (gpuwm 2.6.1) and the 2026-09-02 move (gpuwm 2.6.3)
85
+ both cross the executed seam at its centre -- the seam's own batch driver
86
+ `gpuwm/core/mpas_column_batch.py` gains restart schema v2 and the P3
87
+ transport at 2.6.1, and the aerosol-aware Thompson species row at 2.6.3 --
88
+ and each carries its own one-hour byte arm. The 2.6.1 x4 proof wrote all
89
+ four snapshots byte-identical to the 2.6.0 proof's
90
+ (`../evidence/repin-261-20260901/x4-proof/`); the 2.6.3 move's arm was not
91
+ run separately, because the 2.6.4 arm below covers it by inclusion
92
+ (`../evidence/repin-263-20260902/x4-proof/SKIPPED.md`). One mesh, one case,
93
+ one hour, same caveat.
94
+
95
+ The 2026-09-02 move to gpuwm 2.6.4, three hours after the 2.6.3 one,
96
+ crosses the executed seam more widely than any move since 2.5.8: six of
97
+ the sixteen pinned files moved between the two published wheels, measured
98
+ wheel against wheel (`../evidence/repin-264-20260902/wheel-pair-263-264.txt`)
99
+ -- the phase-one driver `gpuwm/core/physics.py` (the cumulus adapter
100
+ contract grew a result type and a column-tendency coupler for a third
101
+ cumulus scheme), the Grell-Freitas adapter `gpuwm/core/gf.py` (a
102
+ `release()` that breaks the driver/adapter reference cycle) and its kernel
103
+ source `gpuwm/core/kernels/gf.cu` (the glibc float32 words moved into a
104
+ header the loader prepends; the loader's own comment states the seven GF
105
+ entry points kept byte-identical resource counts and the GF parity suites
106
+ still grade at max_ulp 0), the kernel loader, the config loader and the
107
+ restart identity table. The column batch and the contract document did
108
+ not move. Its one-hour byte arm is the x4 frozen-source proof re-run at
109
+ the 2.6.4 pins (`../evidence/repin-264-20260902/x4-proof/`): all four
110
+ snapshots (F000, F030, F001 and the restarted F001) byte-identical to the
111
+ 2.6.1 proof's, so one F001 SHA-256 now spans 2.5.8, 2.6.0, 2.6.1 and 2.6.4,
112
+ and the GF lift is measured byte-neutral THROUGH THIS SEAM at that scope.
113
+ One mesh, one case, one hour, same caveat.
114
+
115
+ The published 2.6.5 (2026-09-02, ninety minutes after 2.6.4) moved none of
116
+ the sixteen pinned files, measured wheel against wheel
117
+ (`../evidence/repin-265-20260902/wheel-pair-264-265.txt`), so it is
118
+ admitted by the range without a pin move and the 2.6.4 arm covers it.
119
+
83
120
  The 2026-09-01 move crosses the executed seam a third time, and at its
84
121
  centre: `gpuwm/core/mpas_column_batch.py`, the seam's own batch driver,
85
122
  gains restart schema v2 and the P3 eight-species transport (the engine's
@@ -33,23 +33,26 @@ individual gpuwm source files by SHA-256. A bare install reached an engine the
33
33
  pin refused, and the forecast door refused at launch with a digest mismatch
34
34
  that named neither the version that works nor the fact that pip chose it.
35
35
 
36
- The declaration now carries a bounded range — `gpuwm>=2.6.1,<2.6.2` — so pip
36
+ The declaration now carries a bounded range — `gpuwm>=2.6.4,<2.6.6` — so pip
37
37
  resolves the engine that works and refuses the one that does not. Three things
38
38
  follow that are worth knowing rather than discovering:
39
39
 
40
- - **2.6.1 is the only published engine that matches**, re-measured 2026-09-01
41
- against every published 2.5.x and 2.6.x release. So there is no fallback:
42
- the range is one version wide because only one version qualifies.
40
+ - **2.6.4 and 2.6.5 are the only published engines that match**, re-measured
41
+ 2026-09-02 against every published 2.5.x and 2.6.x release, and they carry
42
+ the same sixteen pinned files byte for byte. The range is two versions
43
+ wide because two versions qualify. (2.6.3, published three hours before
44
+ 2.6.4, fails the pin by six files; 2.6.2 fails by the same six and never
45
+ reached PyPI at all.)
43
46
  - **A newer gpuwm will not be resolved either.** The ceiling sits at the
44
47
  first engine this port has not measured against the manifest, so a future
45
- 2.6.2 is excluded exactly as 2.6.0 is. That is deliberate: an unmeasured
48
+ 2.6.6 is excluded exactly as 2.6.3 is. That is deliberate: an unmeasured
46
49
  engine is what produced the defect.
47
50
  - **If you already have a different gpuwm in the environment**, `gpuwm-hex
48
51
  doctor` compares the installed engine's bytes against the pin and names
49
52
  both the version it found and the version to install. It is a byte check,
50
53
  not a version check, and it runs by default. On a conforming install it
51
- reads `gpuwm 2.6.1: 16 of 16 pinned files are in this install and all 16
52
- match` (measured 2026-09-01 against the published 2.6.1 wheel, in a fresh
54
+ reads `gpuwm 2.6.4: 16 of 16 pinned files are in this install and all 16
55
+ match` (measured 2026-09-02 against the published 2.6.4 wheel, in a fresh
53
56
  virtualenv holding only the published wheels).
54
57
 
55
58
  Then add the CUDA lane:
@@ -151,7 +154,7 @@ gpuwm you have: the transcript above was taken against the published gpuwm
151
154
  2.5.2 wheel, whose bundle carries `rw_wrfbatch` and **not** `rw_mpas_init`
152
155
  or `rw_mpas_convert` — which is exactly the shortfall the doctor reports
153
156
  there. The four MPAS bridge binaries enter the bundle at gpuwm 2.5.3, and
154
- this distribution's declared range is `gpuwm>=2.6.1,<2.6.2` (the floor is
157
+ this distribution's declared range is `gpuwm>=2.6.4,<2.6.6` (the floor is
155
158
  far past 2.5.3, for the seam bytes the port pins): a conforming install cannot
156
159
  land on the engine that transcript was taken from. Doctor
157
160
  asks the gpuwm you actually have what its bundle declares, so it never sends
@@ -302,7 +305,7 @@ about a minute.
302
305
  The forecast lane is the one step whose answer depends on your hardware, so
303
306
  ask before you spend anything on it. **Both checkouts below are required and
304
307
  neither is optional**: `--repo` is your gpuwm-hex checkout (the drivers are
305
- not in the wheel) and `--gpuwm-checkout` is a gpuwm checkout at **`v2.6.1`**,
308
+ not in the wheel) and `--gpuwm-checkout` is a gpuwm checkout at **`v2.6.4`**,
306
309
  the tag whose bytes the seam pin matches (2.1). Leave `--repo` off and the
307
310
  door refuses before it reads anything else.
308
311
 
@@ -316,7 +319,7 @@ gpuwm-hex forecast --preflight \
316
319
  --hours 1.0 --history-every-minutes 30 \
317
320
  --out work/fc-01 \
318
321
  --repo <gpuwm-hex-checkout>/tree \
319
- --gpuwm-checkout <gpuwm-checkout-at-v2.6.1>
322
+ --gpuwm-checkout <gpuwm-checkout-at-v2.6.4>
320
323
  ```
321
324
 
322
325
  `--gpuwm-checkout` must be a **git clone**, not an unpacked release tarball
@@ -398,7 +401,7 @@ gpuwm-hex forecast \
398
401
  --hours 1.0 --history-every-minutes 30 \
399
402
  --out work/fc-01 \
400
403
  --repo <gpuwm-hex-checkout>/tree \
401
- --gpuwm-checkout <gpuwm-checkout-at-v2.6.1> \
404
+ --gpuwm-checkout <gpuwm-checkout-at-v2.6.4> \
402
405
  --case-label quickstart
403
406
  ```
404
407
 
@@ -113,7 +113,7 @@ icosahedral Goldberg grid at the resolution you ask for and builds the
113
113
  matching static in the same run, with no native toolchain anywhere in the
114
114
  loop. (This door was not present on the published gpuwm 2.5.2 wheel; it
115
115
  arrives with the 2.5.3 bundle, well below the floor this distribution's
116
- declared `gpuwm>=2.6.1,<2.6.2` range requires. The commands below were proven from a `gpuwm` checkout.)
116
+ declared `gpuwm>=2.6.4,<2.6.6` range requires. The commands below were proven from a `gpuwm` checkout.)
117
117
 
118
118
  **See what a card can hold:**
119
119
 
@@ -194,7 +194,7 @@ checkout's HEAD, tree and dirty paths into every receipt so the executed seam
194
194
  source can be named — so clone the tag instead of copying the files.
195
195
 
196
196
  **`--gpuwm-checkout ... is gpuwm 2.5.8, and this port's physics seam is
197
- pinned to gpuwm 2.6.1`** — the checkout is a real gpuwm tree at the wrong
197
+ pinned to gpuwm 2.6.4`** — the checkout is a real gpuwm tree at the wrong
198
198
  version. The refusal names both versions, lists which of the sixteen pinned
199
199
  files moved, and prints the two commands that close it: the bounded `pip
200
200
  install` and the `git clone --depth 1 --branch v<version>` for the checkout
@@ -147,12 +147,13 @@ by omission.
147
147
  - Distribution and command: `gpuwm-hex`. Import namespace: `hexcore`,
148
148
  renamed from `mpas_port` at 0.2.0 and settled there (README, *The import
149
149
  namespace*). There is no alias shim.
150
- - Engine range: `gpuwm>=2.6.1,<2.6.2` is what pip enforces — a bounded
150
+ - Engine range: `gpuwm>=2.6.4,<2.6.6` is what pip enforces — a bounded
151
151
  range, derived from a measured table in `hexcore.engine_pin` rather than
152
152
  typed. The floor is where it is for one reason and it is the strictest
153
- one: 2.6.1 is the only published engine whose bytes match the sixteen-file
154
- Arwen seam manifest, re-measured 2026-09-01 against every published 2.5.x
155
- and 2.6.x release. It clears, incidentally, the bundle rows that put the MPAS bridge
153
+ one: 2.6.4 and 2.6.5 are the only published engines whose bytes match the
154
+ sixteen-file Arwen seam manifest (byte-identical to each other on every
155
+ pinned path), re-measured 2026-09-02 against every published 2.5.x and
156
+ 2.6.x release. It clears, incidentally, the bundle rows that put the MPAS bridge
156
157
  binaries (`rw_mpas_init`, `rw_mpas_convert`, `rw_mpas_mesh`,
157
158
  `rw_mpas_static`, `rw_mpas_lbc`) within reach of `gpuwm fetch-bridges`;
158
159
  published 2.5.2 carries none of them and would strand every door that
@@ -60,7 +60,7 @@ re-measured 2026-08-28 against the published bundle: the **limited-area lane**
60
60
  of chapter 6.8 and the `cull` door of chapter 9 have the engine capabilities
61
61
  they need, and the render door's **default window** is understood by the
62
62
  published converter. The third stands, with a narrower reason than it had: the forecast lane needs
63
- a `gpuwm` **git** checkout at **v2.6.1**, not just whatever pip installs — not
63
+ a `gpuwm` **git** checkout at **v2.6.4**, not just whatever pip installs — not
64
64
  because a pinned file is missing from the wheel (at 2.5.8 all sixteen resolve
65
65
  from `site-packages`, measured 2026-08-28) but because the run records the
66
66
  checkout's HEAD, tree and dirty paths into every receipt. Each is written
@@ -77,7 +77,7 @@ three measured, physics-shaped ways. They are stated in chapter 3, quantified
77
77
  in [`docs/declared-divergences.md`](../declared-divergences.md), and never
78
78
  hidden behind an option. Read them before trusting a number.
79
79
 
80
- **Version.** This manual describes gpuwm-hex 0.2.2 with the gpuwm 2.6.x
80
+ **Version.** This manual describes gpuwm-hex 0.2.3 with the gpuwm 2.6.x
81
81
  engine line. Where a measurement was taken on specific hardware, the card is
82
82
  named beside the number.
83
83
 
@@ -38,7 +38,7 @@ name = "gpuwm-hex"
38
38
  # partition-invariant, but it has no door, no demo, and no re-proof at the
39
39
  # current engine pin, so it is not what a version number should be sold on.
40
40
  # Numbers are not reserved here any more. A minor bump names what shipped.
41
- version = "0.2.2"
41
+ version = "0.2.3"
42
42
  description = "GPU global atmospheric model on unstructured Voronoi meshes: a CUDA port of the MPAS-A v8.4.1 dycore with ArWen physics, arbitrary mesh generation, and single-card mesh streaming for 12-16 GB GPUs."
43
43
  readme = "README.md"
44
44
  requires-python = ">=3.11"
@@ -103,17 +103,27 @@ license-files = ["LICENSE", "NOTICE"]
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  # 16" survived here even in the edit that called it out. Read the counts off
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  # `engine_pin.PUBLISHED_ENGINES`, which is machine-written.
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  #
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- # THE FLOOR IS 2.6.1 AND IT IS THE ONLY USABLE ENGINE (re-measured
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- # 2026-09-01, evidence/repin-261-20260901/). The engine published 2.6.1 and
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- # this port re-pinned its manifest to that cut's bytes; because the `moved`
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- # column is measured AGAINST the manifest, re-pinning moved every row, and
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- # every engine from 2.5.0 to 2.6.0 now fails it -- including the 2.6.0 that
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- # was this floor the day before (three files moved at the 2.6.1 cut:
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- # gpuwm/core/mpas_column_batch.py, gpuwm/config.py, docs/mpas-seam.md).
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- # There is no fallback engine and no wider range to fall back to: if 2.6.1
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- # were yanked, `engine_pin` raises EnginePinError rather than loosening the
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- # bound, because widening it means measuring something that passes and
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- # nothing published does.
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+ # THE FLOOR IS 2.6.4 AND THE RANGE ADMITS 2.6.5 (re-measured 2026-09-02,
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+ # evidence/repin-265-20260902/, after the same day's re-pin to 2.6.4,
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+ # evidence/repin-264-20260902/). The engine published 2.6.4 and this port
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+ # re-pinned its manifest to that cut's bytes; because the `moved` column is
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+ # measured AGAINST the manifest, re-pinning moved every row, and every
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+ # engine from 2.5.0 to 2.6.3 fails it -- including the 2.6.3 that was this
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+ # floor the same morning (six files moved at the 2.6.4 cut:
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+ # gpuwm/core/physics.py, gpuwm/core/gf.py, gpuwm/core/kernels/gf.cu,
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+ # gpuwm/core/kernels/__init__.py, gpuwm/config.py, gpuwm/io/restart.py; the
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+ # column batch and the contract document did not). 2.6.2, the tag whose
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+ # publish job died, fails on bytes as well, so the 2.5.5-shaped finding it
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+ # carried no longer reaches the floor. The engine then published 2.6.5
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+ # ninety minutes after 2.6.4 (a soil-archive layout fix for doctor, the mesh
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+ # door and the static builder, off the physics path), and all sixteen
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+ # manifest files are byte-identical between the two published wheels, so the
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+ # manifest did NOT move: 2.6.4 stays the floor, 2.6.5 is measured usable,
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+ # and the ceiling sits at 2.6.6, the first engine nobody has measured. The
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+ # range is two versions wide because two versions carry the pinned bytes,
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+ # and for no other reason: if both were yanked, `engine_pin` raises
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+ # EnginePinError rather than loosening the bound, because widening it means
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+ # measuring something that passes.
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  #
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  # Two earlier findings are kept in the table and no longer reach the floor,
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  # since 2.5.5 and 2.5.6 now fail on bytes before either applies: 2.5.5 is a
@@ -154,7 +164,7 @@ dependencies = [
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  "numpy>=2.0",
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  "netCDF4>=1.6",
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  "scipy>=1.11",
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- "gpuwm>=2.6.1,<2.6.2",
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+ "gpuwm>=2.6.4,<2.6.6",
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  ]
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  # Search terms, which is what a keyword is: the words somebody types into
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  # PyPI when they are looking for this kind of thing. `MPAS` is here as a