gitcad-ecad 0.7.7__tar.gz

gitcad_ecad-0.7.7/.gitignore

@@ -0,0 +1,38 @@
+# Generated geometry is a build artifact, NOT source (ADR-0004). Never commit it.
+*.brep
+*.step
+*.stp
+*.stl
+*.gltf
+*.glb
+*.iges
+*.igs
+# Drawings are generated from the model too.
+/build-artifacts/
+*.dxf
+# PDFs generated from drawings (keep hand-authored docs elsewhere if needed).
+/out/
+
+# Python
+__pycache__/
+*.py[cod]
+*.egg-info/
+.eggs/
+build/
+dist/
+.venv/
+venv/
+
+# Tooling
+.pytest_cache/
+.coverage
+.coverage.*
+htmlcov/
+.mypy_cache/
+.ruff_cache/
+
+# Editors / OS
+.vscode/
+.idea/
+.DS_Store
+Thumbs.db

gitcad_ecad-0.7.7/PKG-INFO

@@ -0,0 +1,40 @@
+Metadata-Version: 2.4
+Name: gitcad-ecad
+Version: 0.7.7
+Summary: gitcad electrical: schematic+ERC, board, DRC, connectivity, fab outputs, KiCad import
+Project-URL: Homepage, https://gitcad.xyz
+Project-URL: Repository, https://github.com/gitcad-xyz/gitcad
+Project-URL: Issues, https://github.com/gitcad-xyz/gitcad/issues
+Author-email: Dan Willis <danielcwillis@gmail.com>
+License-Expression: Apache-2.0
+Keywords: drc,ecad,eda,erc,gerber,ipc-2581,kicad,pcb,schematic
+Classifier: Development Status :: 4 - Beta
+Classifier: Intended Audience :: Developers
+Classifier: Intended Audience :: Manufacturing
+Classifier: License :: OSI Approved :: Apache Software License
+Classifier: Operating System :: OS Independent
+Classifier: Programming Language :: Python :: 3
+Classifier: Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)
+Requires-Python: >=3.10
+Requires-Dist: gitcad-core==0.7.7
+Description-Content-Type: text/markdown
+
+# gitcad-ecad
+
+Electrical domain for [**gitcad**](https://gitcad.xyz) — schematic through
+fabrication, one git-native substrate.
+
+- **Schematic capture** — netlist-level and sheet-level, with ERC and typed
+  electrical-envelope checks (voltage/current specs on interfaces).
+- **Board** — multi-layer stackup, tracks/zones/vias (incl. blind/buried),
+  net classes, keepouts, DRC with rule packs, connectivity.
+- **Schematic ↔ board parity** and back-annotation.
+- **Fab outputs** — Gerber (RS-274X), Excellon drill, pick-and-place, IPC-2581,
+  BOM.
+- **KiCad import** — `.kicad_sch` / `.kicad_pcb` with real wire geometry and
+  hierarchical sheet instances.
+
+Pure Python, no third-party runtime dependencies. Install the full system with
+`pip install gitcad`.
+
+Apache-2.0 · https://github.com/gitcad-xyz/gitcad

gitcad_ecad-0.7.7/README.md

@@ -0,0 +1,19 @@
+# gitcad-ecad
+
+Electrical domain for [**gitcad**](https://gitcad.xyz) — schematic through
+fabrication, one git-native substrate.
+
+- **Schematic capture** — netlist-level and sheet-level, with ERC and typed
+  electrical-envelope checks (voltage/current specs on interfaces).
+- **Board** — multi-layer stackup, tracks/zones/vias (incl. blind/buried),
+  net classes, keepouts, DRC with rule packs, connectivity.
+- **Schematic ↔ board parity** and back-annotation.
+- **Fab outputs** — Gerber (RS-274X), Excellon drill, pick-and-place, IPC-2581,
+  BOM.
+- **KiCad import** — `.kicad_sch` / `.kicad_pcb` with real wire geometry and
+  hierarchical sheet instances.
+
+Pure Python, no third-party runtime dependencies. Install the full system with
+`pip install gitcad`.
+
+Apache-2.0 · https://github.com/gitcad-xyz/gitcad

gitcad_ecad-0.7.7/pyproject.toml

@@ -0,0 +1,31 @@
+[build-system]
+requires = ["hatchling"]
+build-backend = "hatchling.build"
+
+[project]
+name = "gitcad-ecad"
+version = "0.7.7"
+description = "gitcad electrical: schematic+ERC, board, DRC, connectivity, fab outputs, KiCad import"
+readme = "README.md"
+requires-python = ">=3.10"
+license = "Apache-2.0"
+authors = [{name = "Dan Willis", email = "danielcwillis@gmail.com"}]
+keywords = ["eda", "ecad", "pcb", "schematic", "gerber", "drc", "erc", "kicad", "ipc-2581"]
+classifiers = [
+    "Development Status :: 4 - Beta",
+    "Intended Audience :: Developers",
+    "Intended Audience :: Manufacturing",
+    "License :: OSI Approved :: Apache Software License",
+    "Operating System :: OS Independent",
+    "Programming Language :: Python :: 3",
+    "Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)",
+]
+dependencies = ["gitcad-core==0.7.7"]
+
+[project.urls]
+Homepage = "https://gitcad.xyz"
+Repository = "https://github.com/gitcad-xyz/gitcad"
+Issues = "https://github.com/gitcad-xyz/gitcad/issues"
+
+[tool.hatch.build.targets.wheel]
+packages = ["src/gitcad"]

gitcad_ecad-0.7.7/src/gitcad/ecad/__init__.py

@@ -0,0 +1,34 @@
+"""gitcad-ecad — the electrical domain.
+
+v0.1 scope: a text-first board model plus the fabrication outputs that let a
+user actually order a PCB — Gerber X2 per layer, Excellon drill, pick-and-place.
+Schematic capture, ERC, and the full DRC engine follow (see
+docs/research/feature-map.md Part B).
+
+Like the mechanical document, the board is canonical text (ADR-0004): the
+model diffs and merges in git, and every generated output is deterministic —
+the same board text produces byte-identical Gerbers on any machine.
+"""
+
+from gitcad.ecad.board import Board, Component, Footprint, MountingHole, Pad, Track, Via, Zone
+from gitcad.ecad.fab import export_fab
+from gitcad.ecad.bom import bom, bom_csv, mpn_component
+from gitcad.ecad.component import footprint_from_part, footprint_to_part
+from gitcad.ecad.connectivity import check_connectivity
+from gitcad.ecad.drc import Rule, RulePack, default_rules, run_drc
+from gitcad.ecad.route import pad_position, route
+from gitcad.ecad.schematic import (Pin, SchComponent, Schematic, board_parity,
+                                   merge_schematics)
+from gitcad.ecad.envelope import check_envelopes, net_voltage, power_budget
+from gitcad.ecad.netderive import derive_nets, sheet_parity
+from gitcad.ecad.spice import sim_check, to_spice
+from gitcad.ecad.schsvg import schematic_to_svg
+
+__all__ = ["Board", "Component", "Footprint", "MountingHole", "Pad", "Track", "Via", "Zone",
+           "export_fab", "Schematic", "SchComponent", "Pin", "board_parity",
+           "Rule", "RulePack", "default_rules", "run_drc", "check_connectivity",
+           "pad_position", "route", "footprint_to_part", "footprint_from_part",
+           "mpn_component", "bom", "bom_csv", "schematic_to_svg",
+           "merge_schematics", "derive_nets", "sheet_parity",
+           "check_envelopes", "net_voltage", "power_budget",
+           "to_spice", "sim_check"]

gitcad_ecad-0.7.7/src/gitcad/ecad/annotate.py

@@ -0,0 +1,63 @@
+"""schematic_annotate — deterministic reference numbering (KiCad-map P4).
+
+Components with placeholder refs (``R?``, ``U?`` — the KiCad convention)
+get the lowest free number for their prefix, in a deterministic order:
+sheet position (top-to-bottom, then left-to-right) when placements exist,
+declaration order otherwise. Existing numbered refs are never touched —
+annotation fills gaps, it does not reshuffle a reviewed design. Net pin
+references follow the renames atomically.
+"""
+
+from __future__ import annotations
+
+import re
+
+from gitcad.ecad.schematic import Schematic
+from gitcad.errors import GitcadError
+
+_REF = re.compile(r"^([A-Za-z_]+)(\?|\d+)$")
+
+
+def annotate(sch: Schematic) -> dict[str, str]:
+    """Assign numbers to ``?`` refs in place; returns {old_label: new_ref}
+    keyed by a positional label (``R?@2`` for the third placeholder R).
+
+    Nets may not reference placeholders — ``R?.1`` is ambiguous when two
+    unannotated Rs exist, so we refuse rather than guess: annotate first,
+    then connect (or connect by final refs)."""
+    for net, prs in sch.nets.items():
+        for pr in prs:
+            if "?" in pr.split(".", 1)[0]:
+                raise GitcadError(
+                    f"net {net!r} references placeholder ref {pr!r} — "
+                    "annotate before connecting, or connect by the final ref")
+    used: dict[str, set[int]] = {}
+    placeholders = []
+    decl_counter: dict[str, int] = {}
+    for i, comp in enumerate(sch.components):
+        m = _REF.match(comp.ref)
+        if not m:
+            raise GitcadError(f"unparseable ref {comp.ref!r} (want PREFIX+number or PREFIX?)")
+        prefix, num = m.groups()
+        if num == "?":
+            at = comp.attrs.get("at")
+            sort_key = (at[1], at[0], i) if at else (float("inf"), float("inf"), i)
+            k = decl_counter.get(prefix, 0)          # label by DECLARATION order
+            decl_counter[prefix] = k + 1
+            placeholders.append((prefix, sort_key, f"{prefix}?@{k}", comp))
+        else:
+            used.setdefault(prefix, set()).add(int(num))
+
+    renames: dict[str, str] = {}
+    counters: dict[str, int] = {}
+    # numbering order is READING order (top-to-bottom, left-to-right)
+    for prefix, _key, label, comp in sorted(placeholders, key=lambda p: (p[0], p[1])):
+        n = counters.get(prefix, 1)
+        taken = used.setdefault(prefix, set())
+        while n in taken:
+            n += 1
+        taken.add(n)
+        counters[prefix] = n + 1
+        renames[label] = f"{prefix}{n}"
+        comp.ref = f"{prefix}{n}"
+    return renames

gitcad_ecad-0.7.7/src/gitcad/ecad/autoroute.py

@@ -0,0 +1,210 @@
+"""Autorouting assist v1 — a grid maze router for agents.
+
+Not push-and-shove: a deterministic BFS over a clearance-aware obstacle
+grid (Lee router), one net at a time, through-vias for layer changes.
+The result is ordinary Tracks/Vias appended to the board — the same
+check chain that gates hand routing (DRC, connectivity) gates this.
+Honest refusal: no path means ``autoroute-no-path``, never a
+rules-violating trace.
+
+Scope v1: routes between the net's pad centers on the outer layers (or
+any copper layer list you pass), rectilinear steps on a fixed grid.
+Pour-covered boards refuse fast — a pour IS the route.
+"""
+
+from __future__ import annotations
+
+from gitcad.ecad.board import Board, Track, Via
+from gitcad.errors import GitcadError
+
+
+def autoroute(board: Board, net: str, *, grid: float = 0.25,
+              width: float = 0.25, clearance: float = 0.2,
+              layers: tuple[str, ...] | None = None,
+              via_drill: float = 0.4, via_diameter: float = 0.8) -> dict:
+    """Route every pad of ``net`` into one connected tree. Returns
+    {"tracks": n, "vias": n}. Raises GitcadError when no path exists."""
+    copper = board.copper_layers()
+    layer_list = list(layers) if layers else ["top", "bottom"]
+    for ly in layer_list:
+        if ly not in copper:
+            raise GitcadError(f"unknown layer {ly!r}")
+
+    minx, miny, maxx, maxy = board.bbox()
+    nx = int((maxx - minx) / grid) + 1
+    ny = int((maxy - miny) / grid) + 1
+    if nx * ny > 1_500_000:
+        raise GitcadError(
+            f"autoroute grid {nx}x{ny} too large — coarsen `grid`")
+
+    def cell(x: float, y: float) -> tuple[int, int]:
+        return (round((x - minx) / grid), round((y - miny) / grid))
+
+    def pos(c: tuple[int, int]) -> tuple[float, float]:
+        return (minx + c[0] * grid, miny + c[1] * grid)
+
+    # -- obstacle rasterization (other-net copper, inflated) -------------------
+    # tracks need clearance + track half-width; via barrels are wider, so
+    # via placement checks a second grid with the bigger margin
+    margin = clearance + width / 2
+    margin_via = clearance + via_diameter / 2
+    blocked: list[set] = [set() for _ in layer_list]
+    blocked_via: list[set] = [set() for _ in layer_list]
+    li = {name: i for i, name in enumerate(layer_list)}
+
+    def block_disc(x: float, y: float, r: float, idxs) -> None:
+        for grid_set, mg in ((blocked, margin), (blocked_via, margin_via)):
+            rr = r + mg
+            c0x, c0y = cell(x - rr, y - rr)
+            c1x, c1y = cell(x + rr, y + rr)
+            for cx in range(max(0, c0x), min(nx, c1x + 1)):
+                for cy in range(max(0, c0y), min(ny, c1y + 1)):
+                    px, py = pos((cx, cy))
+                    if (px - x) ** 2 + (py - y) ** 2 <= rr * rr:
+                        for i in idxs:
+                            grid_set[i].add((cx, cy))
+
+    def block_seg(x1, y1, x2, y2, half_w, idx) -> None:
+        steps = max(1, int(((x2 - x1) ** 2 + (y2 - y1) ** 2) ** 0.5 / grid) * 2)
+        for s in range(steps + 1):
+            t = s / steps
+            block_disc(x1 + (x2 - x1) * t, y1 + (y2 - y1) * t, half_w, [idx])
+
+    all_idx = list(range(len(layer_list)))
+    for comp in board.components:
+        for pad, bx, by, rot in comp.placed_pads():
+            if comp.nets.get(pad.name, "") == net:
+                continue
+            w, h = (pad.h, pad.w) if round(rot) % 180 == 90 else (pad.w, pad.h)
+            r = max(w, h) / 2
+            if pad.drill is not None:
+                block_disc(bx, by, r, all_idx)
+            elif comp.side in li:
+                block_disc(bx, by, r, [li[comp.side]])
+    for v in board.vias:
+        if v.net == net:
+            continue
+        sp = set(v.span(copper))
+        idxs = [li[ly] for ly in layer_list if ly in sp] or all_idx
+        block_disc(v.x, v.y, v.diameter / 2, idxs)
+    for t in board.tracks:
+        if t.net == net or t.layer not in li:
+            continue
+        block_seg(t.x1, t.y1, t.x2, t.y2, t.width / 2, li[t.layer])
+    for z in board.zones:
+        if z.kind == "keepout":
+            xs = [p[0] for p in z.polygon]
+            ys = [p[1] for p in z.polygon]
+            for ly in ([z.layer] if z.layer in li else []):
+                c0, c1 = cell(min(xs), min(ys)), cell(max(xs), max(ys))
+                for cx in range(max(0, c0[0]), min(nx, c1[0] + 1)):
+                    for cy in range(max(0, c0[1]), min(ny, c1[1] + 1)):
+                        blocked[li[ly]].add((cx, cy))
+        elif z.kind == "copper" and z.net != net and z.layer in li:
+            xs = [p[0] for p in z.polygon]
+            ys = [p[1] for p in z.polygon]
+            c0, c1 = cell(min(xs), min(ys)), cell(max(xs), max(ys))
+            for cx in range(max(0, c0[0]), min(nx, c1[0] + 1)):
+                for cy in range(max(0, c0[1]), min(ny, c1[1] + 1)):
+                    blocked[li[z.layer]].add((cx, cy))
+
+    # -- terminals -------------------------------------------------------------
+    terminals: list[tuple[tuple[int, int], int]] = []   # (cell, layer idx)
+    for comp in board.components:
+        for pad, bx, by, _rot in comp.placed_pads():
+            if comp.nets.get(pad.name, "") != net:
+                continue
+            if pad.drill is not None:
+                terminals.append((cell(bx, by), 0))
+            elif comp.side in li:
+                terminals.append((cell(bx, by), li[comp.side]))
+    if len(terminals) < 2:
+        raise GitcadError(f"net {net!r} has fewer than 2 routable pads")
+
+    # -- sequential Lee routing ------------------------------------------------
+    tree: set[tuple[int, int, int]] = set()
+    first_cell, first_li = terminals[0]
+    tree.add((first_cell[0], first_cell[1], first_li))
+    tracks_added = vias_added = 0
+
+    for term_cell, term_li in terminals[1:]:
+        start = (term_cell[0], term_cell[1], term_li)
+        if start in tree:
+            continue
+        import heapq
+
+        prev: dict = {start: None}
+        dist: dict = {start: 0}
+        heap: list[tuple[int, tuple]] = [(0, start)]
+        via_cost = max(1, int(3.0 / grid))              # a via "costs" ~3 mm
+        goal = None
+        while heap:
+            d, cur = heapq.heappop(heap)
+            if d > dist.get(cur, 1 << 30):
+                continue
+            if cur in tree:
+                goal = cur
+                break
+            cx, cy, cl = cur
+            steps = [((cx + 1, cy, cl), 1), ((cx - 1, cy, cl), 1),
+                     ((cx, cy + 1, cl), 1), ((cx, cy - 1, cl), 1)]
+            for other in range(len(layer_list)):        # through-via move
+                if other != cl:
+                    steps.append(((cx, cy, other), via_cost))
+            for nxt, cost in steps:
+                tx, ty, tl = nxt
+                if not (0 <= tx < nx and 0 <= ty < ny):
+                    continue
+                if tl != cl:                            # via: all layers clear
+                    if any((tx, ty) in blocked_via[i]
+                           for i in range(len(layer_list))):
+                        continue
+                elif (tx, ty) in blocked[tl]:
+                    continue
+                nd = d + cost
+                if nd < dist.get(nxt, 1 << 30):
+                    dist[nxt] = nd
+                    prev[nxt] = cur
+                    heapq.heappush(heap, (nd, nxt))
+        if goal is None:
+            raise GitcadError(f"autoroute-no-path:{net}")
+
+        # walk back, merging straight runs into tracks
+        path = []
+        n_ = goal
+        while n_ is not None:
+            path.append(n_)
+            n_ = prev[n_]
+        run_start = path[0]
+        for a, b in zip(path, path[1:]):
+            if a[2] != b[2]:                            # layer change: via at a
+                if run_start[:2] != a[:2]:
+                    _emit(board, pos(run_start[:2]), pos(a[:2]),
+                          layer_list[a[2]], width, net)
+                    tracks_added += 1
+                board.vias.append(Via(*pos(a[:2]), drill=via_drill,
+                                      diameter=via_diameter, net=net))
+                vias_added += 1
+                run_start = b
+            elif _turns(run_start, a, b):
+                _emit(board, pos(run_start[:2]), pos(a[:2]),
+                      layer_list[a[2]], width, net)
+                tracks_added += 1
+                run_start = a
+        last = path[-1]
+        if run_start[:2] != last[:2]:
+            _emit(board, pos(run_start[:2]), pos(last[:2]),
+                  layer_list[last[2]], width, net)
+            tracks_added += 1
+        tree.update(path)
+
+    return {"tracks": tracks_added, "vias": vias_added}
+
+
+def _turns(run_start, a, b) -> bool:
+    return ((b[0] - run_start[0]) * (a[1] - run_start[1])
+            != (b[1] - run_start[1]) * (a[0] - run_start[0]))
+
+
+def _emit(board: Board, p1, p2, layer: str, width: float, net: str) -> None:
+    board.tracks.append(Track(p1[0], p1[1], p2[0], p2[1], width, layer, net))