fenolite 0.0.1.dev0__tar.gz → 0.2.0__tar.gz

fenolite-0.2.0/.gitignore

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+# Claude Code local state
+.claude/*
+
+# Private planning material (never published)
+private/
+
+# Real boards built with Fenolite while it grows (dogfooding, never published)
+dogfood/
+
+# Fenolite derived cache
+.fenolite/
+
+# Python / tooling
+.venv/
+__pycache__/
+*.py[cod]
+.pytest_cache/
+.ruff_cache/
+.hypothesis/
+.coverage
+htmlcov/
+/dist/
+/build/
+*.egg-info/
+
+# Editor/OS
+.DS_Store
+.idea/
+.vscode/
+
+# Backups written by atomic saves
+*.bak
+
+# Temporary verification artefacts
+verify_results/*.tmp

fenolite-0.2.0/CHANGELOG.md

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+# Changelog
+
+All notable changes to Fenolite are documented here. The format follows
+[Keep a Changelog](https://keepachangelog.com/en/1.1.0/) and the project uses
+[Semantic Versioning](https://semver.org/) (pre-1.0: minor versions may break).
+
+## [Unreleased]
+
+## [0.2.0] - 2026-10-06
+
+### Added
+
+- v0.2 acceptance: the schematic of a built project judged by KiCad's own ERC, netlist and parity test on 9.0 and 10.0, round trips of the demo schematics, the BOM and placement tables, the project manifest, the inspection commands, the complete layout lens, six more rule kinds and Fenolite's own parity check; the release record `docs/release/v0.2.md` names the test behind each item, its limits and what else is in the package (c0093).
+- `fenolite build` writes a schematic (`<name>.kicad_sch`, symbol libraries and `sym-lib-table`) that KiCad's ERC and parity test accept on 9.0 and 10.0; pads of unconnected pins and net names with a slash are written as KiCad stores them; `--schematic skip` keeps the previous output (c0061). A sheet holds every unit of every part, a global label per connected pin, a no-connect flag per `no_connect` mark and a power flag per supply net that nothing drives; `schematic-placements.toml` beside the script fixes symbol positions, and an edited schematic is replaced with a warning and a backup (`docs/schematic.md`). New `build` issue codes are listed in `docs/cli-contract.md`.
+- The schematic gets one sheet per module and puts 2-pin parts beside the IC pins they connect to, joined by a wire; `--schematic-layout grid` writes one flat sheet. Each module with a part is written to `sheets/<module path>.kicad_sch` and named by a box without pins on the sheet above it; nets cross sheets by their global labels, so net names stay those of the script, and a footprint of a part in a module carries the path of its sheets. `fenolite netlist --source fenolite` and the build's netlist guard read the sheet tree and the wires, so a sheet that KiCad would drop in silence stops the build. `fenolite parity` and the `parity` stage of `check` read the sheet tree with Fenolite's own netlist, so a project with module sheets needs no tool there either (c0070). The Reference and the Value of a turned or mirrored symbol are written level and centred, clear of the labels at its pins.
+- KiCad schematics are read into a typed sheet (symbols, labels, no-connect flags, sheet references, embedded symbols) with every other child kept in place: `fenolite.backends.kicad.sch.read_schematic`, `rebuild_schematic`, `roundtrip_schematic`, `sheet_files`, `components` and `hierarchy_components`, and the model `fenolite.model.schematic.SchematicSheet` with schema `fenolite.schematic.v0`. Round trips are proved over the demo schematics: RT0 and RT1 pass on the 125 readable demo rows and on two third-party schematics re-saved by KiCad 10 (`H-K-SCH-READ`, `H-K-SCH-RT1`), and the components read from 34 demo projects on 10.0.6 and 31 on 9.0.9 equal those of `kicad-cli sch export netlist` (`H-K-SCH-COMPONENTS-2`). The token fuzz has load checks for schematics and symbol libraries, and the token inventory covers schematic and symbol-library tokens: 49 rows and one form row of kinds `kicad_sch` and `kicad_sym`, each proved by the fuzz on 9.0.9 and 10.0.6 (`H-K-SCH-TOKENS`); a symbol-library row also matches inside a schematic. (c0060).
+- `fenolite check` runs KiCad's ERC (`erc.kicad`) on the project's schematic and reports schematic parity findings of the DRC run (c0062). ERC violations are `kicad.erc.<type>` issues located as `REF-PIN`, `REF` or a label text; parity entries are `kicad.drc.<type>` issues, and `kicad.drc.parity-unchecked` says when KiCad could not compare the board with its schematic. The copy of a project that `kicad-cli` sees now holds the schematic, its sheet files, `sym-lib-table` and the project's symbol libraries. In a manifest, a sheet, a symbol library and the symbol table reach `native-verified` through that stage.
+- `fenolite netlist`: components and nets of a KiCad project as JSON, from `kicad-cli` or from Fenolite's own reading of a generated schematic; `build` refuses a schematic whose netlist differs from the circuit; `check` compares the schematic's netlist with the model and the board (c0063). The own reading equals the export of `kicad-cli` 9.0.9 and 10.0.6 on the examples and on 25 generated designs.
+- New command `parity` and `check` stage `parity`: schematic against board and symbol pins against footprint pads, without KiCad for generated projects, cross-checked with KiCad's parity test when it runs. Its counts per type equal KiCad's on the public demos of 9.0.9 and 10.0.6 (c0072).
+- `fenolite bom` and `fenolite pnp`: the bill of materials and the placement table of a project as neutral tables, rendered to CSV through a user-written column template (names, order, grouping, units, origin, side names, rotation rules); no template of any assembly service ships. The bill has two sources: the model (`--source model`) and `kicad`, the default, whose parts come from `kicad-cli sch export bom` on a copy of the project's schematic, one row per reference, and Fenolite groups them under the user's column template. Options `--kicad-cli` and `--timeout`; code `bom.field-unsupported`; `counts.left_out` is `null` for this source. Measured on KiCad 9.0.9 and 10.0.6: the export's rows (`H-K-BOM-CSV`), the parts of a built model equal to KiCad's (`H-K-BOM-MODEL`) and the placement rows (`H-K-POS-ROWS`) are `KICAD-VERIFIED` (c0064; guide `docs/assembly.md`).
+- `fenolite manifest`: a project manifest with the SHA-256 and a state (`generated`, `checked`, `roundtrip-ok`, `native-verified`) for every design file and artefact, and `--verify` to compare it with the files on disk; `--manifest` on `export`, `render`, `bom` and `pnp` now merges into the folder's manifest instead of replacing it. Each entry says in `held` what its next state is missing. A state is read from the stages of `check` and never says more than they do: a board is `native-verified` when KiCad's DRC reports no error, a file made from it stops at `checked`, and a schematic, its symbol libraries and their table are `native-verified` when KiCad's ERC reports no error. Manifests written by v0.1 are still read (c0065; guide `docs/exports.md`).
+- New commands `diff`, `roundtrip`, `fmt`, `explain`, `restore`, `net`, `region` and `neighbors`; `--limit` and `--cursor` page a command's main list, `--format concise` keeps one issue per code; receipts carry an `id` and the `undo` command (c0066). `diff` lists the exact differences between two boards, libraries or built models (a moved footprint is one change) and has a tree view of two KiCad files; `roundtrip` says whether a file survives RT0, RT1 and, through `kicad-cli`, RT2; `fmt` writes Fenolite's canonical print, a fixed point over the corpus; `explain` knows every error and issue code; `restore` puts back the backups of a confirmed write and deletes nothing. `diff` compares two schematics in its model view (`diff_sheets`: symbols by reference and unit, sheet references and embedded symbols by name, labels and no-connect flags by content), and `roundtrip` reaches RT1 on a schematic through the schematic reader's rebuild. The fixed point of `fmt` is measured over the 132 schematic rows of the corpus as well. `roundtrip --level rt2` also judges the schematic of a project (`result.rt2.schematic`): KiCad's ERC on the project and on Fenolite's re-dump of its sheets must give the same kinds of violations, the sheet, type, severity and exclusion of each (`ErcReport.kinds()`), and `exact` says whether the items agreed too. The item KiCad names for one violation can differ between two runs on one unchanged project, on 9.0.9 and on 10.0.6, so the items are not compared; a project on which the kinds do not repeat is not judged.
+- `capabilities` lists `result.matrix`: for each backend and file kind, the evidence level of `detect`, `read`, `write`, `roundtrip_exact` and `roundtrip_modified`, the hypotheses behind it and the operations that are experimental. Every backend module now declares its evidence, and `docs/evidence/matrix.md` is generated from the declarations (`tools/gen_evidence_matrix.py`, with `--check`). A backend module without a declaration fails `tests/unit/backends/test_evidence_declared.py`, whose message says what to add, and every declared level is held to `docs/hypotheses.md`. The KiCad backend lists the write kind `kicad_lib_table`, and the Altium schematic reader's evidence no longer names the refuted `H-A-RD-SCH-TEXT` (c0067).
+- `moved()` takes module paths and `moved_net()` renames nets without losing their routing; a footprint renamed through an alias keeps its KiCad edits (its uuids and its group memberships follow the new path); `fenolite sync --to-source` writes `placements.toml`, which `build` reads beside the script, for both targets and with `--discard-layout` too; `sync --check` fails when the committed file is stale, and `sync` reports what the next build would drop (`sync.orphan`, `sync.net-dropped`, `sync.value-differs`). `sync` also writes `schematic-placements.toml` from the symbols moved in KiCad's schematic editor, and reports a symbol it cannot hold with `sync.symbol-off-grid` (c0069).
+- Six more rule kinds (hole to hole, hole clearance, annular width, courtyard, silkscreen, creepage) in the model, the `.kicad_dru` writer and reader, and `design.rules.rule()` with selectors from `fenolite.dsl.select`. Each kind is written only for the KiCad majors that enforce it: creepage rules are written for KiCad 10 only, and a build for KiCad 9 refuses them unless `--allow-lossy` drops them. A hand-written rule of one of these kinds is now read into the model instead of being kept opaque (c0071).
+- Exact `Quantity` values in the DSL (`ohm("4k7")`, `farad("100n")`), typed `I2C`, `SPI`, `UART` and `USB2` interfaces with `attach` by role, and build warnings for differential-pair names KiCad does not pair (`build.diff-pair-name`) and for I2C lines without a pull-up (`build.i2c-pullup-missing`). A `Part` value given as a quantity is stored as its canonical text (`4.7kΩ`). KiCad 9.0.9 and 10.0.6 pair two net names that are equal except for a last `P`/`N` or `+`/`-` (c0073).
+- `design.sheet()` and `design.title_block()` put the user's drawing sheet and title block on the board, and on the schematic when a build writes one: the build writes `<name>.kicad_wks` from a `.kicad_wks` or `*.sheet.toml` beside the script; `fenolite export --preset` applies the user's fab options from a TOML file; board outlines join endpoints closer than 10 µm and include footprint edge items, so all 21 demo boards close; stitching avoids rule areas that forbid vias and the board edge. KiCad 9.0.9 and 10.0.6 close an outline across a gap below 10 µm (c0074).
+- New in the DSL: `Part.zone_connection`, `arc_to`, and `kind=` for vias; `build` reports `result.copper.arcs` and `result.preserved.pad_zones`. New command `pads` (c0068).
+- DSL symbol authoring: design-attached `Symbol` definitions resolve custom component pins and are written as project-local KiCad symbol libraries with a `sym-lib-table` (c0058).
+- Footprint DSL: `Footprint.pad(..., shared=True)` can author additional physical pads with the same number as an earlier pad, with stable unique IDs; accidental duplicates still fail.
+- An offline catalog authored for Fenolite: 49 generic schematic symbols (passives, semiconductors, protection, power and control parts, electromechanical parts) and 100 footprint variants (chip and MELF parts, small-outline diodes and transistors, SOIC, TSSOP, MSOP and SSOP, QFN and DFN, QFP, DIP, 2.54 mm headers, connectors, buttons, radial and axial parts, mounting holes, a test point), with discovery through the API and `fenolite catalog`, resolution at build without a fetch, and project overrides. Every entry cites its public source; a symbol states a function and not a pinout, and a footprint is assigned in the script, never guessed. Land patterns are `INFERRED` starting points that need a review per part and process. Body outlines are on `F.Fab`, so silkscreen does not cross copper (c0075, c0076).
+- Symbol definitions and DSL-authored symbols now carry ordered vector body graphics, which the KiCad symbol reader and writer preserve; the writer also keeps hidden pin-name and pin-number settings on a round trip (c0075, c0076).
+- The `altium` backend reads `.PrjPcb`, `.SchDoc`, `.SchLib`, `.PcbDoc` and `.PcbLib` into the neutral model (nets from wires, labels, ports, power ports, buses and harnesses); a project read links footprints to schematic components by unique-id path and PCB nets by name. On four public Altium-saved projects from four repositories the schematic netlist equals the pad netlist of the PCB document, and the board import agrees with `kicad-cli pcb import` 10.0 (c0043).
+- Model: `Circuit.buses` (`Bus`, `BusMember`), `PadstackLayer.offset`, and `ComponentBody` on footprint instances and definitions, with the findings `model.duplicate-bus-index` and `model.body-height`; all additive, the schemas are regenerated (c0043).
+- `fenolite.backends.altium.read.bodies` decodes the component-body records of PCB documents and libraries byte for byte (c0043).
+- Altium schematic reader: `fenolite.backends.altium.read.sch.read_schematic` reads `.SchDoc` and `.SchDot` files (binary and ASCII), and `read.schlib.read_schlib` reads `.SchLib` files into typed records with an owner tree. Unknown keys, records, streams and trailing bytes are preserved; streams rebuild byte for byte. Nine schematic and nine library rows join the corpus, and `tools/altium_census.py` reports their census (c0040).
+- Altium PCB reader: lossless typed readers for Altium `.PcbDoc` and `.PcbLib` files preserve record bytes and keys, accept long and short record forms, and report located issues with strict mode available. Checked against eleven public files and KiCad CLI import/upgrade (c0041).
+- Altium verification: `fenolite check` and `fenolite inspect` accept Altium documents and projects, read-only and without external tools; the round-trip levels RT-A0 (container copy), RT-A1 (records per stream) and RT-A2 (model → Altium → model on built projects, for what the built model holds: the circuit and the net classes); `fenolite diff A B` reads Altium inputs in its model view and gains a records view (`--view records`) for two Altium files of one kind; results over the public corpus in `docs/evidence/altium-roundtrip.md` (c0044).
+- Design equivalence: `fenolite equivalent A [B] --level N` compares two designs at levels 1 to 4 (components, netlist as `REF-PIN` sets, footprints and pads, placement) with located differences, integer tolerances (`--tolerance-nm`, `--tolerance-udeg`), `--frame relative` and exclusion profiles; `--against kicad-import` compares Fenolite's read of a PCB document with `kicad-cli pcb import` (10.0 only) under a per-version exclusion list; results per corpus row in `docs/evidence/equivalence-triangle.md` (c0045).
+- Altium sheet templates: `fenolite template import SRC --target kicad --out OUT` imports a `.SchDot` (or the template graphics of a `.SchDoc`) into the neutral drawing sheet and writes a `.kicad_wks`; size, lines, rectangles, texts, special strings and embedded PNG images are imported, everything else is reported, and a loss needs `--allow-lossy`. Writing a `.SchDot` is not included (c0046).
+
+### Changed
+
+- Built projects change once. The next build of a v0.1 project adds the schematic files, with new files under `sheets/` and new footprint paths for parts in modules, and renames, in the board file only, the nets of unconnected pads (`unconnected-(U1-PA1-Pad2)`) and of nets with a slash (`mod{slash}LED_A`). Layouts, positions, tracks and zone fills are kept, and no other net is renamed (c0061, c0070).
+- `fenolite check`: the `erc.lite` stage is removed from KiCad checks (`--stages erc.lite` is now a usage error), and the hermetic stage list is `--stages model.validate,roundtrip` (c0062). `fenolite check` now treats a pad on no net as a block of its own, reads the `N/C` label of the IPC-D-356 export as no net, and names a model pin by its pad when the part has a `pad_map`.
+- `check` and the copper guard of `build` now apply a zone's own clearance between a fill and other copper, as KiCad's DRC does, and place the copper of a pad with an offset drill where KiCad places it: boards may gain `copper.clearance` findings of source `zone` and lose false ones on such pads (`--copper-check warn` writes anyway). `BoardPad.hole` of such a pad is back at the pad's position. The facts are measured on KiCad 9.0.9 and 10.0.6 (c0068).
+- `fenolite capabilities` lists two backends, `altium` before `kicad`: select a backend by its `name`, not by its position (c0043).
+- A component whose value is empty in the script is stored in the built model of an Altium build with the value its documents hold, the symbol's name (c0044).
+- Examples: `examples/blink_2layer` marks its 29 unused pins with `no_connect` and `examples/blink_routed` marks its unused pins, so their schematics pass KiCad's ERC; the boards are unchanged, and the blink gets its resistor beside the controller pin on the sheet. `examples/blink_official` connects the analog supply pins of its microcontroller and marks its unused pins: KiCad's ERC reports nothing on it (it reported 29 errors and one warning). An authored symbol library for KiCad 9 now carries the 9.0 header version (`20241209`, was `20231120`).
+- Development: Archived the completed specs of c0040 to c0046, c0060 to c0069, c0071 to c0076 and c0082, and cited their CI runs in the hypothesis register. A nightly job, `macos-app`, runs the KiCad tests on the `kicad-cli` of the 10.0.6 macOS disk image. The worksheet version oracle runs on fresh copies with its own configuration folders (c0082); the oracles of the Altium readers share one table of the corpus rows on which the Linux build of `kicad-cli` 10.0.6 fails in its own importer; a cost test of the Altium schematic reader counts calls instead of comparing times; cross-platform path assertions were repaired. None of this changes what the command line or the library does.
+
+### Fixed
+
+- `route` no longer hands a router the one-pad `unconnected-(…)` nets that a build gives unused pins since the schematic writer: with them Freerouting left one connection of the 40-part example open.
+- A component read from an Altium PCB document takes the designator text the board shows as its reference, and its source designator only without one, so the components of a repeated sheet no longer share a reference in a board read on its own; the fault was found by the equivalence triangle (c0045).
+- `fenolite bom` no longer puts a part marked "do not populate" (DNP) on the line of fitted parts of the same value: with `exclude_dnp = false` in the column template, a line is all DNP or all fitted, whether or not `group_by` names `dnp`, for both sources, so no quantity counts a part that is not fitted. A DNP line stands where its first reference puts it, like every line. With `--against`, the `key` of a DNP line ends with `DNP` (c0094; guide `docs/assembly.md`).
+
+## [0.1.0] - 2026-10-05
+
+### Added
+
+- v0.1 acceptance: a second example board of forty parts, the loop proved on both examples and both KiCad majors, the agent guide `agent/SKILL.md`, the `wheel` and `dco` jobs, Windows and Python 3.11 to 3.13 in CI, and the release record `docs/release/v0.1.md`.
+- Altium project reader (c0042): `fenolite.backends.altium.read` reads the project file (`.PrjPcb`: documents and their kinds, parameters, the `[Design]` options and the hierarchy mode), output jobs (`.OutJob`), rule files in the export and the summary form (`.RUL`) and stack-up files (`.stackup`), each given back byte for byte with its byte-order mark, line ends, encoding and unknown keys. `rules.map_rules` maps Clearance, Width, Routing Via Style and Hole Size records onto the neutral rules through closed tables and a closed scope grammar, and lists every other record with one of ten reasons; `project.load_project` reads a project folder and its text companions for the import. Twelve public files join the corpus (`uses = altium-text`); project files and output jobs are `CORPUS-VERIFIED`, the rest `INFERRED` (`docs/evidence/altium-project-read.md`).
+- Board analyses: `fenolite analyze PATH` measures the current capacity of tracks, arcs and vias from one published fit (each constant recorded with its source in `docs/analyses.md`; `decimal` arithmetic, rounded down), the clearance of pairs of nets through air, and their creepage along the board surface, around cut-outs and around the board edge (`fenolite.analysis`). Fenolite measures and the user decides: requirements come from a user TOML file (`fenolite.requirements.v0`, integers only, a voltage table looked up without interpolation), no requirement value and no default thickness or temperature rise is shipped, and every reply is `INFERRED` or lower. Ten `analysis.*` codes; an error finding exits 5. A recorded probe on `kicad-cli` 10.0.6 shows that KiCad's `creepage` rule agrees with Fenolite around a slot (11 mm) and reports nothing for copper on opposite faces across the board edge.
+- DSL footprint authoring: a design-scoped builder creates pads and graphics; exact-ID assignments resolve in KiCad and experimental Altium builds (c0055).
+- DSL component pin-to-pad mapping and authored slotted drills; KiCad writes supported aligned oval drills, while Altium reports its unsupported slot geometry (c0056).
+- Compound-file reader for the second backend: `fenolite.backends.altium.read.cfb` reads MS-CFB versions 3 and 4 with DIFAT sectors and the mini stream, returns storages and streams by path, reports located errors and notes, and is bounded against hostile files; `fenolite inspect FILE --streams` lists the stream tree; ten public files join the corpus and CI fetches them before corpus tests (c0039).
+- Routing plugins: a router protocol with an entry-point registry, `fenolite route` with the built-in `direct` router and the KiCadRoutingTools plugin (an external MIT tool run as a subprocess at a pinned tag), routed copper merged into the board and kept by later builds (c0016).
+- Design rules in the script: `design.rules.minimum(clearance=…, track_width=…, via_diameter=…, via_drill=…, hole_size=…, edge_clearance=…, netclass=None)` declares design-rule minimums for the board or for one net class. They reach `rules.json`, the custom rules of `<name>.kicad_dru` and the board-setup minimums of `<name>.kicad_pro`, and `kicad-cli pcb drc` 9.0.9 and 10.0.6 enforce them (`H-K-DSL-MINIMUM`). The Altium build does not write them and reports them with `altium.not-lowered` (c0054).
+- Freerouting plugin (c0023): `fenolite route --router freerouting` routes a board with Freerouting 2.4.1, a GPL-3.0 autorouter run as a subprocess with its analytics disabled (`FENOLITE_FREEROUTING_JAR` or `--router-path`, Java 25, `--router-option max-passes=N`; `docker:<image>` runs a container without a network). Fenolite writes the Specctra design file itself and reads the session back (`fenolite.backends.specctra`: `dsn.write_dsn`, `ses.read_session`, `ses.to_copper`, a codec and not a registered backend): one image per footprint, board-frame padstacks, nets and classes, keep-outs, existing copper as protected wiring. `RoutingJob.extra` carries the board-frame pads and the outline to plugins; `doctor` reports the jar and its Java; `route.option-ignored` is a new issue code. The router is listed with `sends_data_offsite: true` and needs `--allow-offsite` until its run without a network is recorded. ADR-0006 (`Proposed`) covers the facts taken from the Specctra reference.
+- Zone fill: `fenolite fill` refills a board through `kicad-cli` 10 on a copy and writes the fills into the board for its own KiCad major, target 9 included; `check` gains the `zone.fill` stage; `--kicad-cli docker:<image>` runs `kicad-cli` in a container (c0015).
+- Placement: `fenolite place` puts staged parts on the board in a deterministic grid or moves named parts, a legality check reports courtyard overlaps and parts outside the outline in `build` and `place`, and a placed part is kept by later builds. `fenolite place PATH` (`--strategy grid|manual`, `--move REF=X,Y[,ROT[,SIDE]]`, `--only`, `--pitch`, `--gap`, `--margin`, `--force`, `-o`) writes only with `--confirm` and refuses an illegal placement without `--force`; `fenolite.placement` holds `check` (exact courtyard overlap, outside-outline and edge-clearance tests on `PlacedExtent`s) and the grid placer; `backends.kicad.replace.move_footprint` translates a footprint or re-places it from its library definition with its uuid, fields, lock and pad nets kept; `backends.kicad.outline.board_outline` gives the outline as rings from the model or from `Edge.Cuts`; `fenolite build` reports `place.*` issues as warnings (`result.placement`) and never refuses for placement. Probes on `kicad-cli` 9.0.9 and 10.0.6: moved footprints read back at the requested position, rotation and side with their pad nets, and courtyards that only touch give no `courtyards_overlap`. `H-K-PLACE-MOVE` and `H-K-PLACE-TOUCH` are `KICAD-VERIFIED (9.0.x, 10.0.x)`, so a `place` reply carries `evidence.level` `KICAD-VERIFIED`; the outline rings stay `INFERRED` (`H-G-PLACE-OUTLINE`: 3 of 21 demo boards have an outline in KiCad and no ring here). KiCad's DRC judges the board (change c0022).
+- Footprint fields: Reference, Value and every placed property of a footprint are typed fields (position, angle, layer, visibility, size, thickness, justification, mirror), read from 8.0 to 10.0 boards and written for 9.0 and 10.0; `Part.field(...)` and `fields(design)` place Reference and Value from the DSL, also outside the courtyard on a chosen side; rebuilds keep fields edited in KiCad unless the script locks them (`result.preserved.fields`); checked by `kicad-cli` 9.0 and 10.0 (`fenolite.model.FootprintField`, `fenolite.backends.kicad.fields`, `fenolite.lens.fields`; c0030).
+- Zone settings: zones carry typed settings (clearance, minimum thickness, pad connection solid/thermal/none/thru-hole-only, thermal gap and spoke width, island removal, smoothing, hatched fill), read from KiCad 9.0 and 10.0 boards and written per target; pads carry a zone connection override; `Design.zone()` declares pours in design scripts, and rebuilds keep zones edited in KiCad unless the script locks them; created target-9 zones write `(filled_areas_thickness no)`, so their fills are plotted as written; checked by refills on `kicad-cli` 10.0 and loads on 9.0 (c0031).
+- Copper check: Fenolite now judges shorts and clearance of a board's copper itself, exactly and without `kicad-cli`. `fenolite.geometry.thick` gives thick shapes (a core swept by a disc) with exact touch, closer-than, gap and witness tests; `fenolite.checks.check_copper` judges tracks, arcs, vias, board-frame pads and zone fills pair by pair, with the clearance in force taken from the project's own rules, net classes and board minimum (`checks.clearance`, `backends.base.DesignRules` and `DesignRulesSource`, `backends.kicad.copperrules`); `fenolite check` gains the default stage `copper.clearance`, between `erc.lite` and `drc.kicad`, and six codes (`copper.short`, `copper.clearance`, `copper.zone-overlap`, `copper.rules-incomplete`, `copper.item-unsupported`, `copper.clearance-unset`); `fenolite build` judges the triad it is about to write and refuses a short or a clearance error (`--copper-check refuse`, the default) or reports it and writes (`--copper-check warn`), with `result.copper_check`. Probes on `kicad-cli` 9.0.9 and 10.0.6 show why: a via that touches a track of another net whose net owns a pad is loaded on that net and no short is reported, copper without pads is merged into one net, and 10.0.6 reports a short between two nets with pads in about half of its runs; the verdicts of `check_copper` and of KiCad's DRC agree on every parity canary (seven pair kinds under a rule, a class and a board-minimum clearance, six resolution cases, and zone fills on 10.0.6). A board that holds a real short now exits 5 under `check` (`docs/formats/kicad/copper.md`, `docs/evidence/copper-check.md`, change c0029).
+- Board-frame queries and manual copper: `board_pads`/`find_pads` give every pad's board-frame position, rotation, layers, net, hole and exact copper entries (all pads sharing a number); `placed_extent` gives a placed footprint's front and back courtyard with rotation and side applied; `BoardFrame` in `backends.base`; DSL copper intents (`Part.pad`, `via_step`, `Design.track`, `Design.via`, `Design.stitch`) resolved by the build after placement, with nets inferred and checked, version-8 uuids from the caller's key, and stale script copper removed on rebuild; checked by `kicad-cli` 9.0 and 10.0. `fenolite build` reports `result.copper`; the routed example is `examples/blink_routed`, and the guide is `docs/copper.md` (c0028).
+- Altium change order without class differences (change c0048): a net class is declared in the schematic by a Parameter Set directive with a `ClassName` parameter on each of its nets, once per sheet, and a new project file ends with `[PrjClassGen]` (`NetClassManualEnabled=1`), so "Design » Update PCB Document" no longer proposes to remove the class from the board; the PCB document holds one component class per schematic sheet (named after the module, or after the sheet for the top sheet and for the single sheet of a flat build), and a project file with a PCB document or module sheets turns the rooms off for every schematic document. "Supply Nets" rules and rooms are not written and are documented as differences Altium may still propose (`docs/altium.md`, "Change order"). The golden schematics and project files of the samples with a net class or module sheets are rebuilt. Experimental; the maintainer's report of 2026-10-04 (AD 26.5) found only the "Supply Nets" rules in the change order of a build with module sheets, and the repeat of the same day on the rebuilt samples found the same for a flat build (`H-A-ECO-SHEETCLASS`; Part E of `docs/evidence/altium-pcb.md`).
+- Altium PCB copper: the experimental `<name>.PcbDoc` now holds tracks, arcs and through vias, zones as unpoured polygon pours (repour in Altium), a 2- or 4-layer stack whose inner layers are signal layers or internal planes (`design.board(..., copper=4, planes={...})`), net classes and Clearance, Width and Routing Via Style rules; `--copper-from board.kicad_pcb` copies the copper of a routed KiCad board after checking that it matches the design, and the board's placements win; blind, buried and micro vias, split planes and copper outside the stack are refused; checked by `kicad-cli pcb import`; evidence `INFERRED`, with the maintainer's Altium Designer report recorded as an author report (c0038).
+- KiCad libraries: pinned fetch and verified cache of the official libraries at 10.0.6 and 9.0.9 (`tools/kicad_libs_fetch.py`, `FENOLITE_LIBS_CACHE`), a `cache` library source, opt-in `kicad_common.json` path variables (`LibraryConfig.read_common`), a directory-scan fallback (row origin `scan`), builds that resolve from the cache and report `scan` rows, a census of the fetched trees (the 10.0.6 install equals its pinned tag), demo-library corpus rows (`libs`), an `env` keyword on `KicadCli.drc`, and `kicad-cli` probes for relative paths, the versioned fallback, nested tables, the configuration folder and KiCad's own path variables. The probes refuted one rule: KiCad resolves a relative library `uri` against its working directory, not against the table's folder, so the resolver now joins a relative `uri` to the project folder for rows of every table (a nested table's `../x` now means the folder above the project, not above the nested table).
+- No-connect pins: `fenolite.dsl.no_connect(*pins)` marks pins as intentionally unconnected; the model keeps them as `Circuit.no_connects` (additive, schema regenerated); the Altium schematic gets a No ERC directive (record 22) at each marked pin, in both forms; the KiCad build keeps the marks in `.fenolite/` and refuses a marked pin on a net (`build.no-connect-on-net`, `model.no-connect-on-net`); `erc.lite.floating-pin` skips marked pins; evidence `INFERRED`, with the maintainer's Altium Designer report recorded as an author report (pending: Part N of `docs/evidence/altium-schematic.md`).
+- Altium hierarchy and harnesses: `fenolite build --target altium --altium-sheets modules` writes a top sheet with sheet symbols and one sheet per top-level module, with matching ports and sheet entries; `fenolite.dsl.Harness(name, members)` groups nets, drawn as harness connectors, entries and signal harness lines in the binary schematic, with `.Harness` definition files; the PCB document links parts on module sheets through their sheet symbol; the default `flat` output is unchanged; evidence `INFERRED`, with the maintainer's Altium Designer report recorded as an author report (c0037). After the maintainer's report of 2026-10-03 (AD 26.5): a harness between two neighbouring modules is drawn on the top sheet as one signal harness line between the two sheet entries, without connector blocks and labels, which removes the "multiple names" warnings; the top sheet then gets no `.Harness` file; a new project file of a `modules` build lists the schematic documents first and together (the top sheet, the module sheets, then the PCB document, the libraries and the harness files), because with the PCB document and the libraries in between Altium Designer took only the first module sheet into the hierarchy (`H-A-SCH-HIER-ORDER`, confirmed by the maintainer's second report; the earlier guess about small sheets, `H-A-SCHBIN-MINI`, is refuted and its padding parameter `FenoliteNote` is removed); a flat build keeps its project file bytes, and an existing project file is kept as it is; `CHANNELOFFSET` of a PCB component counts the parts of its own sheet; a readback test checks that every board component links to a schematic component through a sheet symbol and that every module sheet is reachable from the top sheet.
+- `fenolite export` and `fenolite render`: fabrication files (Gerbers and the job file, drill, positions, IPC-D-356) and review views (SVG plots, rendered PNG) through `kicad-cli` on a copy of the project, written only with `--confirm`, with the manifest `fenolite-artifacts.json` (`schemas/fenolite.artifacts.v0.json`): per file its SHA-256 and a date-stripped `content_sha256`, because KiCad stamps the creation date into Gerber and drill files. When one kind fails nothing is written. Opt-in `render` stage in `check` (`--stages render`), which never gives an error. Commands may declare `example_tools`, and the suites run such examples against a fake `kicad-cli`. Measured on `kicad-cli` 9.0.9 and 10.0.6 (`docs/evidence/kicad-export.md`); user guide `docs/exports.md` (c0024).
+- Altium target writes PCB files: `fenolite build --target altium` writes `<name>.PcbLib` with the resolved KiCad footprints (SMD and through-hole pads, roundrect corners, silkscreen, fabrication and courtyard lines and arcs) and, experimentally, `<name>.PcbDoc` with the outline, two-layer stack, placed components, pads, nets and designators, linked to the schematic by unique ids; empty streams in compound files; write kinds `altium_pcblib` and `altium_pcbdoc`; new `altium.*` issue codes; kicad-cli `fp upgrade` and `pcb import` as oracles; capabilities entry `altium-pcb-writer`; evidence `INFERRED`, Altium checks as author reports.
+- `fenolite check` judges KiCad DRC violations as located `kicad.drc.<type>` issues, compares the pad nets of model, board and IPC-D-356 export, and runs RT2 on request; RT0 to RT2 pass on the corpus with kicad-cli 10.0.6 and on the 9.0.9.1 demo boards in the `kicad-9` job. Findings carry KiCad's severity (which follows the project's `rule_severities`) and are located as `REF-PIN`, `REF`, a board locator or the report position; an unrouted board now exits 5. `netlist.assignment_compare` (default stage) compares partitions of `REF-PIN` elements and locates a reassigned pad; `roundtrip.rt2` (opt-in with `--stages`) fails only where KiCad repeats its own DRC report and otherwise says that RT2 is not judged, because on boards with hundreds of violations two DRC runs of one file differ. New: `checks.{drc_json,assignment_compare,rt2}`, `backends.kicad.padnets`, `KicadOracle.netlist` and `.rt2`, `NetlistOracle`, `RoundTripOracle`, `PadNetList`, `NetlistOutcome` and `Rt2Outcome` in `backends.base`, `DrcReport.entries()`, the `rt2-9` corpus rows, and four recorded measurements (token census, 10.0 byte identity, 5 MiB throughput, Edge.Cuts chaining: one demo outline is open by 33 nm) (`docs/evidence/kicad-rt2.md`, `docs/cli-contract.md`).
+- Altium target writes schematic libraries: `fenolite build --target altium` writes `<name>.SchLib` with the resolved KiCad symbols (pins, units, Part Zero, synthesised body) and a generic `X.SchLib` for each Altium link library, lists them in the project file and draws the schematic from the same geometry; `cfb.Storage` for nested storages; write kind `altium_schlib`; new `altium.*` issue codes; kicad-cli `sym upgrade` round trip as oracle; evidence `INFERRED`, Altium checks as author reports (c0034).
+- Layout preservation: `fenolite build` over an existing project keeps footprints moved in KiCad (matched by uuid, `fenolite.path` or a `moved(old, new)` alias, with the precedence locked `place()` > board > `place()` > staging), routing and zones on nets that still exist, fills while their digests are unchanged (`zone.fill-stale` otherwise), board-only footprints with their pins on their pads' nets, board settings, project keys and user custom rules after Fenolite's; removed parts give `layout.orphan`; `fenolite check` no longer asks footprints added in KiCad for a symbol; rebuilds and a regenerated `.fenolite/` are byte-identical; `build.layout-exists` now guards only `fp-lib-table` and vendored footprints; checked by `kicad-cli` 9.0 and 10.0 (`fenolite.lens.preserve`, `Design.moved`, `dsl.moves`, `result.preserved`, `docs/lens.md`).
+- Altium target writes the binary schematic by default: `fenolite build --target altium` writes `<name>.SchDoc` as an MS-CFB compound file (stdlib writer; `FileHeader` and `Storage` streams; deterministic bytes); `--altium-format ascii` keeps the ASCII form; write kind `altium_schdoc_binary`; issue `altium.schematic-too-large`; evidence `INFERRED`, with the maintainer's Altium 365 Viewer and Altium Designer checks recorded as author reports.
+- Experimental Altium target: `fenolite build design.py --out DIR --target altium` writes an Altium project file (written once) and an ASCII schematic with one generic component per part, library and footprint links, net labels and power ports on wire stubs, a deterministic grid layout and path-keyed unique ids; listed under `result.experimental` of `fenolite capabilities`; evidence `INFERRED`, with the maintainer's Altium checks recorded as author reports. Power ports of adjacent pins alternate between short and long stubs, so they do not overlap.
+- Build properties and vendoring: DSL parts take `properties={…}` (printable text, reserved KiCad and Fenolite names refused), written as hidden properties after `fenolite.path` and read back unchanged; `fenolite build` copies the placed footprints of every library row (project, global, template) into `lib/` with project rows, so built projects pass `kicad-cli`'s library check in isolation (`--vendor project` keeps the old rule); new codes `build.property-reserved`, `build.property-invalid`, `build.property-conflict`, `build.vendor-unsafe-name` and `build.library-changed`. Measured on `kicad-cli` 9.0.9 and 10.0.6: vendored global footprints give no library violation, a project row hides a global row of the same nickname, and user properties load and survive a 10.0.6 re-save.
+- Read-only `fenolite check` v0 (model validation, ERC lite, KiCad DRC with a scoped rules canary, RT1) with evidence per stage, plus `fenolite inspect --summary` and `fenolite doctor`; `kicad-cli` runs only on a closed copy of the project (`fenolite.checks`, `fenolite.backends.kicad.{projectset,canary,oracle,roundtrip,helpmatrix}`, `KicadBackend.validate`, `kicad_cli_candidates`, neutral `RoundTrip`, `Validation`, `Validator`, `ProjectSet`, `DrcOutcome` and `Oracle` in `backends.base`, `docs/formats/kicad/cli.md`, `docs/evidence/kicad-check.md`). Observed on 9.0.9 and 10.0.6: DRC on the copy set equals DRC on the whole folder, the canary fires once, changes nothing else and is silenced by a dropped rules file or an ignored clearance severity, help pages follow one `Usage:` grammar, and KiCad writes a DRC report for boards Fenolite refuses for trailing content. On some boards kicad-cli 10.0.6 does not repeat its own DRC report between identical runs (the partner item of a clearance violation, sometimes the count), so DRC comparisons repeat their reference run. The canary tracks change other violations of large boards on 9.0 and 10.0 (other partner items, sometimes one violation more or less), so on both majors `drc.kicad` runs DRC twice: a plain run gives the counted report and the canary run the verdict. The copy set, the canary verdict and the help grammar are `KICAD-VERIFIED` on 9.0 and 10.0, and so are the `drc.kicad` stage's oracle and `fenolite doctor`'s matrix.
+- Sheet templates: a neutral drawing-sheet model with the board's paper and title block, a `.kicad_wks` reader and writer whose single output KiCad 9.0 and 10.0 load, project keys for the sheet and text variables, `fenolite template build` from closed `*.sheet.toml` files with per-number provenance, two CC0 examples, and one sheet drawn as predicted on A4 and A3 boards by `kicad-cli` 9.0 and 10.0 (`fenolite.model.presentation`, `fenolite.backends.kicad.wks`, `fenolite.templates`, `pcb.project_paper`/`paper_node`/`title_block_node`, `pro.apply_sheet_keys`, `schemas/fenolite.model.v0/drawing_sheet.json`, `docs/formats/kicad/worksheet.md`, `docs/formats/sheets.md`, `docs/sheet-templates.md`, ADR-0005 `Accepted`). Observed on both majors: a `User` page is truncated to whole mils, so `H-K-PCB-PAPER` is refuted and superseded by `H-K-PCB-PAPER-2`; KiCad draws sub-micrometre sheet lengths unchanged, so `H-K-WKS-RES` is refuted and superseded by `H-K-WKS-RES-2`; numbers step past `9` in repeated labels, and legacy `%` codes still resolve.
+- KiCad board-setup minimums: the design's board-wide rules now lower into `board.design_settings.rules` of `.kicad_pro` on synthesis and update, so Board Setup shows the fab rule set's values, and class clearances that a board-wide rule overrides are reported (`kicad.project.class-shadowed`). Measured on `kicad-cli` 9.0.9 and 10.0.6: the five minimum keys are read and applied, a board-wide custom rule governs below the minimums although the manuals call them absolute (`H-K-PRO-MIN-RULE` refuted, `H-K-PRO-MIN-RULE-2`), and such a rule overrides a larger class clearance (`lowering.lower_minimums`, `class_conflicts`, `pro.project_minimums`, five `kicad.project.*` codes, `pro-min-*` probes).
+- Thin DSL and build: `fenolite build design.py --out DIR` turns a stdlib-only `design.py` into a self-contained KiCad 9.0 or 10.0 project (triad, vendored footprints, per-target `fp-lib-table`, `.fenolite/` cache and build record) with ids keyed by names and paths, byte-identical rebuilds, a refusal to overwrite outputs edited since the last build (`--discard-layout`), `FEN-3005` for geometry errors, refusals that list their issues, and the CC0 blink checked by `kicad-cli` 9.0 and 10.0.
+- Roadmap to 1.0 (`docs/roadmap.md`): phases and change ranges, where KiCad ends and the second backend starts, budgets, and proposed cuts for a leaner 1.0 (pending the maintainer's decision).
+- KiCad project files: an exact JSON codec, `.kicad_pro` synthesis from GUI-saved templates for KiCad 9 and 10, in-place updates of managed keys with unknown keys preserved, net classes read into and lowered from the model, and `write_triad`, which always ships board, project and rules together; `kicad-cli` 9.0 and 10.0 enforce the written net classes (`fenolite.backends.kicad.{_json,pro,proerrors,triad}`, `lowering.lower_netclass`, `KicadBackend.lower`, `docs/formats/kicad/project.md`, `docs/evidence/kicad-project.md`, `tests/data/kicad/project/empty_10.kicad_pro`, demo `project` corpus rows). Observed on 9.0.9 and 10.0.6: net-class patterns are whole-name wildcards and regular expressions, a board-setup minimum governs a lower class value, `kicad-cli` never rewrites `.kicad_pro` (10.0.6 writes a `.kicad_prl`), and a `.kicad_dru` is read even without a project file, which partly refutes `H-K-TOK-RULES-SILENT`.
+- KiCad footprint and rules writers: `.kicad_mod` writing for KiCad 9 and 10, a full-dialect `.kicad_dru` reader and writer with comments kept in place, and rules lowering in priority order with a closed selector grammar, target gating and a self-check, each proved on `kicad-cli` 9.0 and 10.0 with a canary rule (`fenolite.backends.kicad.{mod,dru,rulemap,lowering}`, `docs/formats/kicad/rules.md`, `tests/data/kicad/rules/`, `tests/data/libs/Escapes_v9.pretty/`). Footprints placed in boards read as definitions (`board_footprints`); the footprint codec round trip holds over 1 674 demo and 424 upgraded third-party footprints, which settles the footprint half of `H-K-LIB-READ`, and `H-K-SEXPR-ESCAPES` now holds on 9.0.9 too. Observed on both majors: the later rule governs, every selector op and the `*` glob select the model's items, and KiCad compares net and class names without regard to case.
+- KiCad board backend, part 2: a `.kicad_pcb` writer for KiCad 9.0 and 10.0 (net form per target, obsolete rows, token gating with `--allow-lossy`, KiCad 8 boards read-only with `FEN-7003`), library footprints placed on either side with key-derived uuids, DRC JSON reports read into neutral types, the global flags `--kicad-version` and `--allow-lossy`, and written boards, bottom placements and library parity checked by `kicad-cli` 9.0 and 10.0 with probe outcomes pinned per version.
+- Verification evidence: `fenolite.verify` (label grammar with qualified labels, hypothesis-register reader, cited-id scan, `release_verified`) and a guard test that keeps `docs/hypotheses.md` consistent with every hypothesis id cited in live text; refuted rows relabelled, `H-K-LIB-DRC` and `H-G-SHAPELY-GC` registered as pending, author-report rows for the earlier second-backend write validation (never release-verified), the S-0002 licence settled, and the change-id and ADR numbering rules written down.
+- KiCad board backend, part 1: backend protocol and registry (`capabilities` lists backends), a package `kicad-cli` runner on temporary copies, and a typed `.kicad_pcb` reader for 8.0 and newer with lossless slots, same-version rebuild (RT1) over the demos and upgraded third-party boards, and placements and pads confirmed by `kicad-cli` exports on 9.0 and 10.0 (`fenolite.backends.{base,registry}`, `fenolite.backends.kicad.{backend,cli,ipcd356,layers,_fpmap,pcb}`, ADR-0002, `docs/formats/kicad/board.md`, `docs/evidence/kicad-board-read.md`, `tests/data/kicad/board/two_layer.kicad_pcb`). Model: `FootprintInstance.attributes`, `Via.via_type`, `ZoneFill.island`, `Zone.name`, and `model.duplicate-ref` as a warning for board-only and unannotated references. `H-K-PCB-READ` and `H-K-UNIT` are corpus-verified and `H-K-PCB-POS` verified with `kicad-cli` 9.0.9 and 10.0.6. Observed: a 10.0.6 re-save removes teardrop zones and `Footprint` properties and replaces `fp_text` items, so `H-K-UUID-KEEP` is refuted and superseded by `H-K-UUID-KEEP-2`; the IPC-D-356 `R` field of a pad is the negated stored pad angle.
+- KiCad libraries: neutral library definitions (`FootprintDef`, `SymbolDef`), `.kicad_mod`/`.kicad_sym`/`.kicad_symdir` readers with slots, library-table resolution (project, global, template and nested tables, path variables, local install), and an authored CC0 mini library checked by `kicad-cli` 9.0 and 10.0 (`fenolite.model.library`, `fenolite.backends.kicad.{mod,sym,libs,liberrors}`, `schemas/fenolite.model.v0/library.json`, `docs/formats/kicad/libraries.md`, `docs/evidence/kicad-libs.md`, `tests/data/libs/`). The census of the local 10.0.6 install reads 15 450 footprints and 22 860 symbols without error; `H-K-LIB-NAME-STEM` (9.0.9, 10.0.6) and `H-K-LIB-SYMDIR` (10.0.6) verified. Observed: KiCad sorts pads, graphics, symbols and pins when it saves, and the official footprints repeat graphic uuids inside single files.
+- KiCad format versions and gating (`versions.py`), token inventory `tokens.toml` with fuzz results on kicad-cli 9.0.9 and 10.0.6, `kicad-9` CI job and `kicad_min_major` test marker, error codes FEN-3003/FEN-3004/FEN-7002 (`tools/kicad_token_fuzz.py`, `tools/gen_token_docs.py`, `docs/formats/kicad/versions.md`, `docs/formats/kicad/tokens.md`, `docs/evidence/kicad/token-fuzz/`). All 184 inventory rows are verified on both majors; observed: both majors refuse future board headers, and 9.0.9 keeps pad-level tenting and drops the press-fit pad property.
+- KiCad S-expression layer (spelling-preserving parser, KiCad-style and compact printers, fragment codec, tree equality), slots helper with extension-bag persistence, KiCad demo and third-party corpus rows with RT0, and the `kicad-10` Docker oracle job (`fenolite.backends.kicad`, `docs/formats/kicad/sexpr.md`, `docs/formats/kicad/corpus.md`; `FENOLITE_REQUIRE` required-resource mode; `tools/corpus_fetch.py --uses/--exclude-uses`). Verified with `kicad-cli` 10.0.6: lexical acceptance and rejections, string escapes, number reading, re-save equality; `H-K-SEXPR-NUM-WRITE` refuted (KiCad writes non-length values with up to 10 decimals).
+- Geometry kernel: exact integer predicates, three-point arcs, polygons with a canonical normal form, mixed contours, deterministic µdeg transforms, STR spatial index, boolean backend protocol with a convex-only stdlib fallback, and KiCad frame and arc evidence tests (`fenolite.geometry`, `docs/geometry.md`, `docs/formats/kicad/geometry.md`; `H-G-ROT-DIR`, `H-G-BOTTOM-PLACE`, `H-G-ARC-ROUND`, `H-G-ARC-DIR` and `H-G-PTS-ARC` verified with `kicad-cli` 10.0.6).
+
+### Changed
+
+- Packaging (change c0052): the `route` extra is removed (it named `freerouting-client`, which no code imports; routers run as separate programs); the package metadata gains `[project.urls]` and the classifier `Development Status :: 3 - Alpha`; the source distribution is built from an allowlist (`src`, `tests`, `docs`, `examples`, `schemas`, `tools` and the project documents) and no longer holds `openspec/`, the agent instruction files, `packaging/`, `uv.lock` or the `Makefile`. The wheel is unchanged.
+- `fenolite capabilities`: the KiCad backend's evidence is computed from what `read` and `write` return and is checked against the hypothesis register: a level stronger than a row it names fails `tests/unit/test_capability_evidence.py`. The level stays `INFERRED`, and `docs/cli-contract.md` explains why the rows it names are stronger.
+- Documents (change c0052): `docs/cli-contract.md` has a `template` section, and the consistency suite fails when a registered command is missing from that page; `docs/provenance.md` explains the private residue gate (the three `FENOLITE_RESIDUE_*` variables, where the gate is on, and that CI runs with it off); the register rows `H-G-ANGLE` and `H-A-UNIT` record what was observed, both still `INFERRED`; two skip guards for things that exist are removed from the tests.
+- Source audit of S-0142: the unpinned AltiumSharp entry is marked not used (version 2 cites non-public decompiled material); the Altium fact rows that cited it are re-sourced (S-0130, S-0131, S-0132, S-0134, S-0143, S-0145, S-0150 at version 1) or kept as `INFERRED` hypotheses with no permitted source, and the `Storage` weight-key contradiction with version 1 is recorded. No written byte changes.
+- Roadmap (`docs/roadmap.md`): the gaps found by a board built only through the public API are proposed as c0026–c0031; change sizes are design-days, and a pace measured from the git history replaces the old time ratio as the forecast; the implementation order now runs c0026 → c0027 → c0013 → c0019 → c0020 → c0021 → c0012 → c0028–c0031.
+- CLI: `--fields` now also restricts the `plan` that the dispatcher adds to `result` on `--dry-run` or without `--confirm`, as the contract says; a refused command lists the `issues` of the raised error in its envelope; `GeometryError` maps to `FEN-3005` (exit 3).
+- The KiCad capability report lists `kicad_pro` in `write_kinds` and `lower` in `operations` (`KicadBackend.lower` returns the board, project and rules files).
+- Development: the test suite runs on parallel workers (`make check`, and `make check-fast` for the tests that need no external tool), the CI jobs record the outcome of every oracle test, internal helpers of the KiCad footprint writer were reorganised, and the repository ignores local build folders. None of this changes what the command line or the library does.
+
+### Fixed
+
+- Windows: `kicad-cli.exe` is found on `PATH` and in KiCad's default install folders, which KiCad's installer does not put on `PATH`; files Fenolite writes keep LF line ends; a board on another drive than the working folder can be routed; a drawing-sheet path starting with `/` counts as absolute.
+- `fenolite route` reads the net classes from the project file beside the board. Before, every net was routed with the default track width, clearance and via size, whatever its class said: a KiCad board holds no net class.
+- `fenolite route --router freerouting` lists a net under `unrouted` when Freerouting reports that it left one of its connections open. Before, a net with any copper counted as routed, so a partly routed net was reported as done; KiCad's DRC in `fenolite check` still found it.
+- A board whose rotated pad or rotated footprint carries a slotted hole is read and written again, and its footprints can be written as library files: the writer refused them (`KiCad writer cannot represent this slot rotation`, `KiCad oval drills can encode only horizontal or vertical slot axes`). `Padstack.hole_rotation` is now the slot's axis in the pad's own frame everywhere; on a board it used to include the pad's angle.
+- Geometry: the documented and tested bound of two successive `Transform.apply` calls is `(1 + |cos θ| + |sin θ|)/2` nm per axis, at most `(1 + √2)/2 ≈ 1.2071` nm, not 1 nm; `test_composition_rounds_once` no longer fails at random, and a test reaches the bound exactly. No code changes (c0050).
+- Script copper in the Altium build (change c0053): `fenolite build --target altium` now writes the tracks, vias and stitching vias that the design script declares (`Design.track`, `Design.via`, `Design.stitch`) into the experimental `<name>.PcbDoc`; before, they were left out without an issue. An intent that does not resolve refuses the build, an intent that creates nothing is reported, and with `--copper-from` the board wins with one `altium.not-lowered` info.
+- `fenolite check` no longer reports `kicad.drc.rules-not-loaded` for rules that were loaded on a board with 499 or more clearance violations: `kicad-cli` stops reporting clearance violations near 499 per run and can leave the canary's own out, so such a run is now `inconclusive` with the reason `clearance-limit` (`kicad.drc.rules-unchecked`). The two-run canary test compares two DRC runs against what was measured to repeat, and the contract says which part of `check`'s output repeats between runs (c0051).
+- Altium PCB document in the form Altium saves: `<name>.PcbDoc` now holds the whole `Board6` record (board keys, the outline as a polygon, sheet, sub-stack, drill pair, routing keys and snap grid, written by rule in `docboard.py` on top of `libboard.py`), net and component records with the common keys and unique ids, `UniqueIDPrimitiveInformation`, the option storages (`Advanced Placer Options6`, `Pin Swap Options6`, `Design Rule Checker Options6`, `PadViaLibrary`, `PadViaLibraryCache`, `LayerKindMapping`, `ConstraintManager`, `SignalClasses`) and 13 more empty storages; `write_pcbdoc` takes the file name. The first form gave a "catastrophic" error in Altium Designer 26.5 (maintainer's report, c0035); the new one opens there and its change order from the schematic reports no difference (author report of 2026-10-03). Texts, pads, tracks and arcs keep their short records.
+- Altium PCB library opens in Altium Designer's form: `<name>.PcbLib` now holds the 53-byte `FileHeader` (version and library id), the whole board record in `Library/Data` (layer stack, grid, layer sets and view keys, written by rule in `libboard.py`) and the `Library` side streams (`EmbeddedFonts`, `ModelsNoEmbed`, `Textures`, `ComponentParamsTOC`, `PadViaLibrary`); `FileHeaderSix` of `<name>.PcbDoc` carries its id. The first form gave a "catastrophic" error in Altium Designer (maintainer's report, c0035); the new one opens in Altium Designer 26.5 (author report of 2026-10-03).
+
+## [0.0.1.dev0] - 2026-09-30
+
+Pre-alpha repository bootstrap; not usable for real boards yet. Published to PyPI as `fenolite` and its
+alias `phenolite` on 2026-09-30 (`pip install --pre fenolite`).
+
+### Added
+
+- Repository bootstrap: package skeleton (`src/fenolite`, stdlib-only core, closed extras), Apache-2.0 licence with NOTICE and SPDX headers, `LEGAL.md`/`LEGAL-ANNEX.md`, DCO, ADR-0004, evidence registers and the `unit` CI baseline (ruff, pyright strict, pytest on ubuntu and macos).
+- CLI contract v0: JSON envelope (`schemas/fenolite.envelope.v0.json`) and typed stderr errors (`schemas/fenolite.error.v0.json`), exit codes 0–7, `--fields`, mutation protocol (`--dry-run`/`--confirm`, atomic writes with `.bak`, receipts), `--seed`/`--timestamp`, the `capabilities` command, a consistency test over every command and a package-layering test.
+- IP hygiene: ADR-0003 (clean-room and provenance), four explicit prohibitions in `LEGAL.md`, provenance rules and test, residue scan (`tools/residue/scan.py`: structural patterns, blob hashes, private token and hash lists kept outside the repository, UTF-16/cp1252/zip awareness, `--staged` and `--history` modes) with a pre-commit hook and CI step, copyleft-dependency and no-ported-code guards, corpus manifest with the embeddable rule and `tools/corpus_fetch.py`.
+- Design model v0: `fenolite.core` (integer nm/µdeg units with exact parsing and half-even conversion to 1/10 000 mil, ids, evidence levels, errors and issues, provenance, coordinates, atomic I/O) and `fenolite.model` (entity header with native ids, provenance and extension bags; circuit, board, rules, manufacturing and findings layers; `Design` with indexes, validation and entity replacement; canonical JSON with a validating decoder; JSON Schemas in `schemas/fenolite.model.v0/`), ADR-0001 and `docs/design-model.md`.
+- Name reservation: alias distribution `phenolite` (installs `fenolite`) and a release workflow that publishes both to PyPI with trusted publishing when a GitHub Release is published.

fenolite-0.2.0/CONTRIBUTING.md

@@ -0,0 +1,64 @@
+# Contributing to Fenolite
+
+Thank you for helping. Fenolite is spec-driven, agent-friendly and strict about provenance.
+
+## Workflow
+
+1. **One change per pull request.** Every change starts as an OpenSpec change under
+   `openspec/changes/<id>/` (`proposal.md`, `design.md`, `specs/`, `tasks.md`). No code lands
+   without one. See `openspec/README.md`.
+2. Implement the tasks in order; each task names the command that proves it.
+3. While you work, run `make check-fast`: ruff, ruff format, pyright, the residue scan and the tests
+   that need no `kicad-cli`, corpus or KiCad libraries. Run `make check` (the same checks and every
+   test) once before pushing; CI runs the same steps. Both run the tests on parallel workers; see
+   `tests/README.md`, "Parallel runs".
+4. Commit messages follow [Conventional Commits](https://www.conventionalcommits.org/)
+   (`feat(model): …`, `fix(kicad): …`, `docs: …`, `test: …`, `chore: …`).
+
+## Parallel worktrees
+
+Several contributors or agents often work at once, each in its own worktree on one machine. A full
+suite uses every core, so two of them at once are slower than one after the other.
+
+- While working on a task, run `make check-fast` and the tests of the files you touched, for
+  example `uv run pytest tests/kicad/board/test_x.py -q`.
+- Run `make check` once, on the rebased branch, right before the merge.
+- Never start several full suites at the same time on one machine. If one is running, wait for it.
+
+## Developer Certificate of Origin
+
+Every commit MUST carry a `Signed-off-by:` trailer certifying the
+[Developer Certificate of Origin 1.1](https://developercertificate.org/):
+
+```bash
+git commit -s -m "feat(core): add integer length units"
+```
+
+By signing off you state that you wrote the contribution or have the right to submit it under
+the Apache License 2.0.
+
+## Provenance rules (read `LEGAL.md`)
+
+- Learn formats only from public documentation and from files you are entitled to read.
+- Never decompile vendor software; never copy, transcribe or compile third-party parser code
+  or grammar files into Fenolite. Reading public sources for facts is fine: record each fact in
+  `docs/formats/` with its source.
+- Never add files, values, names, templates or examples that belong to an employer or any other
+  organisation. Test data is authored for Fenolite or fetched from public sources listed in the
+  corpus manifest.
+- Copyleft tools run only as external processes; they never become dependencies.
+
+## Allowed vs forbidden derivation
+
+| Allowed | Forbidden |
+|---|---|
+| Reading a public format page and writing in `docs/formats/kicad/pcb.md`: "a `via` node carries `(at X Y)`, `(size D)`, `(drill D)`, `(layers A B)` — source S-0007", then implementing the parser from that page. | Opening a GPL parser's source, copying or paraphrasing its function that reads `via` nodes, or converting its grammar file into a Python parser. |
+| Measuring a record layout on a public, licence-compatible sample file and recording the offsets with the file's manifest id. | Measuring anything on files you are not entitled to share or use (for example an employer's boards) or reusing values measured on them earlier. |
+| Running a copyleft tool as a subprocess and comparing its output with Fenolite's (an oracle). | Adding that tool, or a library that links it, to `pyproject.toml`. |
+| Writing an example board from scratch for `examples/`. | Recreating a board, template, title block, rule set or part list you know from work. |
+
+## Code style
+
+- Python ≥ 3.11, stdlib-only core, full type hints (`pyright` strict on `src/`).
+- Every `.py` file starts with the SPDX and copyright lines (see any existing file).
+- Lengths are integer nanometres; angles are integer microdegrees; no floats in the model.

fenolite-0.2.0/LEGAL-ANNEX.md

@@ -0,0 +1,75 @@
+# Clean-room session log
+
+One row per working session that touches `src/fenolite/backends/` or `docs/formats/`: what was
+edited and which public sources were consulted. Only public sources and files the contributor is
+entitled to use are consulted during these sessions.
+
+| date | area | files touched | public sources consulted | author |
+|---|---|---|---|---|
+| 2026-10-05 | backends/altium | `src/fenolite/backends/base.py`, `src/fenolite/backends/altium/docset.py`, `roundtrip.py` and `backend.py`, `src/fenolite/backends/altium/PROVENANCE.md`, `docs/evidence/sources.md`, `docs/hypotheses.md` (c0044 verification: document sets, the round-trip levels RT-A0 to RT-A2 and the records view; own code over the readers and the compound writer, no new format fact and no source opened; public corpus rows read in the corpus cache for counts only, never committed) | S-0145, S-0163 (cited, not read again) | coding agent |
+| 2026-10-05 | backends/altium, docs/formats | `docs/evidence/sources.md`, `docs/hypotheses.md`, `docs/formats/altium/connectivity.md`, `import.md`, `pcb-bodies.md`, `src/fenolite/backends/altium/PROVENANCE.md`, then `src/fenolite/backends/altium/adapter/`, `read/bodies.py` and `backend.py`, written from those pages (c0043 import: the Altium documentation pages on connectivity, buses, pads, 3D bodies and design rules read for facts; KiCad's importers read for facts only, nothing transcribed; AltiumSharp version 1 only; public project sets fetched to the corpus cache, never committed) | S-0130, S-0131, S-0160, S-0161, S-0185, S-0186, S-0286, S-0301, S-0302, S-0303 | coding agent |
+| 2026-10-05 | backends/kicad | `src/fenolite/backends/kicad/_fpmap.py`, `mod.py`, `tests/unit/backends/kicad/test_mod_pads.py`, `test_mod_write.py` (investigated the rotated-slot writer refusal against `kicad-demo-10-0-6-pcb-04`; rebased onto the fix already merged to `main`; no KiCad source code read or copied) | S-0058 | Codex agent |
+| 2026-10-05 | backends/altium, docs/formats | `docs/formats/altium/schematic-records.md`, `schematic-ascii.md`, `schematic-binary.md`, `schematic-library.md`, `src/fenolite/backends/altium/PROVENANCE.md` (c0040 schematic reader research: record keys from the converter's format page; the side-stream and storage layouts from KiCad's importer and binary parser read for facts only; AltiumSharp version 1 only; public corpus files fetched and never committed) | S-0130, S-0131, S-0148, S-0150, S-0152, S-0187, S-0188, S-0277, S-0278, S-0279, S-0280, S-0281, S-0282 | Claude agent |
+| 2026-10-05 | backends/altium, docs/formats | docs/evidence/sources.md, docs/hypotheses.md, docs/formats/altium/pcb-read.md, docs/evidence/altium-pcb-read.md, src/fenolite/backends/altium/PROVENANCE.md, then src/fenolite/backends/altium/read/pcbprops.py, pcbprims.py, pcbstack.py, pcb.py and pcblib.py, written from those pages (c0041 PCB reader: public sources only; AltiumSharp version 1 only; S-0173 never the only source of a row and its two facts attributed to vendor software unused; the corpus files are fetched by `tools/corpus_fetch.py` into the cache and never committed; Altium's documentation pages read for facts; `kicad-cli` run only as a subprocess; no parser code transcribed, nothing decompiled) | S-0002, S-0148, S-0150, S-0152, S-0160 to S-0163, S-0170 to S-0176, S-0188, S-0199, S-0200, S-0285, S-0286, S-0287 | coding agent |
+| 2026-10-04 | backends/altium, docs/formats | `docs/formats/altium/compound-file.md`, `src/fenolite/backends/altium/PROVENANCE.md`, `LEGAL-ANNEX.md` (c0039 compound-file reader research; MS-CFB v12.0's version 4, DIFAT, metadata and high-size-bit provisions re-read; Altium's published viewer limit; no parser code or other implementation read) | S-0145, S-0149 | Codex agent |
+| 2026-10-05 | backends/altium, docs/formats | `docs/formats/altium/project.md`, `output-job.md`, `rule-file.md`, `stackup-file.md`, `docs/evidence/sources.md`, `docs/hypotheses.md`, `src/fenolite/backends/altium/PROVENANCE.md`, then `src/fenolite/backends/altium/read/` (`textfile`, `ini`, `proptext`, `project`, `outjob`, `rul`, `rules`, `scope`, `stackup`), written from those pages (c0042 project reader: twelve public text files fetched to the corpus cache and read for facts, never committed; Altium's documentation pages S-0293 to S-0296 and S-0300 as recorded by the change's research of 2026-10-03; KiCad's importer for facts only, S-0160, S-0161; no parser code of another project was read, nothing copied) | S-0132, S-0138, S-0160, S-0161, S-0163, S-0187, S-0188, S-0293, S-0294, S-0295, S-0296, S-0297, S-0298, S-0299, S-0300 | Claude agent |
+| 2026-09-30 | docs/formats | docs/formats/units.md | S-0001, S-0002 | maintainer |
+| 2026-10-01 | docs/formats | docs/formats/kicad/geometry.md | S-0001, S-0010, S-0018, S-0019 | maintainer |
+| 2026-10-01 | backends/kicad, docs/formats | src/fenolite/backends/kicad/PROVENANCE.md, docs/formats/kicad/sexpr.md, docs/formats/kicad/corpus.md | S-0001, S-0020, S-0021, S-0022, S-0023, S-0024, S-0025, S-0026, S-0027, S-0028, S-0029 | maintainer |
+| 2026-10-01 | backends/kicad, docs/formats | src/fenolite/backends/kicad/versions.py, src/fenolite/backends/kicad/data/tokens.toml, docs/formats/kicad/versions.md, docs/formats/kicad/tokens.md | S-0001, S-0010, S-0020, S-0021, S-0022, S-0029, S-0030, S-0031, S-0032, S-0033, S-0034, S-0035, S-0036, S-0037, S-0038, S-0039 | maintainer |
+| 2026-10-01 | backends/kicad, docs/formats | src/fenolite/backends/kicad/PROVENANCE.md, src/fenolite/backends/kicad/__init__.py, src/fenolite/backends/kicad/_libread.py, src/fenolite/backends/kicad/liberrors.py, src/fenolite/backends/kicad/mod.py, src/fenolite/backends/kicad/sym.py, src/fenolite/backends/kicad/libs.py, docs/formats/kicad/libraries.md | S-0001, S-0018, S-0020, S-0029, S-0030, S-0031, S-0040, S-0041, S-0042, S-0043, S-0044, S-0045, S-0046, S-0047, S-0048, S-0049 | maintainer |
+| 2026-10-01 | backends, backends/kicad, docs/formats | src/fenolite/backends/base.py, src/fenolite/backends/registry.py, src/fenolite/backends/kicad/PROVENANCE.md, src/fenolite/backends/kicad/__init__.py, src/fenolite/backends/kicad/_fpmap.py, src/fenolite/backends/kicad/_libread.py, src/fenolite/backends/kicad/backend.py, src/fenolite/backends/kicad/cli.py, src/fenolite/backends/kicad/ipcd356.py, src/fenolite/backends/kicad/layers.py, src/fenolite/backends/kicad/mod.py, src/fenolite/backends/kicad/pcb.py, docs/formats/kicad/board.md | S-0001, S-0010, S-0019, S-0020, S-0021, S-0022, S-0024, S-0030, S-0033, S-0037, S-0038, S-0039, S-0050 | maintainer |
+| 2026-10-01 | backends, backends/kicad, docs/formats | src/fenolite/backends/base.py, src/fenolite/backends/kicad/PROVENANCE.md, src/fenolite/backends/kicad/__init__.py, src/fenolite/backends/kicad/_fpmap.py, src/fenolite/backends/kicad/backend.py, src/fenolite/backends/kicad/cli.py, src/fenolite/backends/kicad/drc.py, src/fenolite/backends/kicad/embed.py, src/fenolite/backends/kicad/layers.py, src/fenolite/backends/kicad/mod.py, src/fenolite/backends/kicad/pcb.py, src/fenolite/backends/kicad/versions.py, docs/formats/kicad/board.md, docs/formats/kicad/drc.md | S-0010, S-0019, S-0020, S-0021, S-0022, S-0030, S-0033, S-0037, S-0039, S-0055, S-0056, S-0057, S-0058 | maintainer |
+| 2026-10-02 | backends/kicad, docs/formats | src/fenolite/backends/kicad/PROVENANCE.md, src/fenolite/backends/kicad/__init__.py, src/fenolite/backends/kicad/_fpmap.py, src/fenolite/backends/kicad/_pcbwrite.py, src/fenolite/backends/kicad/backend.py, src/fenolite/backends/kicad/dru.py, src/fenolite/backends/kicad/lowering.py, src/fenolite/backends/kicad/mod.py, src/fenolite/backends/kicad/rulemap.py, docs/formats/kicad/rules.md, docs/formats/kicad/libraries.md | S-0010, S-0020, S-0022, S-0029, S-0030, S-0034, S-0037, S-0038, S-0040 | maintainer |
+| 2026-10-02 | backends/kicad, docs/formats | src/fenolite/backends/kicad/PROVENANCE.md, src/fenolite/backends/kicad/__init__.py, src/fenolite/backends/kicad/_json.py, src/fenolite/backends/kicad/backend.py, src/fenolite/backends/kicad/lowering.py, src/fenolite/backends/kicad/pro.py, src/fenolite/backends/kicad/proerrors.py, src/fenolite/backends/kicad/triad.py, src/fenolite/backends/kicad/data/project_template_9.json, src/fenolite/backends/kicad/data/project_template_10.json, docs/formats/kicad/project.md, docs/formats/kicad/corpus.md | S-0010, S-0020, S-0023, S-0024, S-0029, S-0038, S-0045, S-0046, S-0065, S-0066 | maintainer |
+| 2026-10-02 | backends/kicad, docs/formats | src/fenolite/backends/kicad/PROVENANCE.md, src/fenolite/backends/kicad/embed.py, src/fenolite/backends/kicad/libs.py, docs/formats/kicad/board.md, docs/formats/kicad/libraries.md, docs/formats/kicad/drc.md | S-0010, S-0022, S-0037, S-0038, S-0042, S-0043, S-0045, S-0046, S-0058, S-0070, S-0071, S-0072, S-0073, S-0074 | maintainer |
+| 2026-10-02 | backends/kicad, templates, docs/formats | docs/evidence/sources.md, docs/hypotheses.md, src/fenolite/backends/kicad/PROVENANCE.md, src/fenolite/templates/PROVENANCE.md (c0012 registers and naming gate) | S-0001, S-0020, S-0022, S-0029, S-0032, S-0035, S-0036, S-0037, S-0058, S-0075, S-0076, S-0077, S-0078, S-0079 | maintainer |
+| 2026-10-02 | templates, docs/adr | docs/adr/0005-sheet-templates.md, src/fenolite/templates/examples/iso5457_generic.sheet.toml, src/fenolite/templates/examples/letter_generic.sheet.toml, src/fenolite/templates/PROVENANCE.md (review of ADR-0005, both examples and their provenance tables; ADR accepted) | S-0077, S-0078, S-0079 | maintainer |
+| 2026-10-02 | backends/kicad, docs/formats | src/fenolite/backends/kicad/PROVENANCE.md, src/fenolite/backends/kicad/__init__.py, src/fenolite/backends/kicad/lowering.py, src/fenolite/backends/kicad/pro.py, src/fenolite/backends/kicad/proerrors.py, docs/formats/kicad/project.md, docs/formats/kicad/rules.md | S-0010, S-0020, S-0024, S-0029, S-0038, S-0058 | maintainer |
+| 2026-10-02 | backends/altium, docs/formats | src/fenolite/backends/altium/__init__.py, src/fenolite/backends/altium/PROVENANCE.md, docs/formats/altium/schematic-ascii.md, docs/formats/altium/project.md (c0032, from the format research of the same day), then src/fenolite/backends/altium/ascii.py, symbols.py, layout.py, schdoc.py, prjpcb.py and project.py, written from those pages | S-0002, S-0020, S-0130, S-0131, S-0132, S-0133, S-0134, S-0135, S-0136, S-0137, S-0138, S-0139, S-0140, S-0141, S-0142, S-0143, S-0144 | maintainer |
+| 2026-10-02 | backends/kicad, docs/formats | src/fenolite/backends/kicad/PROVENANCE.md, docs/formats/kicad/board.md, docs/formats/kicad/libraries.md | S-0020, S-0022, S-0024, S-0029, S-0037, S-0038, S-0045, S-0046, S-0048, S-0058, S-0105 | maintainer |
+| 2026-10-02 | backends/altium, docs/formats | src/fenolite/backends/altium/PROVENANCE.md, docs/formats/altium/compound-file.md, docs/formats/altium/schematic-binary.md (c0033, from the binary format research of the same day), then src/fenolite/backends/altium/cfb.py and binary.py, written from those pages | S-0002, S-0130, S-0131, S-0133, S-0142, S-0143, S-0145, S-0146, S-0147, S-0148, S-0149 | maintainer |
+| 2026-10-02 | backends/kicad, docs/formats | docs/evidence/sources.md, docs/hypotheses.md, src/fenolite/backends/kicad/PROVENANCE.md, docs/formats/kicad/cli.md (c0013 registers and the cli page skeleton) | S-0010, S-0020, S-0022, S-0037, S-0038, S-0045, S-0046, S-0080, S-0081 | maintainer |
+| 2026-10-02 | backends, backends/kicad, docs/formats | src/fenolite/backends/base.py, src/fenolite/backends/kicad/backend.py, src/fenolite/backends/kicad/cli.py, src/fenolite/backends/kicad/canary.py, src/fenolite/backends/kicad/helpmatrix.py, src/fenolite/backends/kicad/oracle.py, src/fenolite/backends/kicad/projectset.py, src/fenolite/backends/kicad/roundtrip.py, docs/formats/kicad/cli.md, docs/formats/kicad/drc.md (c0013 copy set, canary, help matrix, RT1 and oracle) | S-0010, S-0020, S-0022, S-0037, S-0038, S-0045, S-0046, S-0080, S-0081 | maintainer |
+| 2026-10-02 | backends/kicad, docs/formats | src/fenolite/backends/kicad/PROVENANCE.md, docs/formats/kicad/board.md | S-0010, S-0022, S-0037, S-0038, S-0055, S-0056 | maintainer |
+| 2026-10-02 | backends/altium, docs/formats | src/fenolite/backends/altium/layout.py, docs/formats/altium/schematic-ascii.md (c0032 task 4.2: power ports of adjacent pins staggered, a Fenolite layout choice prompted by the maintainer's KiCad 10.0.6 import of the CC0 sample) | none (no new source; the fact pages only) | maintainer |
+| 2026-10-02 | backends/altium, docs/formats | docs/evidence/sources.md, docs/hypotheses.md, docs/formats/altium/schematic-library.md, docs/formats/altium/compound-file.md, src/fenolite/backends/altium/PROVENANCE.md (c0034, from the schematic-library format research of the same day; AltiumSharp version 1 at afe796434b6d2110c745c90abe44a6ddf64f5bca only), then src/fenolite/backends/altium/cfb.py, altsym.py, schlib.py, project.py, prjpcb.py, layout.py, schdoc.py and src/fenolite/lens/altium.py, written from those pages | S-0002, S-0020, S-0130, S-0131, S-0145, S-0148, S-0150, S-0151, S-0152, S-0153, S-0154, S-0155 | maintainer |
+| 2026-10-02 | backends/altium, docs/formats | docs/evidence/sources.md, docs/hypotheses.md, docs/formats/altium/project.md, schematic-ascii.md, schematic-binary.md and schematic-library.md (the S-0142 audit), then docs/formats/altium/pcb-library.md, pcb-records.md, pcb-document.md, compound-file.md and src/fenolite/backends/altium/PROVENANCE.md (c0035, from the PCB format research of the same day), then src/fenolite/backends/altium/cfb.py, pcbrecords.py, pcblib.py, pcbdoc.py, project.py, prjpcb.py and src/fenolite/lens/altium.py, written from those pages. AltiumSharp was read only as version 1 at afe796434b6d2110c745c90abe44a6ddf64f5bca (`AltiumSharp/PcbLibWriter.cs`, `CompoundFileWriter.cs`, `Records/Pcb/*.cs`); version 2 was not used | S-0002, S-0020, S-0143, S-0145, S-0149, S-0150, S-0160, S-0161, S-0162, S-0163, S-0164, S-0165, S-0166 | maintainer |
+| 2026-10-03 | backends/altium, docs/formats | docs/evidence/sources.md, docs/formats/altium/pcb-library.md, pcb-records.md and pcb-document.md, src/fenolite/backends/altium/PROVENANCE.md (c0035, after the maintainer's report that Altium Designer refuses the PCB library: four Altium-saved libraries under MIT and GPL-2.0 and one document under Apache-2.0 were downloaded to a scratch folder, read with tests/_cfb_read.py and compared with Fenolite's output; none is committed, nothing was decompiled, no code was read in S-0173 beyond its format page and report texts), then src/fenolite/backends/altium/libboard.py, pcblib.py, pcbrecords.py, pcbdoc.py and tests/_altium_pcb_read.py, written from those pages | S-0145, S-0150, S-0160, S-0162, S-0170, S-0171, S-0172, S-0173 | maintainer |
+| 2026-10-03 | backends/altium, docs/formats | docs/evidence/sources.md, docs/formats/altium/pcb-document.md and src/fenolite/backends/altium/PROVENANCE.md (c0035, after the maintainer's report that Altium Designer 26.5 refuses the PCB document: three more Altium-saved documents under BSD-2-Clause, MIT and Apache-2.0 were downloaded to a scratch folder, read with tests/_cfb_read.py and compared with Fenolite's output and with the document of S-0172; none is committed, nothing was decompiled, no third-party code was read), then src/fenolite/backends/altium/docboard.py, libboard.py, pcbdoc.py, project.py and tests/_altium_pcb_read.py, written from those pages | S-0160, S-0161, S-0172, S-0174, S-0175, S-0176 | maintainer |
+| 2026-10-03 | backends/kicad, docs/formats | docs/evidence/sources.md, docs/hypotheses.md, src/fenolite/backends/kicad/PROVENANCE.md, docs/formats/kicad/drc.md, docs/formats/kicad/board.md (c0020 registers and the Findings and RT2 sections) | S-0019, S-0020, S-0022, S-0037, S-0055, S-0056, S-0058, S-0090, S-0091 | maintainer |
+| 2026-10-03 | backends, backends/kicad, docs/formats | src/fenolite/backends/base.py, src/fenolite/backends/kicad/padnets.py, src/fenolite/backends/kicad/oracle.py, docs/formats/kicad/drc.md, docs/formats/kicad/board.md (c0020: netlist and RT2 oracles, the matcher moved from c0009's frame test, labels after the probes; no KiCad source read) | S-0019, S-0020, S-0022, S-0037, S-0055, S-0056 | maintainer |
+| 2026-10-03 | backends/altium, docs/formats | docs/evidence/sources.md, docs/hypotheses.md, docs/formats/altium/schematic-ascii.md, schematic-binary.md, project.md and pcb-document.md, src/fenolite/backends/altium/PROVENANCE.md (c0037, from the hierarchy and harness format research of the same day: the public Altium-saved sheets, harness definition files, project files and one PCB document of S-0187 (MIT) and S-0188 (LGPL-3.0) were downloaded to a scratch folder and read with tests/_cfb_read.py, the PCB document by a byte search; none is committed, nothing was decompiled, no name, value or coordinate of them is used, and AltiumSharp was consulted only as version 1 at afe796434b6d2110c745c90abe44a6ddf64f5bca, which holds nothing on these records), then src/fenolite/backends/altium/hierarchy.py, layout.py, schdoc.py, binary.py, prjpcb.py, project.py, pcbdoc.py, src/fenolite/lens/altium.py and tests/_altium_read.py, written from those pages | S-0130, S-0131, S-0132, S-0139, S-0150, S-0164, S-0185, S-0186, S-0187, S-0188 | maintainer |
+| 2026-10-03 | backends/altium, docs/formats | docs/evidence/sources.md, docs/hypotheses.md, src/fenolite/backends/altium/PROVENANCE.md and docs/formats/altium/pcb-copper.md (c0038, from the copper research of the same day: the Altium-saved documents of S-0172, S-0174, S-0175 and S-0176 and, after the maintainer's approval, two boards of the public repository luxonis/oak-hardware under MIT, `NG6011.PcbDoc` (S-0199) and `DM6010_R2M2E2.PcbDoc` (S-0200), downloaded to a scratch folder; both are scratch-only and never committed; nothing was decompiled, no third-party code was read or transcribed, AltiumSharp only as version 1 at afe796434b6d2110c745c90abe44a6ddf64f5bca), then src/fenolite/backends/altium/pcbrecords.py, libboard.py, docboard.py, pcbdoc.py, src/fenolite/lens/altium.py and tests/_altium_pcb_read.py, written from those pages | S-0002, S-0020, S-0150, S-0160, S-0161, S-0166, S-0172, S-0173, S-0174, S-0175, S-0176, S-0195, S-0196, S-0197, S-0198, S-0199, S-0200 | maintainer |
+| 2026-10-03 | backends/kicad, exports, docs/formats | docs/evidence/sources.md, docs/hypotheses.md, docs/formats/kicad/cli.md, src/fenolite/backends/kicad/PROVENANCE.md, src/fenolite/backends/kicad/cli.py, src/fenolite/exports/ (c0024 export and render commands run as subprocesses; nothing copied) | S-0020, S-0022, S-0037 | maintainer |
+| 2026-10-03 | backends/altium, docs/formats | docs/formats/altium/pcb-document.md, schematic-ascii.md, schematic-binary.md and project.md, docs/evidence/sources.md, docs/evidence/altium-schematic.md, docs/hypotheses.md, src/fenolite/backends/altium/PROVENANCE.md (c0037, after the maintainer's report of Part H made with Altium Designer 26.5 under a trial licence: the public PCB document of S-0188 (LGPL-3.0), already in the scratch folder, was read again by a byte search and compared with Fenolite's output, which gave the per-sheet `CHANNELOFFSET`; the stream sizes and the sheet parameters of the public sheets of S-0187 and S-0188 were read with tests/_cfb_read.py, which gave the 4096-byte rule; two public Altium documentation pages on project validation were read and gave no fact; the project file and the project structure file that Altium Designer 26.5 saved from Fenolite's own board example, which the maintainer keeps outside the repository, were read for the facts of the author report; nothing was downloaded, decompiled or committed, and no name, value or coordinate of a third-party file is used), then src/fenolite/backends/altium/pcbdoc.py, layout.py, hierarchy.py, schdoc.py, binary.py and tests/_altium_read.py, written from those pages | S-0130, S-0145, S-0186, S-0187, S-0188 | maintainer |
+| 2026-10-03 | backends/altium, docs/formats | docs/formats/altium/project.md and schematic-binary.md, docs/evidence/altium-schematic.md, docs/hypotheses.md, src/fenolite/backends/altium/PROVENANCE.md (c0037, after the maintainer's second report of step H7 made with Altium Designer 26.5 under a trial licence: only the outcomes the maintainer reported and Fenolite's own built project files were read; the project file that Altium saved stays with the maintainer, and of the variant folders only the `DocumentPath` and `HierarchyMode` lines of the project files were read; nothing was downloaded, decompiled or committed), then src/fenolite/backends/altium/prjpcb.py and binary.py, written from those pages | S-0134, S-0145, S-0188 | maintainer |
+| 2026-10-03 | backends/kicad, docs/formats | docs/evidence/sources.md, docs/hypotheses.md, src/fenolite/backends/kicad/PROVENANCE.md, docs/formats/kicad/libraries.md, tools/README.md, tests/libs/README.md (c0021 registers and the library cache, scan and configuration sections; no KiCad source code was read) | S-0020, S-0042, S-0043, S-0044, S-0045, S-0046, S-0048, S-0095, S-0096, S-0097 | maintainer |
+| 2026-10-03 | backends/kicad, docs/formats | src/fenolite/backends/kicad/libcache.py, data/libraries.toml, libs.py and cli.py, tools/kicad_libs_fetch.py, docs/formats/kicad/libraries.md and corpus.md, docs/evidence/kicad-libs.md (c0021: pins from the tags API, the cache source, the directory scan, `kicad_common.json` variables and the relative-uri rule, written from the fact page and from `kicad-cli` probe outcomes on authored CC0 files; the official libraries were fetched into a cache outside the repository and only counted; demo library files were fetched into the corpus cache and none is committed; no KiCad source code was read) | S-0020, S-0023, S-0024, S-0025, S-0042, S-0043, S-0044, S-0045, S-0046, S-0095, S-0096, S-0097 | maintainer |
+| 2026-10-03 | backends, backends/kicad, docs/formats | docs/evidence/sources.md, docs/hypotheses.md, docs/formats/kicad/frame.md, docs/copper.md, src/fenolite/backends/kicad/PROVENANCE.md, then src/fenolite/backends/base.py, src/fenolite/backends/kicad/frame.py and copper.py, written from that page (c0028 board-frame queries and manual copper; S-0001, S-0038, S-0110 and S-0111 opened on this date) | S-0001, S-0010, S-0018, S-0019, S-0020, S-0022, S-0037, S-0038, S-0040, S-0058, S-0110, S-0111 | maintainer |
+| 2026-10-04 | backends/kicad, docs/formats | docs/evidence/sources.md, docs/hypotheses.md, docs/formats/kicad/board.md, src/fenolite/backends/kicad/PROVENANCE.md, then src/fenolite/backends/kicad/pcb.py and fields.py, written from that page (c0030 footprint fields: S-0120 opened on this date; the version-history file S-0030 and the keyword file S-0033 consulted at tag 8.0.0 for dated notes and single names only; the field facts come from `kicad-cli` probe outcomes on boards authored as text and from a census of the corpus boards; no other KiCad source was read) | S-0001, S-0010, S-0020, S-0021, S-0022, S-0027, S-0029, S-0030, S-0033, S-0037, S-0038, S-0040, S-0055, S-0056, S-0058, S-0120 | maintainer |
+| 2026-10-04 | backends/kicad, docs/formats | docs/evidence/sources.md, docs/hypotheses.md, docs/formats/kicad/board.md and gerber.md, src/fenolite/backends/kicad/PROVENANCE.md, then src/fenolite/backends/kicad/zones.py, pcb.py and _fpmap.py, written from those pages (c0031 zone settings; S-0001, S-0010, S-0021, S-0037 and S-0038 opened on this date, `pcb.keywords` at tag 8.0.0 read for 13 single names, the Gerber specification read for facts and never committed; no KiCad parser source was read) | S-0001, S-0010, S-0018, S-0020, S-0021, S-0022, S-0029, S-0033, S-0037, S-0038, S-0058, S-0125 | maintainer |
+| 2026-10-04 | backends/kicad, checks, docs/formats | docs/evidence/sources.md, docs/hypotheses.md, docs/formats/kicad/copper.md, src/fenolite/backends/kicad/PROVENANCE.md, then src/fenolite/backends/kicad/copperrules.py, src/fenolite/checks/clearance.py and copper.py, written from that page and from docs/formats/kicad/project.md and rules.md (c0029 copper check: `kicad-cli` run as a subprocess on authored benches; no KiCad source code was read, nothing copied) | S-0010, S-0019, S-0020, S-0022, S-0029, S-0037, S-0038, S-0055, S-0056 | maintainer |
+| 2026-10-03 | backends/altium, docs/formats | docs/evidence/sources.md, docs/hypotheses.md, docs/formats/altium/schematic-ascii.md, project.md and pcb-copper.md, docs/evidence/altium-pcb.md, src/fenolite/backends/altium/PROVENANCE.md, then src/fenolite/backends/altium/ and src/fenolite/lens/altium.py (c0048, after the maintainer's report of the change order made with Altium Designer 26.5 under a trial licence: Altium's public documentation pages were read; the public Altium-saved files of S-0187, S-0188, S-0172, S-0174 to S-0176, S-0199 and S-0200, already in the scratch folder, were read again with the test readers for their class records, directives and class keys; the project file that Altium saved from the built board example, the maintainer's own file, was read outside the repository for its class keys only; nothing was downloaded, decompiled, copied or committed) | S-0130, S-0185, S-0187, S-0188, S-0172, S-0174, S-0175, S-0176, S-0199, S-0200, S-0310, S-0311, S-0312, S-0313 | maintainer |
+| 2026-10-04 | backends/kicad, docs/formats | docs/evidence/sources.md, docs/hypotheses.md, docs/formats/kicad/board.md and cli.md, src/fenolite/backends/kicad/PROVENANCE.md, then the zone-fill runner and oracle from those facts (c0015; official Docker documentation read for command options; `kicad-cli` run only as a subprocess on authored boards; no third-party parser code read) | S-0020, S-0022, S-0029, S-0037, S-0205 | Codex agent |
+| 2026-10-04 | backends/kicad, placement, docs/formats | docs/evidence/sources.md, docs/hypotheses.md, docs/formats/kicad/board.md, docs/placement.md, src/fenolite/backends/kicad/PROVENANCE.md, then src/fenolite/backends/kicad/outline.py and replace.py and src/fenolite/placement/, written from that page (c0022 placement: S-0038 opened on this date for the "Courtyards overlap" check; `kicad-cli` run as a subprocess on authored benches and on the built blink; no KiCad source code was read, nothing copied) | S-0010, S-0019, S-0020, S-0021, S-0022, S-0037, S-0038, S-0058 | maintainer |
+| 2026-10-04 | routing plugin | KiCadRoutingTools `v0.22.1` is run as a subprocess from a user-named checkout; Fenolite neither imports nor distributes it (c0016) | S-0215, S-0216, S-0217 | Codex agent |
+| 2026-10-04 | backends/specctra, docs/formats | docs/adr/0006-specctra-and-freerouting.md, docs/evidence/sources.md, docs/hypotheses.md, docs/formats/specctra/dsn.md and ses.md, src/fenolite/backends/specctra/PROVENANCE.md, then src/fenolite/backends/specctra/ (lexer, design-file writer, session reader), written from those pages (c0023: the SPECCTRA Design Language Reference, S-0224, was read on line for facts under ADR-0006, which is `Proposed`; nothing of it was saved, copied or committed; Freerouting's documentation pages were read; Freerouting is a GPL-3.0 program run across a process boundary: the maintainer installed the 2.4.1 jar outside the repository and the probes ran it as a subprocess on files Fenolite wrote; no source code of Freerouting or of KiCad was read) | S-0022, S-0037, S-0220, S-0221, S-0222, S-0223, S-0224, S-0225, S-0226 | Claude agent |
+| 2026-10-04 | docs/adr, routing/plugins | docs/adr/0006-specctra-and-freerouting.md (accepted), src/fenolite/routing/plugins/specctra/freerouting.py (container command line; `sends_data_offsite`), docs/evidence/routing.md, docs/hypotheses.md | S-0220 to S-0226 (no new source; the image configuration of S-0226 was read with `docker image inspect`) | maintainer |
+| 2026-10-04 | analysis, docs | docs/evidence/sources.md, docs/hypotheses.md, docs/analyses.md and src/fenolite/analysis/PROVENANCE.md, then src/fenolite/analysis/ and src/fenolite/cli/cmd_analyze.py, written from those pages (c0047: the capacity fit and its range as the help text S-0269 states them, the via barrel as a fact of S-0270, recorded by the change's proposal on 2026-10-03; no standard was read, and no chart, table or figure of a standard is reproduced; the distance analyses are Fenolite's own geometry; no requirement value is shipped) | S-0011, S-0012, S-0020, S-0022, S-0269, S-0270, S-0271, S-0272, S-0273 | maintainer |
+| 2026-10-05 | backends/kicad | src/fenolite/backends/kicad/cli.py (kicad-cli found in KiCad's default Windows install folder and through PATHEXT), projectset.py (a rooted path is absolute on Windows), libcache.py and oracle.py (text written with LF line ends on every system) | none: no format fact changed; the install folder `<Program Files>\KiCad\<major>.0\bin` is the one `tests/_resources.py` already searched | Claude agent |
+| 2026-10-05 | backends/kicad, catalog | src/fenolite/backends/kicad/sym.py (Fenolite symbol-fill readback fix); generic symbol and package entries authored from the public product-category and package-drawing references registered as S-0316–S-0332; no CAD library or parser source copied | S-0316 to S-0332 | Luiz Carlos Gili |
+| 2026-10-05 | backends/altium, docs/formats | docs/evidence/sources.md, docs/hypotheses.md, docs/formats/altium/sheet-template.md, src/fenolite/backends/altium/PROVENANCE.md, tests/corpus/manifest.toml, then src/fenolite/backends/altium/read/sheet.py and the `import` action of src/fenolite/cli/cmd_template.py, written from that page (c0046: the format notes of S-0130 and three Altium documentation pages were read for facts; nothing was copied, transcribed or followed; S-0131 was not opened during the implementation, its facts are those the design recorded on 2026-10-03; three public, MIT-licensed `.SchDot` files of S-0264 and S-0265 were fetched into the corpus cache by `tools/corpus_fetch.py`, read there for counts per record kind and key name, and never committed; no template, logo or title block of any organisation is committed or reproduced, and the test templates are authored in `tests/_altium_sheet.py`; no vendor software was run or decompiled) | S-0130, S-0131, S-0147, S-0261, S-0262, S-0263, S-0264, S-0265 | coding agent |
+| 2026-10-05 | docs/formats, backends/kicad, exports | docs/formats/kicad/cli.md (three rows on the position CSV, from running `kicad-cli` 9.0.9 and 10.0.6 on authored boards), src/fenolite/backends/kicad/PROVENANCE.md, docs/assembly.md, src/fenolite/exports/{assembly,bom,placement}.py (c0064: tables and a user-written column template; every example column name is made up for Fenolite, and no template, column list or rotation table of any assembly service, distributor or company was consulted or reproduced) | S-0020, S-0022, S-0037 (the position file), S-0365 and S-0366 (CSV) | Luiz Carlos Gili |
+| 2026-10-05 | backends/kicad, cli, checks, analysis | src/fenolite/backends/kicad/sexpr.py (`canonical` and `first_line_difference`: the existing parser and printer composed, no format fact added), src/fenolite/checks/diff.py, src/fenolite/analysis/views.py, src/fenolite/cli/explain.py with data/explain.toml and the commands of c0066 (the explanation texts are written for Fenolite from its own code and docs; no vendor text, parser code or grammar file was read or copied) | none: no source registered, no format page changed | Claude agent |
+| 2026-10-05 | backends/kicad, model | docs/formats/kicad/schematic.md, docs/evidence/sources.md and docs/hypotheses.md, then src/fenolite/model/schematic.py, src/fenolite/backends/kicad/sch.py and sym.py (`symbol_from`), written from that page (c0060: the schematic format page S-0367 and the dated versions of S-0031 read for facts; the demo schematics read for counts only; authored fixtures under tests/data/kicad/schematic/ checked with `kicad-cli` run as a subprocess; no KiCad source or keyword file copied) | S-0001, S-0020, S-0022, S-0031, S-0037, S-0041, S-0058, S-0367 | Claude agent |
+| 2026-10-05 | backends/kicad, docs/formats | src/fenolite/backends/kicad/frame.py (the offset of a pad's drill moves the copper entries and leaves the hole at the pad position), zones.py (pad zone connection requests on a built copy and on a kept footprint; no format fact) and copper.py (arc steps and via kinds of script copper; no format fact), docs/formats/kicad/frame.md, libraries.md ("Drill forms") and copper.md (the zone's own clearance against a fill; two fills; a refilled pour), docs/hypotheses.md (`H-G-FRAME-OFFSET`, `H-K-COPPER-ZONECLR`, `H-G-FRAME-ARC`, `H-K-COPPER-VIAKINDS`, `H-K-PAD-ZONE-LIB`, `H-K-CI-MACOSAPP`), written from the verdicts of `kicad-cli` 10.0.6 `pcb drc` and `pcb upgrade` on authored benches (c0068: `tests/kicad/frame/_offsetbench.py`, `_arccases.py`, `tests/kicad/copper/_copperparity.py`, `tests/kicad/zones/_freshfill.py`, `_padzonecases.py`); no KiCad source was read, and the macOS disk image of S-0361 was not downloaded | S-0001, S-0020, S-0022, S-0029, S-0038, S-0360 to S-0363 | Claude agent |
+| 2026-10-05 | backends, backends/kicad, backends/altium, backends/specctra, verify | src/fenolite/backends/matrix.py and base.py (`MatrixRow`), `claims.py` in the three backend packages, one evidence declaration in each backend module that had none (a `# evidence:` comment, or a constant over rows that `docs/hypotheses.md` already holds), src/fenolite/verify/evidence.py, tools/gen_evidence_matrix.py and docs/evidence/matrix.md (c0067: declarations and a generated table of them; no format fact, no source and no hypothesis added, no row of the register changed) | none: no source registered, no format page changed | Claude agent |
+| 2026-10-05 | backends/kicad, lens, docs/formats | docs/formats/kicad/schematic.md ("Generated sheets") and board.md (the `N/C` label), docs/evidence/sources.md and docs/hypotheses.md, then src/fenolite/backends/kicad/netnames.py, symembed.py, schlayout.py, schgen.py, sch.py (`write_schematic`), pcb.py (stored net names) and padnets.py, src/fenolite/lens/build.py and schplacements.py, written from that page (c0061: every fact was measured by running `kicad-cli` 9.0.9 and 10.0.6 as a subprocess on sheets authored for Fenolite and on projects it built; the manuals S-0022, S-0037 and S-0046 and the format page S-0367 were read for facts; no KiCad source, keyword file or library symbol was copied; the power flag symbol is drawn for Fenolite) | S-0020, S-0022, S-0037, S-0046, S-0367 | Claude agent |
+| 2026-10-05 | backends/specctra | src/fenolite/backends/specctra/dsn.py (a one-pad net with the `unconnected-(` spelling is written as a pad on no net; no format fact added: the spelling is the recorded one of docs/formats/kicad/schematic.md, "Net names") | none beyond the sources already listed for that page | Claude agent |
+| 2026-10-06 | backends/kicad, docs/formats | src/fenolite/backends/kicad/bom.py and cli.py (`export_bom`), docs/formats/kicad/cli.md ("Bill of materials", from running `kicad-cli` 9.0.9 and 10.0.6 on schematics that Fenolite built; c0064). No manual page, parser or exporter source was read; no BOM layout of any assembly service, distributor or company was consulted | S-0020 | Luiz Carlos Gili |
+| 2026-10-05 | backends/kicad, checks, lens, cli, docs/formats | docs/formats/kicad/schematic.md ("Netlist export"), docs/evidence/sources.md and docs/hypotheses.md (`H-K-NETLIST-SHAPE`, `H-K-NETLIST-OWN`), then src/fenolite/backends/kicad/netlist.py and sch_netlist.py, sch.py (`opaque_heads`), oracle.py (`schematic_netlist`), src/fenolite/backends/base.py (`SchematicNetlistOracle`), src/fenolite/checks/assignment_compare.py, src/fenolite/lens/build.py (the netlist guard) and src/fenolite/cli/cmd_netlist.py, written from that page (c0063: every fact was measured by running `kicad-cli` 9.0.9 and 10.0.6 as a subprocess on projects Fenolite built; the manuals S-0022 and S-0037 were read for the command and its options; no netlist format page exists; no KiCad source, keyword file or library symbol was read or copied; the two exports under tests/data/kicad/netlist/ are authored for Fenolite) | S-0020, S-0022, S-0037 | Claude agent |
+| 2026-10-05 | backends/kicad, docs/formats | docs/formats/kicad/erc.md, docs/evidence/sources.md and docs/hypotheses.md, then src/fenolite/backends/base.py (the neutral ERC report and oracle types), src/fenolite/backends/kicad/erc.py, cli.py (`KicadCli.erc`, the parity flag), projectset.py (the schematic files of the copy set) and oracle.py (`erc`, `rt2_erc`, parity in `drc`), written from that page (c0062: every fact was measured by running `kicad-cli` 9.0.9 and 10.0.6 as a subprocess on projects Fenolite built and on sheets authored for Fenolite; the key names of the report are those the tool wrote, which the proposal had compared with the schema files S-0450 and S-0451 on 2026-10-04; the schema files were not fetched again, and no KiCad source, schema or keyword file was copied) | S-0020, S-0022, S-0037, S-0046, S-0450, S-0451 | Claude agent |
+| 2026-10-06 | backends, checks, docs/formats | src/fenolite/backends/base.py (`ErcReport.kinds()`), src/fenolite/checks/rt2.py (`erc_rt2` compares kinds) and docs/formats/kicad/erc.md (two rows restated: `sch erc` can name another item of one violation in each run), from running `kicad-cli` 9.0.9 and 10.0.6 as a subprocess on the corpus projects of the manifest (c0062, c0066). No manual page, parser or tool source was read | none beyond S-0020, already listed for that page | Luiz Carlos Gili |
+| 2026-10-06 | backends/kicad, lens, cli, docs/formats | docs/formats/kicad/schematic.md (the rows of `H-K-SCH-HIER-FILE`, `H-K-SCH-HIER-PATH` and `H-K-SCH-WIRE-END`) and docs/hypotheses.md, then src/fenolite/model/schematic.py (`Wire`), src/fenolite/backends/kicad/sch.py (wires and sheet references of a created sheet, `opaque_wires`), schlayout.py (satellites, clusters, sheet references), schgen.py (one sheet per module), sch_netlist.py (the sheet tree and wires), src/fenolite/lens/build.py and src/fenolite/cli/cmd_build.py and cmd_netlist.py, written from that page (c0070: every fact was measured by running `kicad-cli` 9.0.9 and 10.0.6 as a subprocess on sheets written by hand for Fenolite in tests/kicad/schematic/_hiercases.py and on projects Fenolite built; the file format page S-0367 was read for the children of `wire` and `sheet`; no KiCad source, keyword file, library symbol or third-party schematic was read or copied; every layout length is a Fenolite choice) | S-0020, S-0029, S-0367 | Claude agent |
+| 2026-10-06 | backends/kicad, docs/formats | src/fenolite/backends/kicad/schlayout.py (`turned_text_room`, the text room of a turned unit in `text_box` and in the snap) and sch.py (the Reference and Value of a turned or mirrored instance: centred, at the angle drawn level), and one row of docs/formats/kicad/schematic.md (how a field is drawn in a turned symbol), from looking at the PDF exports that `kicad-cli` 9.0.9 and 10.0.6, run as a subprocess, made of sheets Fenolite built (c0070, the text overlap the maintainer saw on the renders). No manual page, parser or tool source was read | none beyond S-0020 and S-0029, already listed for that page | Luiz Carlos Gili |

fenolite-0.2.0/LEGAL.md

@@ -0,0 +1,48 @@
+# Legal notes
+
+Fenolite is licensed under the Apache License, Version 2.0 (see `LICENSE` and `NOTICE`).
+This file explains where Fenolite's knowledge of third-party file formats comes from and how the
+project relates to earlier, non-public work in the same domain. It is a statement of project
+policy, not legal advice.
+
+## A. Format analysis
+
+Fenolite reads and writes files produced by other electronic design automation (EDA) tools.
+
+1. Knowledge of third-party file formats comes **only** from public documentation (official
+   documentation, published specifications, public developer documentation of open-source tools)
+   and from files the contributor is entitled to read (files they created themselves, or files
+   published under a licence that permits the use).
+2. Every format fact used by the code is recorded in `docs/formats/<backend>/*.md` with its public
+   source, listed in `docs/evidence/sources.md`, and carries an evidence label. Code is written
+   from those pages, never from third-party source code. Reading public copyleft sources to learn
+   a **fact** is allowed only when the fact is recorded there with its source.
+3. Copyleft software (GPL, AGPL and similar) is used only behind a process boundary (a
+   subprocess exchanging files or documented JSON) or through a plugin API that its project
+   publishes; it is never imported, vendored or transcribed (ADR-0004).
+
+The following are **forbidden** (ADR-0003):
+
+- **(P1)** decompiling, disassembling or otherwise reverse engineering vendor software — contributors
+  never decompile a tool to learn its format;
+- **(P2)** transcribing, compiling or converting GPL/AGPL parser sources or machine-readable grammar
+  files (for example Kaitai `.ksy` descriptions) into Fenolite code;
+- **(P3)** using files the contributor is not entitled to read (for example an employer's design
+  files, or files obtained under terms that do not allow this use);
+- **(P4)** using an employer's software licence to study or reverse engineer a tool for Fenolite.
+
+Opening a file one is entitled to read in a tool one is licensed to use, and reporting what the
+tool does with it, is ordinary use and may be recorded as a fact with evidence label
+`…(author-report)`; no file used in such a session enters the repository unless it is authored for
+Fenolite or published under a licence listed as embeddable in the corpus manifest.
+
+## B. Material from organisations
+
+Fenolite is developed **clean-room** with respect to non-public material:
+
+- no design files, templates, title blocks, rule sets, part libraries, parameter conventions,
+  constants measured on non-public files, seeds, fixtures, test data, statistics, vocabularies or
+  examples belonging to any organisation (including a contributor's employer or clients) are added
+  to Fenolite, even when such files were used privately to try an idea;
+- every format fact is derived from the public sources in block A and recorded with them;
+- work sessions on format code are logged in `LEGAL-ANNEX.md`.