esptool 5.2.dev1__tar.gz → 5.2.dev3__tar.gz

{esptool-5.2.dev1/esptool.egg-info → esptool-5.2.dev3}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: esptool
-Version: 5.2.dev1
+Version: 5.2.dev3
 Summary: A serial utility for flashing, provisioning, and interacting with Espressif SoCs.
 Author: Fredrik Ahlberg (themadinventor), Angus Gratton (projectgus), Espressif Systems
 License: GPLv2+
@@ -31,7 +31,7 @@ Requires-Dist: pyserial>=3.3
 Requires-Dist: reedsolo<1.8,>=1.5.3
 Requires-Dist: PyYAML>=5.1
 Requires-Dist: intelhex
-Requires-Dist: rich_click<1.9.0
+Requires-Dist: rich_click<2
 Requires-Dist: click<9
 Provides-Extra: dev
 Requires-Dist: pyelftools; extra == "dev"

{esptool-5.2.dev1 → esptool-5.2.dev3}/espefuse/__init__.py

@@ -7,7 +7,7 @@ import sys
 import rich_click as click
 
 import esptool
-from esptool.cli_util import ChipType, ResetModeType
+from esptool.cli_util import BaudRateType, ChipType, ResetModeType, SerialPortType
 from esptool.logger import log
 
 from espefuse.cli_util import Group
@@ -53,7 +53,7 @@ __all__ = [
 @click.option(
     "--baud",
     "-b",
-    type=int,
+    type=BaudRateType(),
     default=esptool.ESPLoader.ESP_ROM_BAUD,
     envvar="ESPTOOL_BAUD",
     help="Serial port baud rate used when flashing/reading.",
@@ -62,7 +62,7 @@ __all__ = [
     "--port",
     "-p",
     envvar="ESPTOOL_PORT",
-    type=click.Path(),
+    type=SerialPortType(),
     help="Serial port device.",
 )
 @click.option(

{esptool-5.2.dev1 → esptool-5.2.dev3}/espefuse/efuse/base_fields.py

@@ -88,7 +88,7 @@ class CheckArgValue:
 class EfuseProtectBase:
     # This class is used by EfuseBlockBase and EfuseFieldBase
     read_disable_bit: int | list[int] | None
-    write_disable_bit: int | list[int] | None
+    write_disable_bit: int | None
     parent: "EspEfusesBase"
     name: str
 
@@ -182,7 +182,7 @@ class EfuseBlockBase(EfuseProtectBase):
         self.rd_addr: int = param.rd_addr
         self.wr_addr: int = param.wr_addr
         self.write_disable_bit: int | None = param.write_disable_bit
-        self.read_disable_bit: int | None = param.read_disable_bit
+        self.read_disable_bit: int | list[int] | None = param.read_disable_bit
         self.len: int = param.len
         self.key_purpose_name: str | None = param.key_purpose
         bit_block_len: int = self.get_block_len() * 8

{esptool-5.2.dev1 → esptool-5.2.dev3}/espefuse/efuse/base_operations.py

@@ -223,16 +223,21 @@ class BaseCommands:
                 f"({self.CHIP_NAME} != {self.esp.CHIP_NAME})"
             )
 
+    @classmethod
+    def _close_port(
+        cls,
+        esp: esptool.ESPLoader | EmulateEfuseControllerBase | None,
+        external_esp: bool = False,
+    ) -> None:
+        """Close the serial port if it was opened internally."""
+        if esp is not None and not external_esp and isinstance(esp, esptool.ESPLoader):
+            esp._port.close()
+
     def __enter__(self):
         return self
 
     def __exit__(self, exc_type, exc_value, traceback):
-        if (
-            self.esp is not None
-            and not self.external_esp
-            and isinstance(self.esp, esptool.ESPLoader)
-        ):
-            self.esp._port.close()
+        self._close_port(self.esp, self.external_esp)
 
     ################################# CLI definitions #################################
 
@@ -994,8 +999,8 @@ class BaseCommands:
                             f"{efuse_name} must be readable, stop this operation!"
                         )
                 else:
-                    for block in self.efuses.Blocks.BLOCKS:
-                        block = self.efuses.Blocks.get(block)
+                    for block_tuple in self.efuses.Blocks.BLOCKS:
+                        block = self.efuses.Blocks.get(block_tuple)
                         if block.name == efuse_name and block.key_purpose is not None:
                             if not self.efuses[block.key_purpose].need_rd_protect(
                                 self.efuses[block.key_purpose].get()

{esptool-5.2.dev1 → esptool-5.2.dev3}/espefuse/efuse/emulate_efuse_controller_base.py

@@ -1,27 +1,36 @@
 # This file describes eFuses controller for ESP32 chip
 #
-# SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
+# SPDX-FileCopyrightText: 2020-2026 Espressif Systems (Shanghai) CO LTD
 #
 # SPDX-License-Identifier: GPL-2.0-or-later
 
+from abc import abstractmethod
 import re
+from typing import Any
 
 from bitstring import BitStream
+from espefuse.efuse.mem_definition_base import (
+    BlockDefinition,
+    EfuseBlocksBase,
+    EfuseFieldsBase,
+    EfuseRegistersBase,
+    Field,
+)
 from esptool.logger import log
 
 
 class EmulateEfuseControllerBase:
     """The class for virtual efuse operations. Using for HOST_TEST."""
 
-    CHIP_NAME = ""
-    mem = None
-    debug = False
-    Blocks = None
-    Fields = None
-    REGS = None
-    USB_JTAG_SERIAL_PID = 0x1001
+    CHIP_NAME: str = ""
+    mem: BitStream
+    debug: bool = False
+    Blocks: type[EfuseBlocksBase]
+    Fields: EfuseFieldsBase
+    REGS: type[EfuseRegistersBase]
+    USB_JTAG_SERIAL_PID: int = 0x1001
 
-    def __init__(self, efuse_file=None, debug=False):
+    def __init__(self, efuse_file: str | None = None, debug: bool = False):
         self.debug = debug
         self.efuse_file = efuse_file
         if self.efuse_file:
@@ -43,57 +52,72 @@ class EmulateEfuseControllerBase:
 
     """ esptool method start >> """
 
-    def get_chip_description(self):
+    @abstractmethod
+    def get_major_chip_version(self) -> int:
+        pass
+
+    @abstractmethod
+    def get_minor_chip_version(self) -> int:
+        pass
+
+    def get_chip_description(self) -> str:
         major_rev = self.get_major_chip_version()
         minor_rev = self.get_minor_chip_version()
         return f"{self.CHIP_NAME} (revision v{major_rev}.{minor_rev})"
 
-    def get_chip_revision(self):
+    def get_chip_revision(self) -> int:
         return self.get_major_chip_version() * 100 + self.get_minor_chip_version()
 
-    def read_efuse(self, n, block=0):
+    def read_efuse(self, n: int, block: int = 0) -> int:
         """Read the nth word of the ESP3x EFUSE region."""
         blk = self.Blocks.get(self.Blocks.BLOCKS[block])
         return self.read_reg(blk.rd_addr + (4 * n))
 
-    def read_reg(self, addr):
+    def read_reg(self, addr: int) -> int:
         self.mem.pos = self.mem.length - ((addr - self.REGS.DR_REG_EFUSE_BASE) * 8 + 32)
-        return self.mem.read("uint:32")
-
-    def write_reg(self, addr, value, mask=0xFFFFFFFF, delay_us=0, delay_after_us=0):
+        return int(self.mem.read("uint:32"))
+
+    def write_reg(
+        self,
+        addr: int,
+        value: int,
+        mask: int = 0xFFFFFFFF,
+        delay_us: int = 0,
+        delay_after_us: int = 0,
+    ) -> None:
         self.mem.pos = self.mem.length - ((addr - self.REGS.DR_REG_EFUSE_BASE) * 8 + 32)
         self.mem.overwrite("uint:32={}".format(value & mask))
         self.handle_writing_event(addr, value)
 
-    def update_reg(self, addr, mask, new_val):
+    def update_reg(self, addr: int, mask: int, new_val: int) -> None:
         position = self.mem.length - ((addr - self.REGS.DR_REG_EFUSE_BASE) * 8 + 32)
         self.mem.pos = position
         cur_val = self.mem.read("uint:32")
         self.mem.pos = position
         self.mem.overwrite("uint:32={}".format(cur_val | (new_val & mask)))
 
-    def write_efuse(self, n, value, block=0):
+    def write_efuse(self, n: int, value: int, block: int = 0) -> None:
         """Write the nth word of the ESP3x EFUSE region."""
         blk = self.Blocks.get(self.Blocks.BLOCKS[block])
         self.write_reg(blk.wr_addr + (4 * n), value)
 
-    def _get_pid(self):
+    def _get_pid(self) -> int:
         return -1
 
     """ << esptool method end """
 
-    def handle_writing_event(self, addr, value):
+    def handle_writing_event(self, addr: int, value: int) -> None:
         self.save_to_file()
 
-    def save_to_file(self):
+    def save_to_file(self) -> None:
         if self.efuse_file:
             with open(self.efuse_file, "wb") as f:
                 self.mem.tofile(f)
 
-    def handle_coding_scheme(self, blk, data):
+    def handle_coding_scheme(self, blk: BlockDefinition, data: BitStream) -> BitStream:
         return data
 
-    def copy_blocks_wr_regs_to_rd_regs(self, updated_block=None):
+    def copy_blocks_wr_regs_to_rd_regs(self, updated_block: int | None = None) -> None:
         for b in reversed(self.Blocks.BLOCKS):
             blk = self.Blocks.get(b)
             if updated_block is not None:
@@ -106,36 +130,38 @@ class EmulateEfuseControllerBase:
             plain_data = self.check_wr_protection_area(blk.id, plain_data)
             self.update_block(blk, plain_data)
 
-    def clean_blocks_wr_regs(self):
+    def clean_blocks_wr_regs(self) -> None:
         for b in self.Blocks.BLOCKS:
             blk = self.Blocks.get(b)
             for offset in range(0, blk.len * 4, 4):
                 wr_addr = blk.wr_addr + offset
                 self.write_reg(wr_addr, 0)
 
-    def read_field(self, name, bitstring=True):
+    def read_field(self, name: str, bitstring: bool = True) -> Any:
         for field in self.Fields.EFUSES:
             if field.name == name:
-                self.read_block(field.block)
                 block = self.read_block(field.block)
                 if field.type.startswith("bool"):
                     field_len = 1
                 else:
-                    field_len = int(re.search(r"\d+", field.type).group())
+                    match = re.search(r"\d+", field.type)
+                    if match:
+                        field_len = int(match.group())
+                    else:
+                        raise ValueError(f"Invalid field type: {field.type}")
                     if field.type.startswith("bytes"):
                         field_len *= 8
-                block.pos = block.length - (field.word * 32 + field.pos + field_len)
+                block.pos = block.length - (field.word * 32 + field.pos + field_len)  # type: ignore
                 if bitstring:
                     return block.read(field_len)
                 else:
                     return block.read(field.type)
-        return None
+        raise ValueError(f"Field {name} not found")
 
-    def get_bitlen_of_block(self, blk, wr=False):
+    def get_bitlen_of_block(self, blk: BlockDefinition, wr: bool = False) -> int:
         return 32 * blk.len
 
-    def read_block(self, idx, wr_regs=False):
-        block = None
+    def read_block(self, idx: int, wr_regs: bool = False) -> BitStream:
         for b in self.Blocks.BLOCKS:
             blk = self.Blocks.get(b)
             if blk.id == idx:
@@ -146,19 +172,23 @@ class EmulateEfuseControllerBase:
                 )
                 block = self.mem.read(blk_len_bits)
                 break
+        else:
+            raise ValueError(f"Block {idx} not found")
         return block
 
-    def update_block(self, blk, wr_data):
+    def update_block(self, blk: BlockDefinition, wr_data: BitStream) -> None:
         wr_data = self.read_block(blk.id) | wr_data
         self.overwrite_mem_from_block(blk, wr_data)
 
-    def overwrite_mem_from_block(self, blk, wr_data):
+    def overwrite_mem_from_block(
+        self, blk: BlockDefinition, wr_data: BitStream
+    ) -> None:
         self.mem.pos = self.mem.length - (
             (blk.rd_addr - self.REGS.DR_REG_EFUSE_BASE) * 8 + wr_data.len
         )
         self.mem.overwrite(wr_data)
 
-    def check_wr_protection_area(self, num_blk, wr_data):
+    def check_wr_protection_area(self, num_blk: int, wr_data: BitStream) -> BitStream:
         # checks fields which have the write protection bit.
         # if the write protection bit is set, we need to protect that area from changes.
         write_disable_bit = self.read_field("WR_DIS", bitstring=False)
@@ -175,56 +205,62 @@ class EmulateEfuseControllerBase:
                     if field.write_disable_bit is not None and write_disable_bit & (
                         1 << field.write_disable_bit
                     ):
-                        data = self.read_field(field.name)
+                        data: BitStream = self.read_field(field.name)
                         data.set(1)
                         mask_wr_data.pos = mask_wr_data.length - (
-                            field.word * 32 + field.pos + data.len
+                            field.word * 32 + field.pos + data.len  # type: ignore
                         )
                         mask_wr_data.overwrite(data)
         mask_wr_data.invert()
         return wr_data & mask_wr_data
 
-    def check_rd_protection_area(self):
+    @staticmethod
+    def get_read_disable_mask(blk: BlockDefinition | Field) -> int:
+        mask = 0
+        if isinstance(blk.read_disable_bit, list):
+            for i in blk.read_disable_bit:
+                mask |= 1 << i
+        elif blk.read_disable_bit is not None:
+            mask = 1 << blk.read_disable_bit
+        return mask
+
+    def set_read_disable_bits(
+        self,
+        block: BitStream,
+        read_disable_bit: int,
+        blk: BlockDefinition,
+    ) -> None:
+        block.set(0)
+
+    def check_rd_protection_area(self) -> None:
         # checks fields which have the read protection bits.
         # if the read protection bit is set then we need to reset this field to 0.
         read_disable_bit = self.read_field("RD_DIS", bitstring=False)
         for b in self.Blocks.BLOCKS:
             blk = self.Blocks.get(b)
             block = self.read_block(blk.id)
-            if blk.read_disable_bit is not None and read_disable_bit & (
-                1 << blk.read_disable_bit
+            if (
+                blk.read_disable_bit is not None
+                and read_disable_bit & self.get_read_disable_mask(blk)
             ):
-                block.set(0)
+                self.set_read_disable_bits(block, read_disable_bit, blk)
             else:
                 for field in self.Fields.EFUSES:
                     if (
                         blk.id == field.block
                         and field.read_disable_bit is not None
-                        and read_disable_bit & (1 << field.read_disable_bit)
+                        and read_disable_bit & self.get_read_disable_mask(field)
                     ):
-                        raw_data = self.read_field(field.name)
+                        raw_data: BitStream = self.read_field(field.name)
                         raw_data.set(0)
                         block.pos = block.length - (
-                            field.word * 32 + field.pos + raw_data.length
+                            field.word * 32 + field.pos + raw_data.length  # type: ignore
                         )
                         block.overwrite(BitStream(raw_data.length))
             self.overwrite_mem_from_block(blk, block)
 
-    def clean_mem(self):
+    def clean_mem(self) -> None:
         self.mem.set(0)
         if self.efuse_file:
             with open(self.efuse_file, "wb") as f:
                 self.mem.tofile(f)
-
-
-class FatalError(RuntimeError):
-    """
-    Wrapper class for runtime errors that aren't caused by internal bugs
-    """
-
-    def __init__(self, message):
-        RuntimeError.__init__(self, message)
-
-    @staticmethod
-    def WithResult(message, result):
-        return FatalError(result)

{esptool-5.2.dev1 → esptool-5.2.dev3}/espefuse/efuse/esp32/emulate_efuse_controller.py

@@ -6,19 +6,25 @@
 
 import time
 
+from bitstring import BitStream
+
+from espefuse.efuse.mem_definition_base import BlockDefinition
+
 from .mem_definition import EfuseDefineBlocks, EfuseDefineFields, EfuseDefineRegisters
-from ..emulate_efuse_controller_base import EmulateEfuseControllerBase, FatalError
+from ..emulate_efuse_controller_base import EmulateEfuseControllerBase
 from esptool.logger import log
+from esptool import FatalError
 
 
 class EmulateEfuseController(EmulateEfuseControllerBase):
     """The class for virtual efuse operations. Using for HOST_TEST."""
 
     CHIP_NAME = "ESP32"
-    mem = None
-    debug = False
+    Blocks: type[EfuseDefineBlocks]
+    Fields: EfuseDefineFields
+    REGS: type[EfuseDefineRegisters]
 
-    def __init__(self, efuse_file=None, debug=False):
+    def __init__(self, efuse_file: str | None = None, debug: bool = False):
         self.Blocks = EfuseDefineBlocks
         self.Fields = EfuseDefineFields(None)
         self.REGS = EfuseDefineRegisters
@@ -26,16 +32,16 @@ class EmulateEfuseController(EmulateEfuseControllerBase):
 
     """ esptool method start >> """
 
-    def get_major_chip_version(self):
+    def get_major_chip_version(self) -> int:
         return 3
 
-    def get_minor_chip_version(self):
+    def get_minor_chip_version(self) -> int:
         return 0
 
-    def get_crystal_freq(self):
+    def get_crystal_freq(self) -> int:
         return 40  # MHz (common for all chips)
 
-    def read_reg(self, addr):
+    def read_reg(self, addr: int) -> int:
         if addr == self.REGS.APB_CTL_DATE_ADDR:
             return self.REGS.APB_CTL_DATE_V << self.REGS.APB_CTL_DATE_S
         else:
@@ -43,7 +49,7 @@ class EmulateEfuseController(EmulateEfuseControllerBase):
 
     """ << esptool method end """
 
-    def send_burn_cmd(self):
+    def send_burn_cmd(self) -> None:
         def wait_idle():
             deadline = time.time() + self.REGS.EFUSE_BURN_TIMEOUT
             while time.time() < deadline:
@@ -59,7 +65,7 @@ class EmulateEfuseController(EmulateEfuseControllerBase):
         self.write_reg(self.REGS.EFUSE_REG_CMD, self.REGS.EFUSE_CMD_READ)
         wait_idle()
 
-    def handle_writing_event(self, addr, value):
+    def handle_writing_event(self, addr: int, value: int) -> None:
         if addr == self.REGS.EFUSE_REG_CMD:
             if value == self.REGS.EFUSE_CMD_WRITE:
                 self.write_reg(addr, 0)
@@ -70,7 +76,7 @@ class EmulateEfuseController(EmulateEfuseControllerBase):
                 self.write_reg(addr, 0)
                 self.save_to_file()
 
-    def read_raw_coding_scheme(self):
+    def read_raw_coding_scheme(self) -> int:
         coding_scheme = (
             self.read_efuse(self.REGS.EFUSE_CODING_SCHEME_WORD)
             & self.REGS.EFUSE_CODING_SCHEME_MASK
@@ -80,7 +86,7 @@ class EmulateEfuseController(EmulateEfuseControllerBase):
         else:
             return coding_scheme
 
-    def write_raw_coding_scheme(self, value):
+    def write_raw_coding_scheme(self, value: int) -> None:
         self.write_efuse(
             self.REGS.EFUSE_CODING_SCHEME_WORD,
             value & self.REGS.EFUSE_CODING_SCHEME_MASK,
@@ -92,7 +98,7 @@ class EmulateEfuseController(EmulateEfuseControllerBase):
             )
         log.print(f"Set coding scheme = {self.read_raw_coding_scheme()}")
 
-    def get_bitlen_of_block(self, blk, wr=False):
+    def get_bitlen_of_block(self, blk: BlockDefinition, wr: bool = False) -> int:
         if blk.id == 0:
             return 32 * blk.len
         else:
@@ -107,7 +113,7 @@ class EmulateEfuseController(EmulateEfuseControllerBase):
             else:
                 raise FatalError(f"The {coding_scheme} coding scheme is not supported")
 
-    def handle_coding_scheme(self, blk, data):
+    def handle_coding_scheme(self, blk: BlockDefinition, data: BitStream) -> BitStream:
         # it verifies the coding scheme part of data and returns just data
         if blk.id != 0 and self.read_raw_coding_scheme() == self.REGS.CODING_SCHEME_34:
             # CODING_SCHEME 3/4 applied only for BLK1..3

{esptool-5.2.dev1 → esptool-5.2.dev3}/espefuse/efuse/esp32/mem_definition.py

@@ -5,6 +5,7 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
 
 import copy
+from dataclasses import dataclass
 import os
 
 import yaml
@@ -17,6 +18,7 @@ from ..mem_definition_base import (
 )
 
 
+@dataclass(frozen=True)
 class EfuseDefineRegisters(EfuseRegistersBase):
     EFUSE_MEM_SIZE = 0x011C + 4
 
@@ -150,27 +152,29 @@ class EfuseDefineFields(EfuseFieldsBase):
             elif efuse.category == "spi pad":
                 efuse.class_type = "spipin"
 
-        f = Field()
-        f.name = "WAFER_VERSION_MAJOR"
-        f.block = 0
-        f.bit_len = 3
-        f.type = f"uint:{f.bit_len}"
-        f.category = "identity"
-        f.class_type = "wafer"
-        f.description = "calc WAFER VERSION MAJOR from CHIP_VER_REV1 and CHIP_VER_REV2 and apb_ctl_date (read only)"
-        self.CALC.append(f)
-
-        f = Field()
-        f.name = "PKG_VERSION"
-        f.block = 0
-        f.bit_len = 4
-        f.type = f"uint:{f.bit_len}"
-        f.category = "identity"
-        f.class_type = "pkg"
-        f.description = (
-            "calc Chip package = CHIP_PACKAGE_4BIT << 3 + CHIP_PACKAGE (read only)"
+        self.CALC.append(
+            Field(
+                name="WAFER_VERSION_MAJOR",
+                block=0,
+                bit_len=3,
+                type="uint",
+                category="identity",
+                class_type="wafer",
+                description="calc WAFER VERSION MAJOR from CHIP_VER_REV1 and CHIP_VER_REV2 and apb_ctl_date (read only)",
+            )
+        )
+
+        self.CALC.append(
+            Field(
+                name="PKG_VERSION",
+                block=0,
+                bit_len=4,
+                type="uint",
+                category="identity",
+                class_type="pkg",
+                description="calc Chip package = CHIP_PACKAGE_4BIT << 3 + CHIP_PACKAGE (read only)",
+            )
         )
-        self.CALC.append(f)
 
         for efuse in self.ALL_EFUSES:
             if efuse is not None:

esptool-5.2.dev3/espefuse/efuse/esp32c2/emulate_efuse_controller.py

@@ -0,0 +1,113 @@
+# This file describes eFuses controller for ESP32-C2 chip
+#
+# SPDX-FileCopyrightText: 2021-2026 Espressif Systems (Shanghai) CO LTD
+#
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+from bitstring import BitStream
+
+import reedsolo
+
+from espefuse.efuse.mem_definition_base import BlockDefinition
+
+from .mem_definition import EfuseDefineBlocks, EfuseDefineFields, EfuseDefineRegisters
+from ..emulate_efuse_controller_base import EmulateEfuseControllerBase
+
+from esptool import FatalError
+
+
+class EmulateEfuseController(EmulateEfuseControllerBase):
+    """The class for virtual efuse operation. Using for HOST_TEST."""
+
+    CHIP_NAME = "ESP32-C2"
+    Blocks: type[EfuseDefineBlocks]
+    Fields: EfuseDefineFields
+    REGS: type[EfuseDefineRegisters]
+
+    def __init__(self, efuse_file: str | None = None, debug: bool = False):
+        self.Blocks = EfuseDefineBlocks
+        self.Fields = EfuseDefineFields(None)
+        self.REGS = EfuseDefineRegisters
+        super().__init__(efuse_file, debug)
+        self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
+
+    """ esptool method start >>"""
+
+    def get_major_chip_version(self) -> int:
+        return 1
+
+    def get_minor_chip_version(self) -> int:
+        return 0
+
+    def get_crystal_freq(self) -> int:
+        return 40  # MHz
+
+    def get_security_info(self) -> dict[str, int]:
+        return {
+            "flags": 0,
+            "flash_crypt_cnt": 0,
+            "key_purposes": 0,
+            "chip_id": 0,
+            "api_version": 0,
+        }
+
+    """ << esptool method end """
+
+    def handle_writing_event(self, addr: int, value: int) -> None:
+        if addr == self.REGS.EFUSE_CMD_REG:
+            if value & self.REGS.EFUSE_PGM_CMD:
+                self.copy_blocks_wr_regs_to_rd_regs(updated_block=(value >> 2) & 0xF)
+                self.clean_blocks_wr_regs()
+                self.check_rd_protection_area()
+                self.write_reg(addr, 0)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
+            elif value == self.REGS.EFUSE_READ_CMD:
+                self.write_reg(addr, 0)
+                self.write_reg(self.REGS.EFUSE_CMD_REG, 0)
+                self.save_to_file()
+
+    def get_bitlen_of_block(self, blk: BlockDefinition, wr: bool = False) -> int:
+        if blk.id == 0:
+            if wr:
+                return 32 * 8
+            else:
+                return 32 * blk.len
+        else:
+            if wr:
+                rs_coding = 32 * 3
+                return 32 * 8 + rs_coding
+            else:
+                return 32 * blk.len
+
+    def handle_coding_scheme(self, blk: BlockDefinition, data: BitStream) -> BitStream:
+        if blk.id != 0:
+            # CODING_SCHEME RS applied only for all blocks except BLK0.
+            coded_bytes = 12
+            data.pos = coded_bytes * 8
+            plain_data = data.readlist("32*uint:8")[::-1]
+            # takes 32 bytes
+            # apply RS encoding
+            rs = reedsolo.RSCodec(coded_bytes)
+            # 32 byte of data + 12 bytes RS
+            calc_encoded_data = list(rs.encode([x for x in plain_data]))
+            data.pos = 0
+            if calc_encoded_data != data.readlist("44*uint:8")[::-1]:
+                raise FatalError("Error in coding scheme data")
+            data = data[coded_bytes * 8 :]
+        if blk.len < 8:
+            data = data[(8 - blk.len) * 32 :]
+        return data
+
+    def set_read_disable_bits(
+        self,
+        block: BitStream,
+        read_disable_bit,
+        blk: BlockDefinition,
+    ) -> None:
+        if isinstance(blk.read_disable_bit, list):
+            if read_disable_bit & (1 << blk.read_disable_bit[0]):
+                block.set(0, [i for i in range(blk.len * 32 // 2, blk.len * 32)])
+            if read_disable_bit & (1 << blk.read_disable_bit[1]):
+                block.set(0, [i for i in range(0, blk.len * 32 // 2)])
+        else:
+            block.set(0)