esptool 5.0.dev0__tar.gz → 5.0.dev1__tar.gz

{esptool-5.0.dev0/esptool.egg-info → esptool-5.0.dev1}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: esptool
-Version: 5.0.dev0
+Version: 5.0.dev1
 Summary: A serial utility for flashing, provisioning, and interacting with Espressif SoCs.
 Author: Fredrik Ahlberg (themadinventor), Angus Gratton (projectgus), Espressif Systems
 License: GPLv2+
@@ -26,13 +26,13 @@ Requires-Python: >=3.10
 Description-Content-Type: text/markdown
 License-File: LICENSE
 Requires-Dist: bitstring!=4.2.0,>=3.1.6
-Requires-Dist: cryptography>=2.1.4
-Requires-Dist: ecdsa>=0.16.0
+Requires-Dist: cryptography>=43.0.0
 Requires-Dist: pyserial>=3.3
 Requires-Dist: reedsolo<1.8,>=1.5.3
 Requires-Dist: PyYAML>=5.1
 Requires-Dist: intelhex
 Requires-Dist: rich_click
+Requires-Dist: click<8.2.0
 Provides-Extra: dev
 Requires-Dist: pyelftools; extra == "dev"
 Requires-Dist: coverage~=6.0; extra == "dev"

{esptool-5.0.dev0 → esptool-5.0.dev1}/espefuse/efuse/esp32/operations.py

@@ -157,22 +157,27 @@ def set_flash_voltage(esp, efuses, args):
         )
 
     if args.voltage == "OFF":
-        msg = "Disable internal flash voltage regulator (VDD_SDIO). "
-        "SPI flash will need to be powered from an external source.\n"
-        "The following efuse is burned: XPD_SDIO_FORCE.\n"
-        "It is possible to later re-enable the internal regulator (%s) " % (
-            "to 3.3V" if sdio_tieh.get() != 0 else "to 1.8V or 3.3V"
+        print(
+            "Disable internal flash voltage regulator (VDD_SDIO). "
+            "SPI flash will need to be powered from an external source.\n"
+            "The following eFuse is burned: XPD_SDIO_FORCE.\n"
+            "It is possible to later re-enable the internal regulator"
+            f"{'to 3.3V' if sdio_tieh.get() != 0 else 'to 1.8V or 3.3V'}"
+            "by burning an additional eFuse"
         )
-        "by burning an additional efuse"
     elif args.voltage == "1.8V":
-        msg = "Set internal flash voltage regulator (VDD_SDIO) to 1.8V.\n"
-        "The following efuses are burned: XPD_SDIO_FORCE, XPD_SDIO_REG.\n"
-        "It is possible to later increase the voltage to 3.3V (permanently) "
-        "by burning additional efuse XPD_SDIO_TIEH"
+        print(
+            "Set internal flash voltage regulator (VDD_SDIO) to 1.8V.\n"
+            "The following eFuses are burned: XPD_SDIO_FORCE, XPD_SDIO_REG.\n"
+            "It is possible to later increase the voltage to 3.3V (permanently) "
+            "by burning additional eFuse XPD_SDIO_TIEH"
+        )
     elif args.voltage == "3.3V":
-        msg = "Enable internal flash voltage regulator (VDD_SDIO) to 3.3V.\n"
-        "The following efuses are burned: XPD_SDIO_FORCE, XPD_SDIO_REG, XPD_SDIO_TIEH."
-    print(msg)
+        print(
+            "Enable internal flash voltage regulator (VDD_SDIO) to 3.3V.\n"
+            "The following eFuses are burned: XPD_SDIO_FORCE, XPD_SDIO_REG, XPD_SDIO_TIEH."
+        )
+
     sdio_force.save(1)  # Disable GPIO12
     if args.voltage != "OFF":
         sdio_reg.save(1)  # Enable internal regulator
@@ -272,8 +277,10 @@ def burn_key(esp, efuses, args):
             "The key block will left readable and writeable (due to --no-protect-key)"
         )
     else:
-        msg += "The key block will be read and write protected "
-        "(no further changes or readback)"
+        msg += (
+            "The key block will be read and write protected "
+            "(no further changes or readback)"
+        )
     print(msg, "\n")
     if not efuses.burn_all(check_batch_mode=True):
         return

{esptool-5.0.dev0 → esptool-5.0.dev1}/espefuse/efuse/esp32c5/fields.py

@@ -405,8 +405,12 @@ class EfuseMacField(EfuseField):
 class EfuseKeyPurposeField(EfuseField):
     KEY_PURPOSES = [
         ("USER",                         0,  None,       None,      "no_need_rd_protect"),   # User purposes (software-only use)
-        ("ECDSA_KEY",                    1,  None,       "Reverse", "need_rd_protect"),      # ECDSA key
+        ("ECDSA_KEY",                    1,  None,       "Reverse", "need_rd_protect"),      # ECDSA key P256
+        ("ECDSA_KEY_P256",               1,  None,       "Reverse", "need_rd_protect"),      # ECDSA key P256
         ("RESERVED",                     1,  None,       None,      "no_need_rd_protect"),   # Reserved
+        ("XTS_AES_256_KEY_1",            2,  None,       "Reverse", "need_rd_protect"),      # XTS_AES_256_KEY_1 (flash/PSRAM encryption)
+        ("XTS_AES_256_KEY_2",            3,  None,       "Reverse", "need_rd_protect"),      # XTS_AES_256_KEY_2 (flash/PSRAM encryption)
+        ("XTS_AES_256_KEY",             -1, "VIRTUAL",   None,      "no_need_rd_protect"),   # Virtual purpose splits to XTS_AES_256_KEY_1 and XTS_AES_256_KEY_2
         ("XTS_AES_128_KEY",              4,  None,       "Reverse", "need_rd_protect"),      # XTS_AES_128_KEY (flash/PSRAM encryption)
         ("HMAC_DOWN_ALL",                5,  None,       None,      "need_rd_protect"),      # HMAC Downstream mode
         ("HMAC_DOWN_JTAG",               6,  None,       None,      "need_rd_protect"),      # JTAG soft enable key (uses HMAC Downstream mode)
@@ -415,6 +419,14 @@ class EfuseKeyPurposeField(EfuseField):
         ("SECURE_BOOT_DIGEST0",          9,  "DIGEST",   None,      "no_need_rd_protect"),   # SECURE_BOOT_DIGEST0 (Secure Boot key digest)
         ("SECURE_BOOT_DIGEST1",          10, "DIGEST",   None,      "no_need_rd_protect"),   # SECURE_BOOT_DIGEST1 (Secure Boot key digest)
         ("SECURE_BOOT_DIGEST2",          11, "DIGEST",   None,      "no_need_rd_protect"),   # SECURE_BOOT_DIGEST2 (Secure Boot key digest)
+        ("KM_INIT_KEY",                  12, None,       None,      "need_rd_protect"),      # init key that is used for the generation of AES/ECDSA key
+        ("XTS_AES_256_PSRAM_KEY_1",      13, None,       "Reverse", "need_rd_protect"),      # XTS_AES_256_PSRAM_KEY_1 (PSRAM encryption)
+        ("XTS_AES_256_PSRAM_KEY_2",      14, None,       "Reverse", "need_rd_protect"),      # XTS_AES_256_PSRAM_KEY_1 (PSRAM encryption)
+        # ("XTS_AES_256_PSRAM_KEY",        -2, "VIRTUAL",  None,      "no_need_rd_protect"),   # Virtual purpose splits to XTS_AES_256_PSRAM_KEY_1 and XTS_AES_256_PSRAM_KEY_1
+        ("XTS_AES_128_PSRAM_KEY",        15, None,       "Reverse", "need_rd_protect"),      # XTS_AES_128_PSRAM_KEY (PSRAM encryption)
+        ("ECDSA_KEY_P192",               16, None,       "Reverse", "need_rd_protect"),      # ECDSA key P192
+        ("ECDSA_KEY_P384_L",             17, None,       "Reverse", "need_rd_protect"),      # ECDSA key P384 low
+        ("ECDSA_KEY_P384_H",             18, None,       "Reverse", "need_rd_protect"),      # ECDSA key P384 high
     ]
 # fmt: on
     KEY_PURPOSES_NAME = [name[0] for name in KEY_PURPOSES]

{esptool-5.0.dev0 → esptool-5.0.dev1}/espefuse/efuse/esp32c5/mem_definition.py

@@ -25,20 +25,20 @@ class EfuseDefineRegisters(EfuseRegistersBase):
     EFUSE_CHECK_VALUE0_REG = DR_REG_EFUSE_BASE + 0x020
     EFUSE_CLK_REG = DR_REG_EFUSE_BASE + 0x1C8
     EFUSE_CONF_REG = DR_REG_EFUSE_BASE + 0x1CC
-    EFUSE_STATUS_REG = DR_REG_EFUSE_BASE + 0x1D0
-    EFUSE_CMD_REG = DR_REG_EFUSE_BASE + 0x1D4
-    EFUSE_RD_RS_ERR0_REG = DR_REG_EFUSE_BASE + 0x1C0
-    EFUSE_RD_RS_ERR1_REG = DR_REG_EFUSE_BASE + 0x1C4
+    EFUSE_STATUS_REG = DR_REG_EFUSE_BASE + 0x1D4
+    EFUSE_CMD_REG = DR_REG_EFUSE_BASE + 0x1D8
+    EFUSE_RD_RS_ERR0_REG = DR_REG_EFUSE_BASE + 0x190
+    EFUSE_RD_RS_ERR1_REG = DR_REG_EFUSE_BASE + 0x194
     EFUSE_RD_REPEAT_ERR0_REG = DR_REG_EFUSE_BASE + 0x17C
     EFUSE_RD_REPEAT_ERR1_REG = DR_REG_EFUSE_BASE + 0x180
     EFUSE_RD_REPEAT_ERR2_REG = DR_REG_EFUSE_BASE + 0x184
     EFUSE_RD_REPEAT_ERR3_REG = DR_REG_EFUSE_BASE + 0x188
     EFUSE_RD_REPEAT_ERR4_REG = DR_REG_EFUSE_BASE + 0x18C
-    EFUSE_DAC_CONF_REG = DR_REG_EFUSE_BASE + 0x1E8
-    EFUSE_RD_TIM_CONF_REG = DR_REG_EFUSE_BASE + 0x1EC
-    EFUSE_WR_TIM_CONF1_REG = DR_REG_EFUSE_BASE + 0x1F0
-    EFUSE_WR_TIM_CONF2_REG = DR_REG_EFUSE_BASE + 0x1F4
-    EFUSE_DATE_REG = DR_REG_EFUSE_BASE + 0x1FC
+    EFUSE_DAC_CONF_REG = DR_REG_EFUSE_BASE + 0x1EC
+    EFUSE_RD_TIM_CONF_REG = DR_REG_EFUSE_BASE + 0x1F0
+    EFUSE_WR_TIM_CONF1_REG = DR_REG_EFUSE_BASE + 0x1F4
+    EFUSE_WR_TIM_CONF2_REG = DR_REG_EFUSE_BASE + 0x1F8
+    EFUSE_DATE_REG = DR_REG_EFUSE_BASE + 0x198
     EFUSE_WRITE_OP_CODE = 0x5A5A
     EFUSE_READ_OP_CODE = 0x5AA5
     EFUSE_PGM_CMD_MASK = 0x3

{esptool-5.0.dev0 → esptool-5.0.dev1}/espefuse/efuse/esp32c5/operations.py

@@ -5,6 +5,7 @@
 # SPDX-License-Identifier: GPL-2.0-or-later
 
 import argparse
+import io
 import os  # noqa: F401. It is used in IDF scripts
 import traceback
 
@@ -199,6 +200,67 @@ def adc_info(esp, efuses, args):
                 print(f"{efuse.name:<30} = ", efuses[efuse.name].get())
 
 
+def key_block_is_unused(block, key_purpose_block):
+    if not block.is_readable() or not block.is_writeable():
+        return False
+
+    if key_purpose_block.get() != "USER" or not key_purpose_block.is_writeable():
+        return False
+
+    if not block.get_bitstring().all(False):
+        return False
+
+    return True
+
+
+def get_next_key_block(efuses, current_key_block, block_name_list):
+    key_blocks = [b for b in efuses.blocks if b.key_purpose_name]
+    start = key_blocks.index(current_key_block)
+
+    # Sort key blocks so that we pick the next free block (and loop around if necessary)
+    key_blocks = key_blocks[start:] + key_blocks[0:start]
+
+    # Exclude any other blocks that will be be burned
+    key_blocks = [b for b in key_blocks if b.name not in block_name_list]
+
+    for block in key_blocks:
+        key_purpose_block = efuses[block.key_purpose_name]
+        if key_block_is_unused(block, key_purpose_block):
+            return block
+
+    return None
+
+
+def split_512_bit_key(efuses, block_name_list, datafile_list, keypurpose_list):
+    i = keypurpose_list.index("XTS_AES_256_KEY")
+    block_name = block_name_list[i]
+
+    block_num = efuses.get_index_block_by_name(block_name)
+    block = efuses.blocks[block_num]
+
+    data = datafile_list[i].read()
+    if len(data) != 64:
+        raise esptool.FatalError(
+            "Incorrect key file size %d, XTS_AES_256_KEY should be 64 bytes" % len(data)
+        )
+
+    key_block_2 = get_next_key_block(efuses, block, block_name_list)
+    if not key_block_2:
+        raise esptool.FatalError("XTS_AES_256_KEY requires two free keyblocks")
+
+    keypurpose_list.append("XTS_AES_256_KEY_1")
+    datafile_list.append(io.BytesIO(data[:32]))
+    block_name_list.append(block_name)
+
+    keypurpose_list.append("XTS_AES_256_KEY_2")
+    datafile_list.append(io.BytesIO(data[32:]))
+    block_name_list.append(key_block_2.name)
+
+    keypurpose_list.pop(i)
+    datafile_list.pop(i)
+    block_name_list.pop(i)
+
+
 def burn_key(esp, efuses, args, digest=None):
     if digest is None:
         datafile_list = args.keyfile[
@@ -214,6 +276,11 @@ def burn_key(esp, efuses, args, digest=None):
         0 : len([name for name in args.keypurpose if name is not None]) :
     ]
 
+    if "XTS_AES_256_KEY" in keypurpose_list:
+        # XTS_AES_256_KEY is not an actual HW key purpose, needs to be split into
+        # XTS_AES_256_KEY_1 and XTS_AES_256_KEY_2
+        split_512_bit_key(efuses, block_name_list, datafile_list, keypurpose_list)
+
     util.check_duplicate_name_in_list(block_name_list)
     if len(block_name_list) != len(datafile_list) or len(block_name_list) != len(
         keypurpose_list
@@ -240,9 +307,9 @@ def burn_key(esp, efuses, args, digest=None):
         block = efuses.blocks[block_num]
 
         if digest is None:
-            if keypurpose == "ECDSA_KEY":
+            if keypurpose.startswith("ECDSA_KEY"):
                 sk = espsecure.load_ecdsa_signing_key(datafile)
-                data = sk.to_string()
+                data = espsecure.get_ecdsa_signing_key_raw_bytes(sk)
                 if len(data) == 24:
                     # the private key is 24 bytes long for NIST192p, and 8 bytes of padding
                     data = b"\x00" * 8 + data

{esptool-5.0.dev0 → esptool-5.0.dev1}/espefuse/efuse/esp32c61/operations.py

@@ -309,7 +309,7 @@ def burn_key(esp, efuses, args, digest=None):
         if digest is None:
             if keypurpose == "ECDSA_KEY":
                 sk = espsecure.load_ecdsa_signing_key(datafile)
-                data = sk.to_string()
+                data = espsecure.get_ecdsa_signing_key_raw_bytes(sk)
                 if len(data) == 24:
                     # the private key is 24 bytes long for NIST192p, and 8 bytes of padding
                     data = b"\x00" * 8 + data

{esptool-5.0.dev0 → esptool-5.0.dev1}/espefuse/efuse/esp32h2/operations.py

@@ -256,7 +256,7 @@ def burn_key(esp, efuses, args, digest=None):
         if digest is None:
             if keypurpose == "ECDSA_KEY":
                 sk = espsecure.load_ecdsa_signing_key(datafile)
-                data = sk.to_string()
+                data = espsecure.get_ecdsa_signing_key_raw_bytes(sk)
                 if len(data) == 24:
                     # the private key is 24 bytes long for NIST192p, add 8 bytes of padding
                     data = b"\x00" * 8 + data

{esptool-5.0.dev0 → esptool-5.0.dev1}/espefuse/efuse/esp32h21/operations.py

@@ -240,7 +240,7 @@ def burn_key(esp, efuses, args, digest=None):
         if digest is None:
             if keypurpose == "ECDSA_KEY":
                 sk = espsecure.load_ecdsa_signing_key(datafile)
-                data = sk.to_string()
+                data = espsecure.get_ecdsa_signing_key_raw_bytes(sk)
                 if len(data) == 24:
                     # the private key is 24 bytes long for NIST192p, add 8 bytes of padding
                     data = b"\x00" * 8 + data

{esptool-5.0.dev0 → esptool-5.0.dev1}/espefuse/efuse/esp32h4/operations.py

@@ -238,7 +238,7 @@ def burn_key(esp, efuses, args, digest=None):
         if digest is None:
             if keypurpose == "ECDSA_KEY":
                 sk = espsecure._load_ecdsa_signing_key(datafile)
-                data = sk.to_string()
+                data = espsecure.get_ecdsa_signing_key_raw_bytes(sk)
                 if len(data) == 24:
                     # the private key is 24 bytes long for NIST192p, and 8 bytes of padding
                     data = b"\x00" * 8 + data

{esptool-5.0.dev0 → esptool-5.0.dev1}/espefuse/efuse/esp32p4/operations.py

@@ -309,7 +309,7 @@ def burn_key(esp, efuses, args, digest=None):
         if digest is None:
             if keypurpose == "ECDSA_KEY":
                 sk = espsecure.load_ecdsa_signing_key(datafile)
-                data = sk.to_string()
+                data = espsecure.get_ecdsa_signing_key_raw_bytes(sk)
                 if len(data) == 24:
                     # the private key is 24 bytes long for NIST192p, add 8 bytes of padding
                     data = b"\x00" * 8 + data

{esptool-5.0.dev0 → esptool-5.0.dev1}/espefuse/efuse/esp32s2/operations.py

@@ -205,22 +205,26 @@ def set_flash_voltage(esp, efuses, args):
         )
 
     if args.voltage == "OFF":
-        msg = "Disable internal flash voltage regulator (VDD_SPI). SPI flash will "
-        "need to be powered from an external source.\n"
-        "The following efuse is burned: VDD_SPI_FORCE.\n"
-        "It is possible to later re-enable the internal regulator (%s) " % (
-            "to 3.3V" if sdio_tieh.get() != 0 else "to 1.8V or 3.3V"
+        print(
+            "Disable internal flash voltage regulator (VDD_SPI). "
+            "SPI flash will need to be powered from an external source.\n"
+            "The following eFuse is burned: VDD_SPI_FORCE.\n"
+            "It is possible to later re-enable the internal regulator"
+            f"{'to 3.3V' if sdio_tieh.get() != 0 else 'to 1.8V or 3.3V'}"
+            "by burning an additional eFuse"
         )
-        "by burning an additional efuse"
     elif args.voltage == "1.8V":
-        msg = "Set internal flash voltage regulator (VDD_SPI) to 1.8V.\n"
-        "The following efuses are burned: VDD_SPI_FORCE, VDD_SPI_XPD.\n"
-        "It is possible to later increase the voltage to 3.3V (permanently) "
-        "by burning additional efuse VDD_SPI_TIEH"
+        print(
+            "Set internal flash voltage regulator (VDD_SPI) to 1.8V.\n"
+            "The following eFuses are burned: VDD_SPI_FORCE, VDD_SPI_XPD.\n"
+            "It is possible to later increase the voltage to 3.3V (permanently) "
+            "by burning additional eFuse VDD_SPI_TIEH"
+        )
     elif args.voltage == "3.3V":
-        msg = "Enable internal flash voltage regulator (VDD_SPI) to 3.3V.\n"
-        "The following efuses are burned: VDD_SPI_FORCE, VDD_SPI_XPD, VDD_SPI_TIEH."
-    print(msg)
+        print(
+            "Enable internal flash voltage regulator (VDD_SPI) to 3.3V.\n"
+            "The following eFuses are burned: VDD_SPI_FORCE, VDD_SPI_XPD, VDD_SPI_TIEH."
+        )
 
     sdio_force.save(1)  # Disable GPIO45
     if args.voltage != "OFF":

{esptool-5.0.dev0 → esptool-5.0.dev1}/espefuse/efuse/esp32s3/operations.py

@@ -205,22 +205,26 @@ def set_flash_voltage(esp, efuses, args):
         )
 
     if args.voltage == "OFF":
-        msg = "Disable internal flash voltage regulator (VDD_SPI). "
-        "SPI flash will need to be powered from an external source.\n"
-        "The following efuse is burned: VDD_SPI_FORCE.\n"
-        "It is possible to later re-enable the internal regulator (%s) " % (
-            "to 3.3V" if sdio_tieh.get() != 0 else "to 1.8V or 3.3V"
+        print(
+            "Disable internal flash voltage regulator (VDD_SPI). "
+            "SPI flash will need to be powered from an external source.\n"
+            "The following eFuse is burned: VDD_SPI_FORCE.\n"
+            "It is possible to later re-enable the internal regulator"
+            f"{'to 3.3V' if sdio_tieh.get() != 0 else 'to 1.8V or 3.3V'}"
+            "by burning an additional eFuse"
         )
-        "by burning an additional efuse"
     elif args.voltage == "1.8V":
-        msg = "Set internal flash voltage regulator (VDD_SPI) to 1.8V.\n"
-        "The following efuses are burned: VDD_SPI_FORCE, VDD_SPI_XPD.\n"
-        "It is possible to later increase the voltage to 3.3V (permanently) "
-        "by burning additional efuse VDD_SPI_TIEH"
+        print(
+            "Set internal flash voltage regulator (VDD_SPI) to 1.8V.\n"
+            "The following eFuses are burned: VDD_SPI_FORCE, VDD_SPI_XPD.\n"
+            "It is possible to later increase the voltage to 3.3V (permanently) "
+            "by burning additional eFuse VDD_SPI_TIEH"
+        )
     elif args.voltage == "3.3V":
-        msg = "Enable internal flash voltage regulator (VDD_SPI) to 3.3V.\n"
-        "The following efuses are burned: VDD_SPI_FORCE, VDD_SPI_XPD, VDD_SPI_TIEH."
-    print(msg)
+        print(
+            "Enable internal flash voltage regulator (VDD_SPI) to 3.3V.\n"
+            "The following eFuses are burned: VDD_SPI_FORCE, VDD_SPI_XPD, VDD_SPI_TIEH."
+        )
 
     sdio_force.save(1)  # Disable GPIO45
     if args.voltage != "OFF":

esptool-5.0.dev1/espefuse/efuse_defs/esp32c5.yaml

@@ -0,0 +1,123 @@
+VER_NO: 31c7fe3f5f4e0a55b178a57126c0aca7
+EFUSES:
+  WR_DIS                                    : {show: y, blk : 0, word: 0, pos : 0, len : 32, start  : 0, type : 'uint:32', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Disable programming of individual eFuses, rloc: EFUSE_RD_WR_DIS_REG, bloc: 'B0,B1,B2,B3'}
+  RD_DIS                                    : {show: y, blk : 0, word: 1, pos : 0, len  : 7, start : 32, type  : 'uint:7', wr_dis   : 0, rd_dis: null, alt                            : '', dict             : '', desc: Disable reading from BlOCK4-10, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[6:0]', bloc: 'B4[6:0]'}
+  BOOTLOADER_ANTI_ROLLBACK_SECURE_VERSION_HI: {show: y, blk : 0, word: 1, pos : 7, len  : 1, start : 39, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Represents the anti-rollback secure version of the 2nd stage bootloader used by the ROM bootloader (the high part of the field), rloc: 'EFUSE_RD_REPEAT_DATA0_REG[7]', bloc: 'B4[7]'}
+  DIS_ICACHE                                : {show: y, blk : 0, word: 1, pos : 8, len  : 1, start : 40, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether cache is disabled. 1: Disabled 0: Enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[8]', bloc: 'B5[0]'}
+  DIS_USB_JTAG                              : {show: y, blk : 0, word: 1, pos : 9, len  : 1, start : 41, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the USB-to-JTAG function in USB Serial/JTAG is disabled. Note that \hyperref[fielddesc:EFUSEDISUSBJTAG]{EFUSE\_DIS\_USB\_JTAG} is available only when \hyperref[fielddesc:EFUSEDISUSBSERIALJTAG]{EFUSE\_DIS\_USB\_SERIAL\_JTAG} is configured to 0. For more information; please refer to Chapter \ref{mod:bootctrl} \textit{\nameref{mod:bootctrl}}.1: Disabled0: Enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[9]', bloc: 'B5[1]'}
+  BOOTLOADER_ANTI_ROLLBACK_EN               : {show: y, blk : 0, word: 1, pos: 10, len  : 1, start : 42, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the ani-rollback check for the 2nd stage bootloader is enabled.1: Enabled0: Disabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[10]', bloc: 'B5[2]'}
+  DIS_USB_SERIAL_JTAG                       : {show: n, blk : 0, word: 1, pos: 11, len  : 1, start : 43, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether USB Serial/JTAG is disabled.1: Disabled0: Enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[11]', bloc: 'B5[3]'}
+  DIS_FORCE_DOWNLOAD                        : {show: y, blk : 0, word: 1, pos: 12, len  : 1, start : 44, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the function that forces chip into Download mode is disabled. 1: Disabled0: Enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[12]', bloc: 'B5[4]'}
+  SPI_DOWNLOAD_MSPI_DIS                     : {show: y, blk : 0, word: 1, pos: 13, len  : 1, start : 45, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether SPI0 controller during boot\_mode\_download is disabled.0: Enabled1: Disabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[13]', bloc: 'B5[5]'}
+  DIS_TWAI                                  : {show: y, blk : 0, word: 1, pos: 14, len  : 1, start : 46, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: "Represents whether TWAI$^\xAE$ function is disabled.1: Disabled0: Enabled", rloc: 'EFUSE_RD_REPEAT_DATA0_REG[14]', bloc: 'B5[6]'}
+  JTAG_SEL_ENABLE                           : {show: y, blk : 0, word: 1, pos: 15, len  : 1, start : 47, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the selection of a JTAG signal source through the strapping pin value is enabled when all of \hyperref[fielddesc:EFUSEDISPADJTAG]{EFUSE\_DIS\_PAD\_JTAG}; \hyperref[fielddesc:EFUSEDISUSBJTAG]{EFUSE\_DIS\_USB\_JTAG} and \hyperref[fielddesc:EFUSEDISUSBSERIALJTAG]{EFUSE\_DIS\_USB\_SERIAL\_JTAG} are configured to 0. For more information; please refer to Chapter \ref{mod:bootctrl} \textit{\nameref{mod:bootctrl}}.1: Enabled0: Disabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[15]', bloc: 'B5[7]'}
+  SOFT_DIS_JTAG                             : {show: y, blk : 0, word: 1, pos: 16, len  : 3, start : 48, type  : 'uint:3', wr_dis  : 31, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether PAD JTAG is disabled in the soft way. It can be restarted via HMAC. Odd count of bits with a value of 1: DisabledEven count of bits with a value of 1: Enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[18:16]', bloc: 'B6[2:0]'}
+  DIS_PAD_JTAG                              : {show: y, blk : 0, word: 1, pos: 19, len  : 1, start : 51, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether PAD JTAG is disabled in the hard way (permanently).1: Disabled0: Enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[19]', bloc: 'B6[3]'}
+  DIS_DOWNLOAD_MANUAL_ENCRYPT               : {show: y, blk : 0, word: 1, pos: 20, len  : 1, start : 52, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether flash encryption is disabled (except in SPI boot mode).1: Disabled0: Enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[20]', bloc: 'B6[4]'}
+  USB_DREFH                                 : {show: n, blk : 0, word: 1, pos: 21, len  : 2, start : 53, type  : 'uint:2', wr_dis  : 30, rd_dis: null, alt                            : '', dict             : '', desc: Represents the single-end input threshold vrefh; 1.76 V to 2 V with step of 80 mV, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[22:21]', bloc: 'B6[6:5]'}
+  USB_DREFL                                 : {show: n, blk : 0, word: 1, pos: 23, len  : 2, start : 55, type  : 'uint:2', wr_dis  : 30, rd_dis: null, alt                            : '', dict             : '', desc: Represents the single-end input threshold vrefl; 1.76 V to 2 V with step of 80 mV, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[24:23]', bloc: 'B6[7],B7[0]'}
+  USB_EXCHG_PINS                            : {show: y, blk : 0, word: 1, pos: 25, len  : 1, start : 57, type      : bool, wr_dis  : 30, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the D+ and D- pins is exchanged.1: Exchanged0: Not exchanged', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[25]', bloc: 'B7[1]'}
+  VDD_SPI_AS_GPIO                           : {show: y, blk : 0, word: 1, pos: 26, len  : 1, start : 58, type      : bool, wr_dis  : 30, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether VDD SPI pin is functioned as GPIO.1: Functioned0: Not functioned', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[26]', bloc: 'B7[2]'}
+  WDT_DELAY_SEL                             : {show: y, blk : 0, word: 1, pos: 27, len  : 2, start : 59, type  : 'uint:2', wr_dis   : 3, rd_dis: null, alt                            : '', dict             : '', desc: "Represents RTC watchdog timeout threshold.0: The originally configured STG0 threshold \xD7 21: The originally configured STG0 threshold \xD7 42: The originally configured STG0 threshold \xD7 83: The originally configured STG0 threshold \xD7 16", rloc: 'EFUSE_RD_REPEAT_DATA0_REG[28:27]', bloc: 'B7[4:3]'}
+  BOOTLOADER_ANTI_ROLLBACK_SECURE_VERSION_LO: {show: y, blk : 0, word: 1, pos: 29, len  : 3, start : 61, type  : 'uint:3', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Represents the anti-rollback secure version of the 2nd stage bootloader used by the ROM bootloader (the low part of the field), rloc: 'EFUSE_RD_REPEAT_DATA0_REG[31:29]', bloc: 'B7[7:5]'}
+  KM_DISABLE_DEPLOY_MODE                    : {show: y, blk : 0, word: 2, pos : 0, len  : 4, start : 64, type  : 'uint:4', wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the new key deployment of key manager is disabled. Bit0: Represents whether the new ECDSA key deployment is disabled0: Enabled1: DisabledBit1: Represents whether the new XTS-AES (flash and PSRAM) key deployment is disabled0: Enabled1: DisabledBit2: Represents whether the new HMAC key deployment is disabled0: Enabled1: DisabledBit3: Represents whether the new DS key deployment is disabled0: Enabled1: Disabled', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[3:0]', bloc: 'B8[3:0]'}
+  KM_RND_SWITCH_CYCLE                       : {show: y, blk : 0, word: 2, pos : 4, len  : 2, start : 68, type  : 'uint:2', wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents the cycle at which the Key Manager switches random numbers.0: Controlled by the \hyperref[fielddesc:KEYMNGRNDSWITCHCYCLE]{KEYMNG\_RND\_SWITCH\_CYCLE} register. For more information; please refer to Chapter \ref{mod:keymng} \textit{\nameref{mod:keymng}}1: 8 Key Manager clock cycles2: 16 Key Manager clock cycles3: 32 Key Manager clock cycles', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[5:4]', bloc: 'B8[5:4]'}
+  KM_DEPLOY_ONLY_ONCE                       : {show: y, blk : 0, word: 2, pos : 6, len  : 4, start : 70, type  : 'uint:4', wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the corresponding key can be deployed only once.Bit0: Represents whether the ECDSA key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit1: Represents whether the XTS-AES (flash and PSRAM) key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit2: Represents whether the HMAC key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit3: Represents whether the DS key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only once', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[9:6]', bloc: 'B8[7:6],B9[1:0]'}
+  FORCE_USE_KEY_MANAGER_KEY                 : {show: y, blk : 0, word: 2, pos: 10, len  : 4, start : 74, type  : 'uint:4', wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the corresponding key must come from Key Manager. Bit0: Represents whether the ECDSA key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit1: Represents whether the XTS-AES (flash and PSRAM) key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit2: Represents whether the HMAC key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit3: Represents whether the DS key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key Manager', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[13:10]', bloc: 'B9[5:2]'}
+  FORCE_DISABLE_SW_INIT_KEY                 : {show: y, blk : 0, word: 2, pos: 14, len  : 1, start : 78, type      : bool, wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether to disable the use of the initialization key written by software and instead force use efuse\_init\_key.0: Enable1: Disable', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[14]', bloc: 'B9[6]'}
+  BOOTLOADER_ANTI_ROLLBACK_UPDATE_IN_ROM    : {show: y, blk : 0, word: 2, pos: 15, len  : 1, start : 79, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the ani-rollback SECURE_VERSION will be updated from the ROM bootloader.1: Enable0: Disable', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[15]', bloc: 'B9[7]'}
+  SPI_BOOT_CRYPT_CNT                        : {show: y, blk : 0, word: 2, pos: 16, len  : 3, start : 80, type  : 'uint:3', wr_dis   : 4, rd_dis: null, alt                            : '', dict: '{0: "Disable", 1: "Enable", 3: "Disable", 7: "Enable"}', desc: Enables flash encryption when 1 or 3 bits are set and disables otherwise, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[18:16]', bloc: 'B10[2:0]'}
+  SECURE_BOOT_KEY_REVOKE0                   : {show: y, blk : 0, word: 2, pos: 19, len  : 1, start : 83, type      : bool, wr_dis   : 5, rd_dis: null, alt                            : '', dict             : '', desc: Revoke 1st secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[19]', bloc: 'B10[3]'}
+  SECURE_BOOT_KEY_REVOKE1                   : {show: y, blk : 0, word: 2, pos: 20, len  : 1, start : 84, type      : bool, wr_dis   : 6, rd_dis: null, alt                            : '', dict             : '', desc: Revoke 2nd secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[20]', bloc: 'B10[4]'}
+  SECURE_BOOT_KEY_REVOKE2                   : {show: y, blk : 0, word: 2, pos: 21, len  : 1, start : 85, type      : bool, wr_dis   : 7, rd_dis: null, alt                            : '', dict             : '', desc: Revoke 3rd secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[21]', bloc: 'B10[5]'}
+  KEY_PURPOSE_0                             : {show: y, blk : 0, word: 2, pos: 22, len  : 5, start : 86, type  : 'uint:5', wr_dis   : 8, rd_dis: null, alt                  : KEY0_PURPOSE, dict             : '', desc: 'Represents the purpose of Key0. See Table \ref{tab:efuse-key-purpose}', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[26:22]', bloc: 'B10[7:6],B11[2:0]'}
+  KEY_PURPOSE_1                             : {show: y, blk : 0, word: 2, pos: 27, len  : 5, start : 91, type  : 'uint:5', wr_dis   : 9, rd_dis: null, alt                  : KEY1_PURPOSE, dict             : '', desc: 'Represents the purpose of Key1. See Table \ref{tab:efuse-key-purpose}', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[31:27]', bloc: 'B11[7:3]'}
+  KEY_PURPOSE_2                             : {show: y, blk : 0, word: 3, pos : 0, len  : 5, start : 96, type  : 'uint:5', wr_dis  : 10, rd_dis: null, alt                  : KEY2_PURPOSE, dict             : '', desc: 'Represents the purpose of Key2. See Table \ref{tab:efuse-key-purpose}', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[4:0]', bloc: 'B12[4:0]'}
+  KEY_PURPOSE_3                             : {show: y, blk : 0, word: 3, pos : 5, len  : 5, start: 101, type  : 'uint:5', wr_dis  : 11, rd_dis: null, alt                  : KEY3_PURPOSE, dict             : '', desc: 'Represents the purpose of Key3. See Table \ref{tab:efuse-key-purpose}', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[9:5]', bloc: 'B12[7:5],B13[1:0]'}
+  KEY_PURPOSE_4                             : {show: y, blk : 0, word: 3, pos: 10, len  : 5, start: 106, type  : 'uint:5', wr_dis  : 12, rd_dis: null, alt                  : KEY4_PURPOSE, dict             : '', desc: 'Represents the purpose of Key4. See Table \ref{tab:efuse-key-purpose}', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[14:10]', bloc: 'B13[6:2]'}
+  KEY_PURPOSE_5                             : {show: y, blk : 0, word: 3, pos: 15, len  : 5, start: 111, type  : 'uint:5', wr_dis  : 13, rd_dis: null, alt                  : KEY5_PURPOSE, dict             : '', desc: 'Represents the purpose of Key5. See Table \ref{tab:efuse-key-purpose}', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[19:15]', bloc: 'B13[7],B14[3:0]'}
+  SEC_DPA_LEVEL                             : {show: y, blk : 0, word: 3, pos: 20, len  : 2, start: 116, type  : 'uint:2', wr_dis  : 14, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents the security level of anti-DPA attack. The level is adjusted by configuring the clock random frequency division mode.0: Security level is SEC\_DPA\_OFF1: Security level is SEC\_DPA\_LOW2: Security level is SEC\_DPA\_MIDDLE3: Security level is SEC\_DPA\_HIGHFor more information; please refer to Chapter \ref{mod:sysreg} \textit{\nameref{mod:sysreg}} > Section \ref{sec:sysreg-anti-dpa-attack-security-control} \textit{\nameref{sec:sysreg-anti-dpa-attack-security-control}}.', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[21:20]', bloc: 'B14[5:4]'}
+  RECOVERY_BOOTLOADER_FLASH_SECTOR_HI       : {show: y, blk : 0, word: 3, pos: 22, len  : 3, start: 118, type  : 'uint:3', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled. (The high part of the field), rloc: 'EFUSE_RD_REPEAT_DATA2_REG[24:22]', bloc: 'B14[7:6],B15[0]'}
+  SECURE_BOOT_EN                            : {show: y, blk : 0, word: 3, pos: 25, len  : 1, start: 121, type      : bool, wr_dis  : 15, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether Secure Boot is enabled.1: Enabled0: Disabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[25]', bloc: 'B15[1]'}
+  SECURE_BOOT_AGGRESSIVE_REVOKE             : {show: y, blk : 0, word: 3, pos: 26, len  : 1, start: 122, type      : bool, wr_dis  : 16, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether aggressive revocation of Secure Boot is enabled.1: Enabled0: Disabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[26]', bloc: 'B15[2]'}
+  KM_XTS_KEY_LENGTH_256                     : {show: y, blk : 0, word: 3, pos: 27, len  : 1, start: 123, type      : bool, wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents which key flash encryption uses.0: XTS-AES-256 key1: XTS-AES-128 key', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[27]', bloc: 'B15[3]'}
+  FLASH_TPUW                                : {show: y, blk : 0, word: 3, pos: 28, len  : 4, start: 124, type  : 'uint:4', wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents the flash waiting time after power-up. Measurement unit: ms. When the value is less than 15; the waiting time is the programmed value. Otherwise; the waiting time is a fixed value; i.e. 30 ms', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[31:28]', bloc: 'B15[7:4]'}
+  DIS_DOWNLOAD_MODE                         : {show: y, blk : 0, word: 4, pos : 0, len  : 1, start: 128, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether Download mode is disable or enable. 1. Disable 0: Enable', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[0]', bloc: 'B16[0]'}
+  DIS_DIRECT_BOOT                           : {show: y, blk : 0, word: 4, pos : 1, len  : 1, start: 129, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether direct boot mode is disabled or enabled. 1. Disable 0: Enable', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[1]', bloc: 'B16[1]'}
+  DIS_USB_SERIAL_JTAG_ROM_PRINT             : {show: y, blk : 0, word: 4, pos : 2, len  : 1, start: 130, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether print from USB-Serial-JTAG is disabled or enabled. 1. Disable 0: Enable', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[2]', bloc: 'B16[2]'}
+  LOCK_KM_KEY                               : {show: y, blk : 0, word: 4, pos : 3, len  : 1, start: 131, type      : bool, wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the keys in the Key Manager are locked after deployment.0: Not locked1: Locked', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[3]', bloc: 'B16[3]'}
+  DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE         : {show: y, blk : 0, word: 4, pos : 4, len  : 1, start: 132, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: Disable 0: Enable', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[4]', bloc: 'B16[4]'}
+  ENABLE_SECURITY_DOWNLOAD                  : {show: y, blk : 0, word: 4, pos : 5, len  : 1, start: 133, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether security download is enabled. Only downloading into flash is supported. Reading/writing RAM or registers is not supported (i.e. stub download is not supported).1: Enabled0: Disabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[5]', bloc: 'B16[5]'}
+  UART_PRINT_CONTROL                        : {show: y, blk : 0, word: 4, pos : 6, len  : 2, start: 134, type  : 'uint:2', wr_dis  : 18, rd_dis: null, alt                            : '', dict: '{0: "Enable", 1: "Enable when GPIO8 is low at reset", 2: "Enable when GPIO8 is high at reset", 3: "Disable"}', desc: Set the default UARTboot message output mode, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[7:6]', bloc: 'B16[7:6]'}
+  FORCE_SEND_RESUME                         : {show: y, blk : 0, word: 4, pos : 8, len  : 1, start: 136, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether ROM code is forced to send a resume command during SPI boot.1: Forced. 0: Not forced.', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[8]', bloc: 'B17[0]'}
+  SECURE_VERSION                            : {show: y, blk : 0, word: 4, pos : 9, len  : 9, start: 137, type  : 'uint:9', wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: Represents the app secure version used by ESP-IDF anti-rollback feature, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[17:9]', bloc: 'B17[7:1],B18[1:0]'}
+  RESERVE_0_146                             : {show: n, blk : 0, word: 4, pos: 18, len  : 7, start: 146, type  : 'uint:7', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[24:18]', bloc: 'B18[7:2],B19[0]'}
+  SECURE_BOOT_DISABLE_FAST_WAKE             : {show: y, blk : 0, word: 4, pos: 25, len  : 1, start: 153, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether FAST VERIFY ON WAKE is disabled when Secure Boot is enabled.1: Disabled0: Enabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[25]', bloc: 'B19[1]'}
+  HYS_EN_PAD                                : {show: y, blk : 0, word: 4, pos: 26, len  : 1, start: 154, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: "Represents whether the hysteresis function of PAD0 \u2013 PAD27 is enabled.1: Enabled0: Disabled", rloc: 'EFUSE_RD_REPEAT_DATA3_REG[26]', bloc: 'B19[2]'}
+  XTS_DPA_PSEUDO_LEVEL                      : {show: y, blk : 0, word: 4, pos: 27, len  : 2, start: 155, type  : 'uint:2', wr_dis  : 14, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents the pseudo round level of XTS-AES anti-DPA attack.0: Disabled1: Low2: Moderate3: High', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[28:27]', bloc: 'B19[4:3]'}
+  XTS_DPA_CLK_ENABLE                        : {show: y, blk : 0, word: 4, pos: 29, len  : 1, start: 157, type      : bool, wr_dis  : 14, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether XTS-AES anti-DPA attack clock is enabled.0: Disable1: Enabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[29]', bloc: 'B19[5]'}
+  RESERVE_0_158                             : {show: n, blk : 0, word: 4, pos: 30, len  : 1, start: 158, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[30]', bloc: 'B19[6]'}
+  SECURE_BOOT_SHA384_EN                     : {show: y, blk : 0, word: 4, pos: 31, len  : 1, start: 159, type      : bool, wr_dis  : 14, rd_dis: null, alt                            : '', dict             : '', desc: Represents if the chip supports Secure Boot using SHA-384, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[31]', bloc: 'B19[7]'}
+  HUK_GEN_STATE                             : {show: y, blk : 0, word: 5, pos : 0, len  : 9, start: 160, type  : 'uint:9', wr_dis  : 19, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the HUK generate mode is valid.Odd count of bits with a value of 1: InvalidEven count of bits with a value of 1: Valid', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[8:0]', bloc: 'B20,B21[0]'}
+  XTAL_48M_SEL                              : {show: y, blk : 0, word: 5, pos : 9, len  : 3, start: 169, type  : 'uint:3', wr_dis  : 17, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether XTAL frequency is 48MHz or not. If not; 40MHz XTAL will be used. If this field contains Odd number bit 1: Enable 48MHz XTAL\ Even number bit 1: Enable 40MHz XTAL', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[11:9]', bloc: 'B21[3:1]'}
+  XTAL_48M_SEL_MODE                         : {show: y, blk : 0, word: 5, pos: 12, len  : 1, start: 172, type      : bool, wr_dis  : 17, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents what determines the XTAL frequency in \textbf{Joint Download Boot} mode.  For more information; please refer to Chapter \ref{mod:bootctrl} \textit{\nameref{mod:bootctrl}}.0: Strapping PAD state1: \hyperref[fielddesc:EFUSEXTAL48MSEL]{EFUSE\_XTAL\_48M\_SEL} in eFuse', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[12]', bloc: 'B21[4]'}
+  ECC_FORCE_CONST_TIME                      : {show: y, blk : 0, word: 5, pos: 13, len  : 1, start: 173, type      : bool, wr_dis  : 14, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether to force ECC to use constant-time mode for point multiplication calculation. 0: Not force1: Force', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[13]', bloc: 'B21[5]'}
+  RECOVERY_BOOTLOADER_FLASH_SECTOR_LO       : {show: y, blk : 0, word: 5, pos: 14, len  : 9, start: 174, type  : 'uint:9', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled. (The low part of the field), rloc: 'EFUSE_RD_REPEAT_DATA4_REG[22:14]', bloc: 'B21[7:6],B22[6:0]'}
+  RESERVE_0_183                             : {show: n, blk : 0, word: 5, pos: 23, len  : 9, start: 183, type  : 'uint:9', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[31:23]', bloc: 'B22[7],B23'}
+  MAC                                       : {show: y, blk : 1, word: 0, pos : 0, len : 48, start  : 0, type : 'bytes:6', wr_dis  : 20, rd_dis: null, alt                   : MAC_FACTORY, dict             : '', desc: MAC address, rloc: EFUSE_RD_MAC_SYS0_REG, bloc: 'B0,B1,B2,B3,B4,B5'}
+  MAC_EXT                                   : {show: y, blk : 1, word: 1, pos: 16, len : 16, start : 48, type : 'bytes:2', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Represents the extended bits of MAC address, rloc: 'EFUSE_RD_MAC_SYS1_REG[31:16]', bloc: 'B6,B7'}
+  WAFER_VERSION_MINOR                       : {show: y, blk : 1, word: 2, pos : 0, len  : 4, start : 64, type  : 'uint:4', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Minor chip version, rloc: 'EFUSE_RD_MAC_SYS2_REG[3:0]', bloc: 'B8[3:0]'}
+  WAFER_VERSION_MAJOR                       : {show: y, blk : 1, word: 2, pos : 4, len  : 2, start : 68, type  : 'uint:2', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Minor chip version, rloc: 'EFUSE_RD_MAC_SYS2_REG[5:4]', bloc: 'B8[5:4]'}
+  DISABLE_WAFER_VERSION_MAJOR               : {show: y, blk : 1, word: 2, pos : 6, len  : 1, start : 70, type      : bool, wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Disables check of wafer version major, rloc: 'EFUSE_RD_MAC_SYS2_REG[6]', bloc: 'B8[6]'}
+  DISABLE_BLK_VERSION_MAJOR                 : {show: y, blk : 1, word: 2, pos : 7, len  : 1, start : 71, type      : bool, wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Disables check of blk version major, rloc: 'EFUSE_RD_MAC_SYS2_REG[7]', bloc: 'B8[7]'}
+  BLK_VERSION_MINOR                         : {show: y, blk : 1, word: 2, pos : 8, len  : 3, start : 72, type  : 'uint:3', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: BLK_VERSION_MINOR of BLOCK2, rloc: 'EFUSE_RD_MAC_SYS2_REG[10:8]', bloc: 'B9[2:0]'}
+  BLK_VERSION_MAJOR                         : {show: y, blk : 1, word: 2, pos: 11, len  : 2, start : 75, type  : 'uint:2', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: BLK_VERSION_MAJOR of BLOCK2, rloc: 'EFUSE_RD_MAC_SYS2_REG[12:11]', bloc: 'B9[4:3]'}
+  FLASH_CAP                                 : {show: y, blk : 1, word: 2, pos: 13, len  : 3, start : 77, type  : 'uint:3', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Flash capacity, rloc: 'EFUSE_RD_MAC_SYS2_REG[15:13]', bloc: 'B9[7:5]'}
+  FLASH_VENDOR                              : {show: y, blk : 1, word: 2, pos: 16, len  : 3, start : 80, type  : 'uint:3', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Flash vendor, rloc: 'EFUSE_RD_MAC_SYS2_REG[18:16]', bloc: 'B10[2:0]'}
+  PSRAM_CAP                                 : {show: y, blk : 1, word: 2, pos: 19, len  : 3, start : 83, type  : 'uint:3', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Psram capacity, rloc: 'EFUSE_RD_MAC_SYS2_REG[21:19]', bloc: 'B10[5:3]'}
+  PSRAM_VENDOR                              : {show: y, blk : 1, word: 2, pos: 22, len  : 2, start : 86, type  : 'uint:2', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Psram vendor, rloc: 'EFUSE_RD_MAC_SYS2_REG[23:22]', bloc: 'B10[7:6]'}
+  TEMP                                      : {show: y, blk : 1, word: 2, pos: 24, len  : 2, start : 88, type  : 'uint:2', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Temp (die embedded inside), rloc: 'EFUSE_RD_MAC_SYS2_REG[25:24]', bloc: 'B11[1:0]'}
+  PKG_VERSION                               : {show: y, blk : 1, word: 2, pos: 26, len  : 3, start : 90, type  : 'uint:3', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Package version, rloc: 'EFUSE_RD_MAC_SYS2_REG[28:26]', bloc: 'B11[4:2]'}
+  PA_TRIM_VERSION                           : {show: y, blk : 1, word: 2, pos: 29, len  : 3, start : 93, type  : 'uint:3', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: PADC CAL PA trim version, rloc: 'EFUSE_RD_MAC_SYS2_REG[31:29]', bloc: 'B11[7:5]'}
+  TRIM_N_BIAS                               : {show: y, blk : 1, word: 3, pos : 0, len  : 5, start : 96, type  : 'uint:5', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: PADC CAL N bias, rloc: 'EFUSE_RD_MAC_SYS3_REG[4:0]', bloc: 'B12[4:0]'}
+  TRIM_P_BIAS                               : {show: y, blk : 1, word: 3, pos : 5, len  : 5, start: 101, type  : 'uint:5', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: PADC CAL P bias, rloc: 'EFUSE_RD_MAC_SYS3_REG[9:5]', bloc: 'B12[7:5],B13[1:0]'}
+  ACTIVE_HP_DBIAS                           : {show: y, blk : 1, word: 3, pos: 10, len  : 4, start: 106, type  : 'uint:4', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Active HP DBIAS of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS3_REG[13:10]', bloc: 'B13[5:2]'}
+  ACTIVE_LP_DBIAS                           : {show: y, blk : 1, word: 3, pos: 14, len  : 4, start: 110, type  : 'uint:4', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Active LP DBIAS of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS3_REG[17:14]', bloc: 'B13[7:6],B14[1:0]'}
+  LSLP_HP_DBG                               : {show: y, blk : 1, word: 3, pos: 18, len  : 2, start: 114, type  : 'uint:2', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: LSLP HP DBG of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS3_REG[19:18]', bloc: 'B14[3:2]'}
+  LSLP_HP_DBIAS                             : {show: y, blk : 1, word: 3, pos: 20, len  : 4, start: 116, type  : 'uint:4', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: LSLP HP DBIAS of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS3_REG[23:20]', bloc: 'B14[7:4]'}
+  DSLP_LP_DBG                               : {show: y, blk : 1, word: 3, pos: 24, len  : 4, start: 120, type  : 'uint:4', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: DSLP LP DBG of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS3_REG[27:24]', bloc: 'B15[3:0]'}
+  DSLP_LP_DBIAS                             : {show: y, blk : 1, word: 3, pos: 28, len  : 5, start: 124, type  : 'uint:5', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: DSLP LP DBIAS of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS3_REG[31:28]', bloc: 'B15[7:4],B16[0]'}
+  LP_HP_DBIAS_VOL_GAP                       : {show: y, blk : 1, word: 4, pos : 1, len  : 5, start: 129, type  : 'uint:5', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: DBIAS gap between LP and HP, rloc: 'EFUSE_RD_MAC_SYS4_REG[5:1]', bloc: 'B16[5:1]'}
+  REF_CURR_CODE                             : {show: y, blk : 1, word: 4, pos : 6, len  : 4, start: 134, type  : 'uint:4', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: REF PADC Calibration Curr, rloc: 'EFUSE_RD_MAC_SYS4_REG[9:6]', bloc: 'B16[7:6],B17[1:0]'}
+  RES_TUNE_CODE                             : {show: y, blk : 1, word: 4, pos: 10, len  : 5, start: 138, type  : 'uint:5', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: RES PADC Calibration Tune, rloc: 'EFUSE_RD_MAC_SYS4_REG[14:10]', bloc: 'B17[6:2]'}
+  RESERVED_1_143                            : {show: n, blk : 1, word: 4, pos: 15, len : 17, start: 143, type : 'uint:17', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: reserved, rloc: 'EFUSE_RD_MAC_SYS4_REG[31:15]', bloc: 'B17[7],B18,B19'}
+  SYS_DATA_PART0_2                          : {show: n, blk : 1, word: 5, pos : 0, len : 32, start: 160, type : 'uint:32', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Represents the third 32-bit of zeroth part of system data, rloc: EFUSE_RD_MAC_SYS5_REG, bloc: 'B20,B21,B22,B23'}
+  OPTIONAL_UNIQUE_ID                        : {show: y, blk : 2, word: 0, pos : 0, len: 128, start  : 0, type: 'bytes:16', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Optional unique 128-bit ID, rloc: EFUSE_RD_SYS_PART1_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15'}
+  TEMPERATURE_SENSOR                        : {show: y, blk : 2, word: 4, pos : 0, len  : 9, start: 128, type  : 'uint:9', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Temperature calibration data, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[8:0]', bloc: 'B16,B17[0]'}
+  OCODE                                     : {show: y, blk : 2, word: 4, pos : 9, len  : 8, start: 137, type  : 'uint:8', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: ADC OCode, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[16:9]', bloc: 'B17[7:1],B18[0]'}
+  ADC1_AVE_INITCODE_ATTEN0                  : {show: y, blk : 2, word: 4, pos: 17, len : 10, start: 145, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Average initcode of ADC1 atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[26:17]', bloc: 'B18[7:1],B19[2:0]'}
+  ADC1_AVE_INITCODE_ATTEN1                  : {show: y, blk : 2, word: 4, pos: 27, len : 10, start: 155, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Average initcode of ADC1 atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[31:27]', bloc: 'B19[7:3],B20[4:0]'}
+  ADC1_AVE_INITCODE_ATTEN2                  : {show: y, blk : 2, word: 5, pos : 5, len : 10, start: 165, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Average initcode of ADC1 atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA5_REG[14:5]', bloc: 'B20[7:5],B21[6:0]'}
+  ADC1_AVE_INITCODE_ATTEN3                  : {show: y, blk : 2, word: 5, pos: 15, len : 10, start: 175, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Average initcode of ADC1 atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA5_REG[24:15]', bloc: 'B21[7],B22,B23[0]'}
+  ADC1_HI_DOUT_ATTEN0                       : {show: y, blk : 2, word: 5, pos: 25, len : 10, start: 185, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: HI DOUT of ADC1 atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA5_REG[31:25]', bloc: 'B23[7:1],B24[2:0]'}
+  ADC1_HI_DOUT_ATTEN1                       : {show: y, blk : 2, word: 6, pos : 3, len : 10, start: 195, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: HI DOUT of ADC1 atten1, rloc: 'EFUSE_RD_SYS_PART1_DATA6_REG[12:3]', bloc: 'B24[7:3],B25[4:0]'}
+  ADC1_HI_DOUT_ATTEN2                       : {show: y, blk : 2, word: 6, pos: 13, len : 10, start: 205, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: HI DOUT of ADC1 atten2, rloc: 'EFUSE_RD_SYS_PART1_DATA6_REG[22:13]', bloc: 'B25[7:5],B26[6:0]'}
+  ADC1_HI_DOUT_ATTEN3                       : {show: y, blk : 2, word: 6, pos: 23, len : 10, start: 215, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: HI DOUT of ADC1 atten3, rloc: 'EFUSE_RD_SYS_PART1_DATA6_REG[31:23]', bloc: 'B26[7],B27,B28[0]'}
+  ADC1_CH0_ATTEN0_INITCODE_DIFF             : {show: y, blk : 2, word: 7, pos : 1, len  : 4, start: 225, type  : 'uint:4', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Gap between ADC1 CH0 and average initcode, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[4:1]', bloc: 'B28[4:1]'}
+  ADC1_CH1_ATTEN0_INITCODE_DIFF             : {show: y, blk : 2, word: 7, pos : 5, len  : 4, start: 229, type  : 'uint:4', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Gap between ADC1 CH1 and average initcode, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[8:5]', bloc: 'B28[7:5],B29[0]'}
+  ADC1_CH2_ATTEN0_INITCODE_DIFF             : {show: y, blk : 2, word: 7, pos : 9, len  : 4, start: 233, type  : 'uint:4', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Gap between ADC1 CH2 and average initcode, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[12:9]', bloc: 'B29[4:1]'}
+  ADC1_CH3_ATTEN0_INITCODE_DIFF             : {show: y, blk : 2, word: 7, pos: 13, len  : 4, start: 237, type  : 'uint:4', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Gap between ADC1 CH3 and average initcode, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[16:13]', bloc: 'B29[7:5],B30[0]'}
+  ADC1_CH4_ATTEN0_INITCODE_DIFF             : {show: y, blk : 2, word: 7, pos: 17, len  : 4, start: 241, type  : 'uint:4', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Gap between ADC1 CH4 and average initcode, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[20:17]', bloc: 'B30[4:1]'}
+  ADC1_CH5_ATTEN0_INITCODE_DIFF             : {show: y, blk : 2, word: 7, pos: 21, len  : 4, start: 245, type  : 'uint:4', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Gap between ADC1 CH5 and average initcode, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[24:21]', bloc: 'B30[7:5],B31[0]'}
+  RESERVED_2_249                            : {show: n, blk : 2, word: 7, pos: 25, len  : 7, start: 249, type  : 'uint:7', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: reserved, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[31:25]', bloc: 'B31[7:1]'}
+  BLOCK_USR_DATA                            : {show: y, blk : 3, word: 0, pos : 0, len: 192, start  : 0, type: 'bytes:24', wr_dis  : 22, rd_dis: null, alt                     : USER_DATA, dict             : '', desc: User data, rloc: EFUSE_RD_USR_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23'}
+  RESERVED_3_192                            : {show: n, blk : 3, word: 6, pos : 0, len  : 8, start: 192, type  : 'uint:8', wr_dis  : 22, rd_dis: null, alt                            : '', dict             : '', desc: reserved, rloc: 'EFUSE_RD_USR_DATA6_REG[7:0]', bloc: B24}
+  CUSTOM_MAC                                : {show: y, blk : 3, word: 6, pos : 8, len : 48, start: 200, type : 'bytes:6', wr_dis  : 22, rd_dis: null, alt: MAC_CUSTOM USER_DATA_MAC_CUSTOM, dict             : '', desc: Custom MAC, rloc: 'EFUSE_RD_USR_DATA6_REG[31:8]', bloc: 'B25,B26,B27,B28,B29,B30'}
+  RESERVED_3_248                            : {show: n, blk : 3, word: 7, pos: 24, len  : 8, start: 248, type  : 'uint:8', wr_dis  : 22, rd_dis: null, alt                            : '', dict             : '', desc: reserved, rloc: 'EFUSE_RD_USR_DATA7_REG[31:24]', bloc: B31}
+  BLOCK_KEY0                                : {show: y, blk : 4, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 23, rd_dis   : 0, alt                          : KEY0, dict             : '', desc: Key0 or user data, rloc: EFUSE_RD_KEY0_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
+  BLOCK_KEY1                                : {show: y, blk : 5, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 24, rd_dis   : 1, alt                          : KEY1, dict             : '', desc: Key1 or user data, rloc: EFUSE_RD_KEY1_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
+  BLOCK_KEY2                                : {show: y, blk : 6, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 25, rd_dis   : 2, alt                          : KEY2, dict             : '', desc: Key2 or user data, rloc: EFUSE_RD_KEY2_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
+  BLOCK_KEY3                                : {show: y, blk : 7, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 26, rd_dis   : 3, alt                          : KEY3, dict             : '', desc: Key3 or user data, rloc: EFUSE_RD_KEY3_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
+  BLOCK_KEY4                                : {show: y, blk : 8, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 27, rd_dis   : 4, alt                          : KEY4, dict             : '', desc: Key4 or user data, rloc: EFUSE_RD_KEY4_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
+  BLOCK_KEY5                                : {show: y, blk : 9, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 28, rd_dis   : 5, alt                          : KEY5, dict             : '', desc: Key5 or user data, rloc: EFUSE_RD_KEY5_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
+  BLOCK_SYS_DATA2                           : {show: y, blk: 10, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 29, rd_dis   : 6, alt                : SYS_DATA_PART2, dict             : '', desc: System data part 2 (reserved), rloc: EFUSE_RD_SYS_PART2_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}