esptool 4.9.dev8__tar.gz → 4.9.1__tar.gz

{esptool-4.9.dev8/esptool.egg-info → esptool-4.9.1}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: esptool
-Version: 4.9.dev8
+Version: 4.9.1
 Summary: A serial utility to communicate & flash code to Espressif chips.
 Author: Fredrik Ahlberg (themadinventor), Angus Gratton (projectgus), Espressif Systems
 License: GPLv2+

esptool-4.9.1/espefuse/efuse_defs/esp32c61.yaml

@@ -0,0 +1,105 @@
+VER_NO: d435ade68d90ef96b0522478b2d8ba75
+EFUSES:
+  WR_DIS                                 : {show: y, blk : 0, word: 0, pos : 0, len : 32, start  : 0, type : 'uint:32', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Disable programming of individual eFuses, rloc: EFUSE_RD_WR_DIS0_REG, bloc: 'B0,B1,B2,B3'}
+  RD_DIS                                 : {show: y, blk : 0, word: 1, pos : 0, len  : 7, start : 32, type  : 'uint:7', wr_dis   : 0, rd_dis: null, alt                            : '', dict             : '', desc: Disable reading from BlOCK4-10, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[6:0]', bloc: 'B4[6:0]'}
+  DIS_ICACHE                             : {show: y, blk : 0, word: 1, pos : 7, len  : 1, start : 39, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether cache is disabled. 1: Disabled 0: Enabled.', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[7]', bloc: 'B4[7]'}
+  DIS_USB_JTAG                           : {show: y, blk : 0, word: 1, pos : 8, len  : 1, start : 40, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the function of usb switch to jtag is disabled or enabled. 1: disabled 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[8]', bloc: 'B5[0]'}
+  DIS_USB_SERIAL_JTAG                    : {show: n, blk : 0, word: 1, pos : 9, len  : 1, start : 41, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether USB-Serial-JTAG is disabled or enabled. 1: disabled 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[9]', bloc: 'B5[1]'}
+  DIS_FORCE_DOWNLOAD                     : {show: y, blk : 0, word: 1, pos: 10, len  : 1, start : 42, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the function that forces chip into download mode is disabled or enabled. 1: disabled 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[10]', bloc: 'B5[2]'}
+  SPI_DOWNLOAD_MSPI_DIS                  : {show: y, blk : 0, word: 1, pos: 11, len  : 1, start : 43, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether SPI0 controller during boot_mode_download is disabled or enabled. 1: disabled 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[11]', bloc: 'B5[3]'}
+  JTAG_SEL_ENABLE                        : {show: y, blk : 0, word: 1, pos: 12, len  : 1, start : 44, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled. 1: enabled 0: disabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[12]', bloc: 'B5[4]'}
+  DIS_PAD_JTAG                           : {show: y, blk : 0, word: 1, pos: 13, len  : 1, start : 45, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether JTAG is disabled in the hard way(permanently). 1: disabled 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[13]', bloc: 'B5[5]'}
+  DIS_DOWNLOAD_MANUAL_ENCRYPT            : {show: y, blk : 0, word: 1, pos: 14, len  : 1, start : 46, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode). 1: disabled 0: enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[14]', bloc: 'B5[6]'}
+  USB_DREFH                              : {show: n, blk : 0, word: 1, pos: 15, len  : 2, start : 47, type  : 'uint:2', wr_dis  : 30, rd_dis: null, alt                            : '', dict             : '', desc: Represents the single-end input threshold vrefh of USB_SERIAL_JTAG PHY; 1.76 V to 2 V with step of 80 mV, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[16:15]', bloc: 'B5[7],B6[0]'}
+  USB_DREFL                              : {show: n, blk : 0, word: 1, pos: 17, len  : 2, start : 49, type  : 'uint:2', wr_dis  : 30, rd_dis: null, alt                            : '', dict             : '', desc: Represents the single-end input threshold vrefl of USB_SERIAL_JTAG PHY; 1.76 V to 2 V with step of 80 mV, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[18:17]', bloc: 'B6[2:1]'}
+  USB_EXCHG_PINS                         : {show: y, blk : 0, word: 1, pos: 19, len  : 1, start : 51, type      : bool, wr_dis  : 30, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the D+ and D- pins of USB_SERIAL_JTAG PHY is exchanged. 1: exchanged 0: not exchanged', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[19]', bloc: 'B6[3]'}
+  VDD_SPI_AS_GPIO                        : {show: y, blk : 0, word: 1, pos: 20, len  : 1, start : 52, type      : bool, wr_dis  : 30, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether vdd spi pin is functioned as gpio. 1: functioned 0: not functioned', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[20]', bloc: 'B6[4]'}
+  WDT_DELAY_SEL                          : {show: y, blk : 0, word: 1, pos: 21, len  : 2, start : 53, type  : 'uint:2', wr_dis   : 3, rd_dis: null, alt                            : '', dict             : '', desc: lp wdt timeout threshold at startup = initial timeout value * (2 ^ (EFUSE_WDT_DELAY_SEL + 1)), rloc: 'EFUSE_RD_REPEAT_DATA0_REG[22:21]', bloc: 'B6[6:5]'}
+  SPI_BOOT_CRYPT_CNT                     : {show: y, blk : 0, word: 1, pos: 23, len  : 3, start : 55, type  : 'uint:3', wr_dis   : 4, rd_dis: null, alt                            : '', dict: '{0: "Disable", 1: "Enable", 3: "Disable", 7: "Enable"}', desc: Enables flash encryption when 1 or 3 bits are set and disables otherwise, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[25:23]', bloc: 'B6[7],B7[1:0]'}
+  SECURE_BOOT_KEY_REVOKE0                : {show: y, blk : 0, word: 1, pos: 26, len  : 1, start : 58, type      : bool, wr_dis   : 5, rd_dis: null, alt                            : '', dict             : '', desc: Revoke 1st secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[26]', bloc: 'B7[2]'}
+  SECURE_BOOT_KEY_REVOKE1                : {show: y, blk : 0, word: 1, pos: 27, len  : 1, start : 59, type      : bool, wr_dis   : 6, rd_dis: null, alt                            : '', dict             : '', desc: Revoke 2nd secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[27]', bloc: 'B7[3]'}
+  SECURE_BOOT_KEY_REVOKE2                : {show: y, blk : 0, word: 1, pos: 28, len  : 1, start : 60, type      : bool, wr_dis   : 7, rd_dis: null, alt                            : '', dict             : '', desc: Revoke 3rd secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[28]', bloc: 'B7[4]'}
+  RESERVE_0_61                           : {show: n, blk : 0, word: 1, pos: 29, len  : 3, start : 61, type  : 'uint:3', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[31:29]', bloc: 'B7[7:5]'}
+  KEY_PURPOSE_0                          : {show: y, blk : 0, word: 2, pos : 0, len  : 4, start : 64, type  : 'uint:4', wr_dis   : 8, rd_dis: null, alt                  : KEY0_PURPOSE, dict             : '', desc: Represents the purpose of Key0, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[3:0]', bloc: 'B8[3:0]'}
+  KEY_PURPOSE_1                          : {show: y, blk : 0, word: 2, pos : 4, len  : 4, start : 68, type  : 'uint:4', wr_dis   : 9, rd_dis: null, alt                  : KEY1_PURPOSE, dict             : '', desc: Represents the purpose of Key1, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[7:4]', bloc: 'B8[7:4]'}
+  KEY_PURPOSE_2                          : {show: y, blk : 0, word: 2, pos : 8, len  : 4, start : 72, type  : 'uint:4', wr_dis  : 10, rd_dis: null, alt                  : KEY2_PURPOSE, dict             : '', desc: Represents the purpose of Key2, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[11:8]', bloc: 'B9[3:0]'}
+  KEY_PURPOSE_3                          : {show: y, blk : 0, word: 2, pos: 12, len  : 4, start : 76, type  : 'uint:4', wr_dis  : 11, rd_dis: null, alt                  : KEY3_PURPOSE, dict             : '', desc: Represents the purpose of Key3, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[15:12]', bloc: 'B9[7:4]'}
+  KEY_PURPOSE_4                          : {show: y, blk : 0, word: 2, pos: 16, len  : 4, start : 80, type  : 'uint:4', wr_dis  : 12, rd_dis: null, alt                  : KEY4_PURPOSE, dict             : '', desc: Represents the purpose of Key4, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[19:16]', bloc: 'B10[3:0]'}
+  KEY_PURPOSE_5                          : {show: y, blk : 0, word: 2, pos: 20, len  : 4, start : 84, type  : 'uint:4', wr_dis  : 13, rd_dis: null, alt                  : KEY5_PURPOSE, dict             : '', desc: Represents the purpose of Key5, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[23:20]', bloc: 'B10[7:4]'}
+  SEC_DPA_LEVEL                          : {show: y, blk : 0, word: 2, pos: 24, len  : 2, start : 88, type  : 'uint:2', wr_dis  : 14, rd_dis: null, alt                            : '', dict             : '', desc: Represents the spa secure level by configuring the clock random divide mode, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[25:24]', bloc: 'B11[1:0]'}
+  SECURE_BOOT_EN                         : {show: y, blk : 0, word: 2, pos: 26, len  : 1, start : 90, type      : bool, wr_dis  : 15, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether secure boot is enabled or disabled. 1. Enable 0: Disable', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[26]', bloc: 'B11[2]'}
+  SECURE_BOOT_AGGRESSIVE_REVOKE          : {show: y, blk : 0, word: 2, pos: 27, len  : 1, start : 91, type      : bool, wr_dis  : 16, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether revoking aggressive secure boot is enabled or disabled. 1. Enable 0: Disable', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[27]', bloc: 'B11[3]'}
+  FLASH_TPUW                             : {show: y, blk : 0, word: 2, pos: 28, len  : 4, start : 92, type  : 'uint:4', wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: Represents the flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is programmed value. Otherwise; the waiting time is 2 times the programmed value, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[31:28]', bloc: 'B11[7:4]'}
+  DIS_DOWNLOAD_MODE                      : {show: y, blk : 0, word: 3, pos : 0, len  : 1, start : 96, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether Download mode is disable or enable. 1. Disable 0: Enable', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[0]', bloc: 'B12[0]'}
+  DIS_DIRECT_BOOT                        : {show: y, blk : 0, word: 3, pos : 1, len  : 1, start : 97, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether direct boot mode is disabled or enabled. 1. Disable 0: Enable', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[1]', bloc: 'B12[1]'}
+  DIS_USB_SERIAL_JTAG_ROM_PRINT          : {show: y, blk : 0, word: 3, pos : 2, len  : 1, start : 98, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether print from USB-Serial-JTAG is disabled or enabled. 1. Disable 0: Enable', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[2]', bloc: 'B12[2]'}
+  DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE      : {show: y, blk : 0, word: 3, pos : 3, len  : 1, start : 99, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: Disable 0: Enable', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[3]', bloc: 'B12[3]'}
+  ENABLE_SECURITY_DOWNLOAD               : {show: y, blk : 0, word: 3, pos : 4, len  : 1, start: 100, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether security download is enabled or disabled. 1: Enable 0: Disable', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[4]', bloc: 'B12[4]'}
+  UART_PRINT_CONTROL                     : {show: y, blk : 0, word: 3, pos : 5, len  : 2, start: 101, type  : 'uint:2', wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: Represents the types of UART printing, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[6:5]', bloc: 'B12[6:5]'}
+  FORCE_SEND_RESUME                      : {show: y, blk : 0, word: 3, pos : 7, len  : 1, start: 103, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: Represents whether ROM code is forced to send a resume command during SPI boot, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[7]', bloc: 'B12[7]'}
+  SECURE_VERSION                         : {show: y, blk : 0, word: 3, pos : 8, len : 16, start: 104, type : 'uint:16', wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: Represents the version used by ESP-IDF anti-rollback feature, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[23:8]', bloc: 'B13,B14'}
+  SECURE_BOOT_DISABLE_FAST_WAKE          : {show: y, blk : 0, word: 3, pos: 24, len  : 1, start: 120, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: Represents whether FAST_VERIFY_ON_WAKE is disable or enable when Secure Boot is enable, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[24]', bloc: 'B15[0]'}
+  HYS_EN_PAD                             : {show: y, blk : 0, word: 3, pos: 25, len  : 1, start: 121, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: Set bits to enable hysteresis function of PAD0~27, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[25]', bloc: 'B15[1]'}
+  XTS_DPA_CLK_ENABLE                     : {show: y, blk : 0, word: 3, pos: 26, len  : 1, start: 122, type      : bool, wr_dis  : 14, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether xts-aes anti-dpa attack clock is enabled. 1. Enable. 0: Disable.', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[26]', bloc: 'B15[2]'}
+  XTS_DPA_PSEUDO_LEVEL                   : {show: y, blk : 0, word: 3, pos: 27, len  : 2, start: 123, type  : 'uint:2', wr_dis  : 14, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents the pseudo round level of xts-aes anti-dpa attack. 3: High. 2: Moderate 1. Low 0: Disabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[28:27]', bloc: 'B15[4:3]'}
+  DIS_WIFI6                              : {show: y, blk : 0, word: 3, pos: 29, len  : 1, start: 125, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the WIFI6 feature is enable or disabled. 1: WIFI6 is disable; 0: WIFI6 is enabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[29]', bloc: 'B15[5]'}
+  ECDSA_DISABLE_P192                     : {show: y, blk : 0, word: 3, pos: 30, len  : 1, start: 126, type      : bool, wr_dis  : 14, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether to disable P192 curve in ECDSA. 1: Disabled. 0: Not disabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[30]', bloc: 'B15[6]'}
+  ECC_FORCE_CONST_TIME                   : {show: y, blk : 0, word: 3, pos: 31, len  : 1, start: 127, type      : bool, wr_dis  : 14, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether to force ecc to use const-time calculation mode. 1: Enable. 0: Disable', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[31]', bloc: 'B15[7]'}
+  BOOTLOADER_ANTI_ROLLBACK_SECURE_VERSION: {show: y, blk : 0, word: 4, pos : 0, len  : 4, start: 128, type  : 'uint:4', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Represents the anti-rollback secure version of the 2nd stage bootloader used by the ROM bootloader, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[3:0]', bloc: 'B16[3:0]'}
+  BOOTLOADER_ANTI_ROLLBACK_EN            : {show: y, blk : 0, word: 4, pos : 4, len  : 1, start: 132, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the ani-rollback check for the 2nd stage bootloader is enabled.1: Enabled0: Disabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[4]', bloc: 'B16[4]'}
+  BOOTLOADER_ANTI_ROLLBACK_UPDATE_IN_ROM : {show: y, blk : 0, word: 4, pos : 5, len  : 1, start: 133, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the ani-rollback SECURE_VERSION will be updated from the ROM bootloader.1: Enable0: Disable', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[5]', bloc: 'B16[5]'}
+  RECOVERY_BOOTLOADER_FLASH_SECTOR       : {show: y, blk : 0, word: 4, pos : 6, len : 12, start: 134, type : 'uint:12', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[17:6]', bloc: 'B16[7:6],B17,B18[1:0]'}
+  RESERVE_0_146                          : {show: n, blk : 0, word: 4, pos: 18, len : 14, start: 146, type : 'uint:14', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[31:18]', bloc: 'B18[7:2],B19'}
+  REPEAT_DATA4                           : {show: y, blk : 0, word: 5, pos : 0, len : 24, start: 160, type : 'uint:24', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Reserved, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[23:0]', bloc: 'B20,B21,B22'}
+  RESERVE_0_184                          : {show: n, blk : 0, word: 5, pos: 24, len  : 8, start: 184, type  : 'uint:8', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[31:24]', bloc: B23}
+  MAC                                    : {show: y, blk : 1, word: 0, pos : 0, len : 48, start  : 0, type : 'bytes:6', wr_dis  : 20, rd_dis: null, alt                   : MAC_FACTORY, dict             : '', desc: MAC address, rloc: EFUSE_RD_MAC_SYS0_REG, bloc: 'B0,B1,B2,B3,B4,B5'}
+  RESERVE_1_48                           : {show: n, blk : 1, word: 1, pos: 16, len : 16, start : 48, type : 'uint:16', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_MAC_SYS1_REG[31:16]', bloc: 'B6,B7'}
+  WAFER_VERSION_MINOR                    : {show: y, blk : 1, word: 2, pos : 0, len  : 4, start : 64, type  : 'uint:4', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Minor chip version, rloc: 'EFUSE_RD_MAC_SYS2_REG[3:0]', bloc: 'B8[3:0]'}
+  WAFER_VERSION_MAJOR                    : {show: y, blk : 1, word: 2, pos : 4, len  : 2, start : 68, type  : 'uint:2', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Major chip version, rloc: 'EFUSE_RD_MAC_SYS2_REG[5:4]', bloc: 'B8[5:4]'}
+  DISABLE_WAFER_VERSION_MAJOR            : {show: y, blk : 1, word: 2, pos : 6, len  : 1, start : 70, type      : bool, wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Disables check of wafer version major, rloc: 'EFUSE_RD_MAC_SYS2_REG[6]', bloc: 'B8[6]'}
+  DISABLE_BLK_VERSION_MAJOR              : {show: y, blk : 1, word: 2, pos : 7, len  : 1, start : 71, type      : bool, wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Disables check of blk version major, rloc: 'EFUSE_RD_MAC_SYS2_REG[7]', bloc: 'B8[7]'}
+  BLK_VERSION_MINOR                      : {show: y, blk : 1, word: 2, pos : 8, len  : 3, start : 72, type  : 'uint:3', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: BLK_VERSION_MINOR of BLOCK2, rloc: 'EFUSE_RD_MAC_SYS2_REG[10:8]', bloc: 'B9[2:0]'}
+  BLK_VERSION_MAJOR                      : {show: y, blk : 1, word: 2, pos: 11, len  : 2, start : 75, type  : 'uint:2', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: BLK_VERSION_MAJOR of BLOCK2, rloc: 'EFUSE_RD_MAC_SYS2_REG[12:11]', bloc: 'B9[4:3]'}
+  FLASH_CAP                              : {show: y, blk : 1, word: 2, pos: 13, len  : 3, start : 77, type  : 'uint:3', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Flash capacity, rloc: 'EFUSE_RD_MAC_SYS2_REG[15:13]', bloc: 'B9[7:5]'}
+  FLASH_VENDOR                           : {show: y, blk : 1, word: 2, pos: 16, len  : 3, start : 80, type  : 'uint:3', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Flash vendor, rloc: 'EFUSE_RD_MAC_SYS2_REG[18:16]', bloc: 'B10[2:0]'}
+  PSRAM_CAP                              : {show: y, blk : 1, word: 2, pos: 19, len  : 3, start : 83, type  : 'uint:3', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: PSRAM capacity, rloc: 'EFUSE_RD_MAC_SYS2_REG[21:19]', bloc: 'B10[5:3]'}
+  PSRAM_VENDOR                           : {show: y, blk : 1, word: 2, pos: 22, len  : 2, start : 86, type  : 'uint:2', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: PSRAM vendor, rloc: 'EFUSE_RD_MAC_SYS2_REG[23:22]', bloc: 'B10[7:6]'}
+  TEMP                                   : {show: y, blk : 1, word: 2, pos: 24, len  : 2, start : 88, type  : 'uint:2', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Temperature, rloc: 'EFUSE_RD_MAC_SYS2_REG[25:24]', bloc: 'B11[1:0]'}
+  PKG_VERSION                            : {show: y, blk : 1, word: 2, pos: 26, len  : 3, start : 90, type  : 'uint:3', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Package version, rloc: 'EFUSE_RD_MAC_SYS2_REG[28:26]', bloc: 'B11[4:2]'}
+  ACTIVE_HP_DBIAS                        : {show: y, blk : 1, word: 2, pos: 29, len  : 4, start : 93, type  : 'uint:4', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Active HP DBIAS of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS2_REG[31:29]', bloc: 'B11[7:5],B12[0]'}
+  ACTIVE_LP_DBIAS                        : {show: y, blk : 1, word: 3, pos : 1, len  : 4, start : 97, type  : 'uint:4', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Active LP DBIAS of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS3_REG[4:1]', bloc: 'B12[4:1]'}
+  LSLP_HP_DBG                            : {show: y, blk : 1, word: 3, pos : 5, len  : 2, start: 101, type  : 'uint:2', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: LSLP HP DBG of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS3_REG[6:5]', bloc: 'B12[6:5]'}
+  LSLP_HP_DBIAS                          : {show: y, blk : 1, word: 3, pos : 7, len  : 4, start: 103, type  : 'uint:4', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: LSLP HP DBIAS of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS3_REG[10:7]', bloc: 'B12[7],B13[2:0]'}
+  DSLP_LP_DBG                            : {show: y, blk : 1, word: 3, pos: 11, len  : 4, start: 107, type  : 'uint:4', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: DSLP LP DBG of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS3_REG[14:11]', bloc: 'B13[6:3]'}
+  DSLP_LP_DBIAS                          : {show: y, blk : 1, word: 3, pos: 15, len  : 5, start: 111, type  : 'uint:5', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: DSLP LP DBIAS of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS3_REG[19:15]', bloc: 'B13[7],B14[3:0]'}
+  LP_HP_DBIAS_VOL_GAP                    : {show: y, blk : 1, word: 3, pos: 20, len  : 5, start: 116, type  : 'uint:5', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: DBIAS gap between LP and HP, rloc: 'EFUSE_RD_MAC_SYS3_REG[24:20]', bloc: 'B14[7:4],B15[0]'}
+  RESERVED_1_121                         : {show: n, blk : 1, word: 3, pos: 25, len  : 7, start: 121, type  : 'uint:7', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: reserved, rloc: 'EFUSE_RD_MAC_SYS3_REG[31:25]', bloc: 'B15[7:1]'}
+  SYS_DATA_PART0_1                       : {show: n, blk : 1, word: 4, pos : 0, len : 32, start: 128, type : 'uint:32', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Represents the first 14-bit of zeroth part of system data, rloc: EFUSE_RD_MAC_SYS4_REG, bloc: 'B16,B17,B18,B19'}
+  SYS_DATA_PART0_2                       : {show: n, blk : 1, word: 5, pos : 0, len : 32, start: 160, type : 'uint:32', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Represents the second 32-bit of zeroth part of system data, rloc: EFUSE_RD_MAC_SYS5_REG, bloc: 'B20,B21,B22,B23'}
+  OPTIONAL_UNIQUE_ID                     : {show: y, blk : 2, word: 0, pos : 0, len: 128, start  : 0, type: 'bytes:16', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Optional unique 128-bit ID, rloc: EFUSE_RD_SYS_PART1_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15'}
+  TEMPERATURE_SENSOR                     : {show: y, blk : 2, word: 4, pos : 0, len  : 9, start: 128, type  : 'uint:9', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Temperature calibration data, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[8:0]', bloc: 'B16,B17[0]'}
+  OCODE                                  : {show: y, blk : 2, word: 4, pos : 9, len  : 8, start: 137, type  : 'uint:8', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: ADC OCode calibration, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[16:9]', bloc: 'B17[7:1],B18[0]'}
+  ADC1_AVE_INIT_CODE_ATTEN0              : {show: y, blk : 2, word: 4, pos: 17, len : 10, start: 145, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Average initcode of ADC1 atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[26:17]', bloc: 'B18[7:1],B19[2:0]'}
+  ADC1_AVE_INIT_CODE_ATTEN1              : {show: y, blk : 2, word: 4, pos: 27, len : 10, start: 155, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Average initcode of ADC1 atten1, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[31:27]', bloc: 'B19[7:3],B20[4:0]'}
+  ADC1_AVE_INIT_CODE_ATTEN2              : {show: y, blk : 2, word: 5, pos : 5, len : 10, start: 165, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Average initcode of ADC1 atten2, rloc: 'EFUSE_RD_SYS_PART1_DATA5_REG[14:5]', bloc: 'B20[7:5],B21[6:0]'}
+  ADC1_AVE_INIT_CODE_ATTEN3              : {show: y, blk : 2, word: 5, pos: 15, len : 10, start: 175, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Average initcode of ADC1 atten3, rloc: 'EFUSE_RD_SYS_PART1_DATA5_REG[24:15]', bloc: 'B21[7],B22,B23[0]'}
+  ADC1_HI_DOUT_ATTEN0                    : {show: y, blk : 2, word: 5, pos: 25, len : 10, start: 185, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: HI_DOUT of ADC1 atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA5_REG[31:25]', bloc: 'B23[7:1],B24[2:0]'}
+  ADC1_HI_DOUT_ATTEN1                    : {show: y, blk : 2, word: 6, pos : 3, len : 10, start: 195, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: HI_DOUT of ADC1 atten1, rloc: 'EFUSE_RD_SYS_PART1_DATA6_REG[12:3]', bloc: 'B24[7:3],B25[4:0]'}
+  ADC1_HI_DOUT_ATTEN2                    : {show: y, blk : 2, word: 6, pos: 13, len : 10, start: 205, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: HI_DOUT of ADC1 atten2, rloc: 'EFUSE_RD_SYS_PART1_DATA6_REG[22:13]', bloc: 'B25[7:5],B26[6:0]'}
+  ADC1_HI_DOUT_ATTEN3                    : {show: y, blk : 2, word: 6, pos: 23, len : 10, start: 215, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: HI_DOUT of ADC1 atten3, rloc: 'EFUSE_RD_SYS_PART1_DATA6_REG[31:23]', bloc: 'B26[7],B27,B28[0]'}
+  ADC1_CH0_ATTEN0_INITCODE_DIFF          : {show: y, blk : 2, word: 7, pos : 1, len  : 4, start: 225, type  : 'uint:4', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Gap between ADC1 CH0 and average initcode, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[4:1]', bloc: 'B28[4:1]'}
+  ADC1_CH1_ATTEN0_INITCODE_DIFF          : {show: y, blk : 2, word: 7, pos : 5, len  : 4, start: 229, type  : 'uint:4', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Gap between ADC1 CH1 and average initcode, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[8:5]', bloc: 'B28[7:5],B29[0]'}
+  ADC1_CH2_ATTEN0_INITCODE_DIFF          : {show: y, blk : 2, word: 7, pos : 9, len  : 4, start: 233, type  : 'uint:4', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Gap between ADC1 CH2 and average initcode, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[12:9]', bloc: 'B29[4:1]'}
+  ADC1_CH3_ATTEN0_INITCODE_DIFF          : {show: y, blk : 2, word: 7, pos: 13, len  : 4, start: 237, type  : 'uint:4', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Gap between ADC1 CH3 and average initcode, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[16:13]', bloc: 'B29[7:5],B30[0]'}
+  RESERVED_2_241                         : {show: n, blk : 2, word: 7, pos: 17, len : 15, start: 241, type : 'uint:15', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: reserved, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[31:17]', bloc: 'B30[7:1],B31'}
+  BLOCK_USR_DATA                         : {show: y, blk : 3, word: 0, pos : 0, len: 192, start  : 0, type: 'bytes:24', wr_dis  : 22, rd_dis: null, alt                     : USER_DATA, dict             : '', desc: User data, rloc: EFUSE_RD_USR_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23'}
+  RESERVED_3_192                         : {show: n, blk : 3, word: 6, pos : 0, len  : 8, start: 192, type  : 'uint:8', wr_dis  : 22, rd_dis: null, alt                            : '', dict             : '', desc: reserved, rloc: 'EFUSE_RD_USR_DATA6_REG[7:0]', bloc: B24}
+  CUSTOM_MAC                             : {show: y, blk : 3, word: 6, pos : 8, len : 48, start: 200, type : 'bytes:6', wr_dis  : 22, rd_dis: null, alt: MAC_CUSTOM USER_DATA_MAC_CUSTOM, dict             : '', desc: Custom MAC, rloc: 'EFUSE_RD_USR_DATA6_REG[31:8]', bloc: 'B25,B26,B27,B28,B29,B30'}
+  RESERVED_3_248                         : {show: n, blk : 3, word: 7, pos: 24, len  : 8, start: 248, type  : 'uint:8', wr_dis  : 22, rd_dis: null, alt                            : '', dict             : '', desc: reserved, rloc: 'EFUSE_RD_USR_DATA7_REG[31:24]', bloc: B31}
+  BLOCK_KEY0                             : {show: y, blk : 4, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 23, rd_dis   : 0, alt                          : KEY0, dict             : '', desc: Key0 or user data, rloc: EFUSE_RD_KEY0_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
+  BLOCK_KEY1                             : {show: y, blk : 5, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 24, rd_dis   : 1, alt                          : KEY1, dict             : '', desc: Key1 or user data, rloc: EFUSE_RD_KEY1_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
+  BLOCK_KEY2                             : {show: y, blk : 6, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 25, rd_dis   : 2, alt                          : KEY2, dict             : '', desc: Key2 or user data, rloc: EFUSE_RD_KEY2_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
+  BLOCK_KEY3                             : {show: y, blk : 7, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 26, rd_dis   : 3, alt                          : KEY3, dict             : '', desc: Key3 or user data, rloc: EFUSE_RD_KEY3_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
+  BLOCK_KEY4                             : {show: y, blk : 8, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 27, rd_dis   : 4, alt                          : KEY4, dict             : '', desc: Key4 or user data, rloc: EFUSE_RD_KEY4_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
+  BLOCK_KEY5                             : {show: y, blk : 9, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 28, rd_dis   : 5, alt                          : KEY5, dict             : '', desc: Key5 or user data, rloc: EFUSE_RD_KEY5_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
+  BLOCK_SYS_DATA2                        : {show: y, blk: 10, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 29, rd_dis   : 6, alt                : SYS_DATA_PART2, dict             : '', desc: System data part 2 (reserved), rloc: EFUSE_RD_SYS_PART2_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}

{esptool-4.9.dev8 → esptool-4.9.1}/esptool/__init__.py

@@ -29,7 +29,7 @@ __all__ = [
     "write_mem",
 ]
 
-__version__ = "4.9.dev8"
+__version__ = "4.9.1"
 
 import argparse
 import inspect
@@ -846,6 +846,12 @@ def main(argv=None, esp=None):
                     "setting --no-stub"
                 )
                 args.no_stub = True
+            elif esp.CHIP_NAME == "ESP32-C3" and esp.get_secure_boot_enabled():
+                print(
+                    "WARNING: Stub flasher is not supported on ESP32-C3 "
+                    "with Secure Boot, setting --no-stub"
+                )
+                args.no_stub = True
             elif not esp.IS_STUB and esp.stub_is_disabled:
                 print(
                     "WARNING: Stub loader has been disabled for compatibility, "
@@ -980,7 +986,7 @@ def main(argv=None, esp=None):
         if not esp.secure_download_mode:
             try:
                 flash_id = esp.flash_id()
-                if flash_id in (0xFFFFFF, 0x000000):
+                if flash_id in (0xFFFFFF, 0x000000, 0xFFFF3F):
                     print(
                         "WARNING: Failed to communicate with the flash chip, "
                         "read/write operations will fail. "
@@ -1291,7 +1297,12 @@ class AutoHex2BinAction(argparse.Action):
             with open(value, "rb") as f:
                 # if hex file was detected replace hex file with converted temp bin
                 # otherwise keep the original file
-                value = intel_hex_to_bin(f).name
+                converted = intel_hex_to_bin(f)
+                if len(converted) != 1:
+                    print(
+                        "Note: Detected merged IntelHex file, processing only first file"
+                    )
+                value = converted[0][1].name
         except IOError as e:
             raise argparse.ArgumentError(self, e)
         setattr(namespace, self.dest, value)
@@ -1326,8 +1337,7 @@ class AddrFilenamePairAction(argparse.Action):
                     "and the binary filename to write there",
                 )
             # check for intel hex files and convert them to bin
-            argfile = intel_hex_to_bin(argfile, address)
-            pairs.append((address, argfile))
+            pairs.extend(intel_hex_to_bin(argfile, address))
 
         # Sort the addresses and check for overlapping
         end = 0

{esptool-4.9.dev8 → esptool-4.9.1}/esptool/bin_image.py

@@ -11,7 +11,7 @@ import os
 import re
 import struct
 import tempfile
-from typing import IO, Optional, Tuple
+from typing import IO, List, Optional, Tuple, Type
 
 from intelhex import HexRecordError, IntelHex
 
@@ -45,9 +45,46 @@ def align_file_position(f, size):
     f.seek(align, 1)
 
 
-def intel_hex_to_bin(file: IO[bytes], start_addr: Optional[int] = None) -> IO[bytes]:
-    """Convert IntelHex file to temp binary file with padding from start_addr
-    If hex file was detected return temp bin file object; input file otherwise"""
+def _find_subsequences(addresses: List[int]) -> List[Tuple[int, int]]:
+    """Find continuous subsequences in a list of addresses"""
+    if not addresses:
+        return []
+
+    sorted_seq = sorted(addresses)
+
+    subsequences = []
+    start = sorted_seq[0]
+
+    for prev, num in zip(sorted_seq, sorted_seq[1:]):
+        if num != prev + 1:
+            # Found a gap, save the current subsequence
+            subsequences.append((start, prev))
+            start = num
+
+    # Add the last subsequence
+    subsequences.append((start, sorted_seq[-1]))
+
+    return subsequences
+
+
+def _split_intel_hex_file(ih: IntelHex) -> List[Tuple[int, IO[bytes]]]:
+    """Split an IntelHex file into multiple temporary binary files based on the gaps
+    in the addresses"""
+    subsequences = _find_subsequences(ih.addresses())
+    bins: List[Tuple[int, IO[bytes]]] = []
+    for start, end in subsequences:
+        bin = tempfile.NamedTemporaryFile(suffix=".bin", delete=False)
+        ih.tobinfile(bin, start=start, end=end)
+        bin.seek(0)  # make sure the file is at the beginning
+        bins.append((start, bin))
+    return bins
+
+
+def intel_hex_to_bin(
+    file: IO[bytes], start_addr: Optional[int] = None
+) -> List[Tuple[Optional[int], IO[bytes]]]:
+    """Convert IntelHex file to list of temp binary files
+    If not hex file return input file otherwise"""
     INTEL_HEX_MAGIC = b":"
     magic = file.read(1)
     file.seek(0)
@@ -56,14 +93,12 @@ def intel_hex_to_bin(file: IO[bytes], start_addr: Optional[int] = None) -> IO[by
             ih = IntelHex()
             ih.loadhex(file.name)
             file.close()
-            bin = tempfile.NamedTemporaryFile(suffix=".bin", delete=False)
-            ih.tobinfile(bin, start=start_addr)
-            return bin
+            return _split_intel_hex_file(ih)  # type: ignore
         else:
-            return file
+            return [(start_addr, file)]
     except (HexRecordError, UnicodeDecodeError):
         # file started with HEX magic but the rest was not according to the standard
-        return file
+        return [(start_addr, file)]
 
 
 def LoadFirmwareImage(chip, image_file):
@@ -622,7 +657,7 @@ class ESP32FirmwareImage(BaseFirmwareImage):
     can be placed in the normal image (just @ MMU page size padded offsets).
     """
 
-    ROM_LOADER = ESP32ROM
+    ROM_LOADER: Type[ESPLoader] = ESP32ROM
 
     # ROM bootloader will read the wp_pin field if SPI flash
     # pins are remapped via flash. IDF actually enables QIO only
@@ -1150,7 +1185,7 @@ ESP32C2ROM.BOOTLOADER_IMAGE = ESP32C2FirmwareImage
 class ESP32C6FirmwareImage(ESP32FirmwareImage):
     """ESP32C6 Firmware Image almost exactly the same as ESP32FirmwareImage"""
 
-    ROM_LOADER = ESP32C6ROM
+    ROM_LOADER: Type[ESPLoader] = ESP32C6ROM
     MMU_PAGE_SIZE_CONF = (8192, 16384, 32768, 65536)
 
 
@@ -1184,7 +1219,7 @@ class ESP32C5BETA3FirmwareImage(ESP32C6FirmwareImage):
 ESP32C5BETA3ROM.BOOTLOADER_IMAGE = ESP32C5BETA3FirmwareImage
 
 
-class ESP32H4FirmwareImage(ESP32FirmwareImage):
+class ESP32H4FirmwareImage(ESP32C6FirmwareImage):
     """ESP32H4 Firmware Image almost exactly the same as ESP32FirmwareImage"""
 
     ROM_LOADER = ESP32H4ROM
@@ -1221,14 +1256,6 @@ ESP32H21ROM.BOOTLOADER_IMAGE = ESP32H21FirmwareImage
 
 
 class ELFFile(object):
-    SEC_TYPE_PROGBITS = 0x01
-    SEC_TYPE_STRTAB = 0x03
-    SEC_TYPE_NOBITS = 0x08  # e.g. .bss section
-    SEC_TYPE_INITARRAY = 0x0E
-    SEC_TYPE_FINIARRAY = 0x0F
-
-    PROG_SEC_TYPES = (SEC_TYPE_PROGBITS, SEC_TYPE_INITARRAY, SEC_TYPE_FINIARRAY)
-
     LEN_SEC_HEADER = 0x28
 
     SEG_TYPE_LOAD = 0x01
@@ -1289,6 +1316,22 @@ class ELFFile(object):
         self._read_segments(f, _phoff, _phnum, shstrndx)
 
     def _read_sections(self, f, section_header_offs, section_header_count, shstrndx):
+        SEC_TYPE_PROGBITS = 0x01
+        SEC_TYPE_STRTAB = 0x03
+        SEC_TYPE_NOBITS = 0x08  # e.g. .bss section
+        SEC_TYPE_INITARRAY = 0x0E
+        SEC_TYPE_FINIARRAY = 0x0F
+        SEC_TYPE_PREINITARRAY = 0x10
+
+        PROG_SEC_TYPES = (
+            SEC_TYPE_PROGBITS,
+            SEC_TYPE_INITARRAY,
+            SEC_TYPE_FINIARRAY,
+            SEC_TYPE_PREINITARRAY,
+        )
+
+        KNOWN_SEC_TYPES = PROG_SEC_TYPES + (SEC_TYPE_NOBITS, SEC_TYPE_STRTAB)
+
         f.seek(section_header_offs)
         len_bytes = section_header_count * self.LEN_SEC_HEADER
         section_header = f.read(len_bytes)
@@ -1307,22 +1350,23 @@ class ELFFile(object):
         section_header_offsets = range(0, len(section_header), self.LEN_SEC_HEADER)
 
         def read_section_header(offs):
-            name_offs, sec_type, _flags, lma, sec_offs, size = struct.unpack_from(
-                "<LLLLLL", section_header[offs:]
-            )
+            (
+                name_offs,
+                sec_type,
+                _flags,
+                lma,
+                sec_offs,
+                size,
+            ) = struct.unpack_from("<LLLLLL", section_header[offs:])
             return (name_offs, sec_type, lma, size, sec_offs)
 
-        all_sections = [read_section_header(offs) for offs in section_header_offsets]
-        prog_sections = [s for s in all_sections if s[1] in ELFFile.PROG_SEC_TYPES]
-        nobits_secitons = [s for s in all_sections if s[1] == ELFFile.SEC_TYPE_NOBITS]
-
         # search for the string table section
         if (shstrndx * self.LEN_SEC_HEADER) not in section_header_offsets:
             raise FatalError("ELF file has no STRTAB section at shstrndx %d" % shstrndx)
         _, sec_type, _, sec_size, sec_offs = read_section_header(
             shstrndx * self.LEN_SEC_HEADER
         )
-        if sec_type != ELFFile.SEC_TYPE_STRTAB:
+        if sec_type != SEC_TYPE_STRTAB:
             print(
                 "WARNING: ELF file has incorrect STRTAB section type 0x%02x" % sec_type
             )
@@ -1340,17 +1384,38 @@ class ELFFile(object):
             f.seek(offs)
             return f.read(size)
 
-        prog_sections = [
-            ELFSection(lookup_string(n_offs), lma, read_data(offs, size))
-            for (n_offs, _type, lma, size, offs) in prog_sections
-            if lma != 0 and size > 0
-        ]
-        self.sections = prog_sections
-        self.nobits_sections = [
-            ELFSection(lookup_string(n_offs), lma, b"")
-            for (n_offs, _type, lma, size, offs) in nobits_secitons
-            if lma != 0 and size > 0
-        ]
+        all_sections = [read_section_header(offs) for offs in section_header_offsets]
+
+        self.sections = []
+        self.nobits_sections = []
+        # Process all sections and raise an error if an unknown section type is found
+        for section in all_sections:
+            n_offs, sec_type, lma, size, offs = section
+
+            # Skip sections with lma == 0 or size == 0
+            if lma == 0 or size == 0:
+                continue
+
+            if sec_type not in KNOWN_SEC_TYPES:
+                print(f"WARNING: Unknown section type {sec_type:#04x} in ELF file")
+                continue
+
+            if sec_type in PROG_SEC_TYPES:
+                self.sections.append(
+                    ELFSection(
+                        lookup_string(n_offs),
+                        lma,
+                        read_data(offs, size),
+                    )
+                )
+            elif sec_type == SEC_TYPE_NOBITS:
+                self.nobits_sections.append(
+                    ELFSection(
+                        lookup_string(n_offs),
+                        lma,
+                        b"",
+                    )
+                )
 
     def _read_segments(self, f, segment_header_offs, segment_header_count, shstrndx):
         f.seek(segment_header_offs)