esptool 4.11.dev1__tar.gz → 4.12.dev1__tar.gz

{esptool-4.11.dev1/esptool.egg-info → esptool-4.12.dev1}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: esptool
-Version: 4.11.dev1
+Version: 4.12.dev1
 Summary: A serial utility to communicate & flash code to Espressif chips.
 Author: Fredrik Ahlberg (themadinventor), Angus Gratton (projectgus), Espressif Systems
 License: GPLv2+

{esptool-4.11.dev1 → esptool-4.12.dev1}/espefuse/efuse_defs/esp32c5.yaml

@@ -3,65 +3,65 @@ EFUSES:
   WR_DIS                                    : {show: y, blk : 0, word: 0, pos : 0, len : 32, start  : 0, type : 'uint:32', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Disable programming of individual eFuses, rloc: EFUSE_RD_WR_DIS_REG, bloc: 'B0,B1,B2,B3'}
   RD_DIS                                    : {show: y, blk : 0, word: 1, pos : 0, len  : 7, start : 32, type  : 'uint:7', wr_dis   : 0, rd_dis: null, alt                            : '', dict             : '', desc: Disable reading from BlOCK4-10, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[6:0]', bloc: 'B4[6:0]'}
   BOOTLOADER_ANTI_ROLLBACK_SECURE_VERSION_HI: {show: y, blk : 0, word: 1, pos : 7, len  : 1, start : 39, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Represents the anti-rollback secure version of the 2nd stage bootloader used by the ROM bootloader (the high part of the field), rloc: 'EFUSE_RD_REPEAT_DATA0_REG[7]', bloc: 'B4[7]'}
-  DIS_ICACHE                                : {show: y, blk : 0, word: 1, pos : 8, len  : 1, start : 40, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether cache is disabled. 1: Disabled 0: Enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[8]', bloc: 'B5[0]'}
-  DIS_USB_JTAG                              : {show: y, blk : 0, word: 1, pos : 9, len  : 1, start : 41, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the USB-to-JTAG function in USB Serial/JTAG is disabled. Note that \hyperref[fielddesc:EFUSEDISUSBJTAG]{EFUSE\_DIS\_USB\_JTAG} is available only when \hyperref[fielddesc:EFUSEDISUSBSERIALJTAG]{EFUSE\_DIS\_USB\_SERIAL\_JTAG} is configured to 0. For more information; please refer to Chapter \ref{mod:bootctrl} \textit{\nameref{mod:bootctrl}}.1: Disabled0: Enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[9]', bloc: 'B5[1]'}
-  BOOTLOADER_ANTI_ROLLBACK_EN               : {show: y, blk : 0, word: 1, pos: 10, len  : 1, start : 42, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the ani-rollback check for the 2nd stage bootloader is enabled.1: Enabled0: Disabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[10]', bloc: 'B5[2]'}
-  DIS_USB_SERIAL_JTAG                       : {show: n, blk : 0, word: 1, pos: 11, len  : 1, start : 43, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether USB Serial/JTAG is disabled.1: Disabled0: Enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[11]', bloc: 'B5[3]'}
-  DIS_FORCE_DOWNLOAD                        : {show: y, blk : 0, word: 1, pos: 12, len  : 1, start : 44, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the function that forces chip into Download mode is disabled. 1: Disabled0: Enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[12]', bloc: 'B5[4]'}
-  SPI_DOWNLOAD_MSPI_DIS                     : {show: y, blk : 0, word: 1, pos: 13, len  : 1, start : 45, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether SPI0 controller during boot\_mode\_download is disabled.0: Enabled1: Disabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[13]', bloc: 'B5[5]'}
-  DIS_TWAI                                  : {show: y, blk : 0, word: 1, pos: 14, len  : 1, start : 46, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: "Represents whether TWAI$^\xAE$ function is disabled.1: Disabled0: Enabled", rloc: 'EFUSE_RD_REPEAT_DATA0_REG[14]', bloc: 'B5[6]'}
-  JTAG_SEL_ENABLE                           : {show: y, blk : 0, word: 1, pos: 15, len  : 1, start : 47, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the selection of a JTAG signal source through the strapping pin value is enabled when all of \hyperref[fielddesc:EFUSEDISPADJTAG]{EFUSE\_DIS\_PAD\_JTAG}; \hyperref[fielddesc:EFUSEDISUSBJTAG]{EFUSE\_DIS\_USB\_JTAG} and \hyperref[fielddesc:EFUSEDISUSBSERIALJTAG]{EFUSE\_DIS\_USB\_SERIAL\_JTAG} are configured to 0. For more information; please refer to Chapter \ref{mod:bootctrl} \textit{\nameref{mod:bootctrl}}.1: Enabled0: Disabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[15]', bloc: 'B5[7]'}
-  SOFT_DIS_JTAG                             : {show: y, blk : 0, word: 1, pos: 16, len  : 3, start : 48, type  : 'uint:3', wr_dis  : 31, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether PAD JTAG is disabled in the soft way. It can be restarted via HMAC. Odd count of bits with a value of 1: DisabledEven count of bits with a value of 1: Enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[18:16]', bloc: 'B6[2:0]'}
-  DIS_PAD_JTAG                              : {show: y, blk : 0, word: 1, pos: 19, len  : 1, start : 51, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether PAD JTAG is disabled in the hard way (permanently).1: Disabled0: Enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[19]', bloc: 'B6[3]'}
-  DIS_DOWNLOAD_MANUAL_ENCRYPT               : {show: y, blk : 0, word: 1, pos: 20, len  : 1, start : 52, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether flash encryption is disabled (except in SPI boot mode).1: Disabled0: Enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[20]', bloc: 'B6[4]'}
+  DIS_ICACHE                                : {show: y, blk : 0, word: 1, pos : 8, len  : 1, start : 40, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict: '{0: "Enabled", 1: "Disabled"}', desc: Represents whether cache is disabled, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[8]', bloc: 'B5[0]'}
+  DIS_USB_JTAG                              : {show: y, blk : 0, word: 1, pos : 9, len  : 1, start : 41, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict: '{0: "Enabled", 1: "Disabled"}', desc: 'Represents whether the USB-to-JTAG function in USB Serial/JTAG is disabled. Note that EFUSE_DIS_USB_JTAG is available only when EFUSE_DIS_USB_SERIAL_JTAG is configured to 0', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[9]', bloc: 'B5[1]'}
+  BOOTLOADER_ANTI_ROLLBACK_EN               : {show: y, blk : 0, word: 1, pos: 10, len  : 1, start : 42, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict: '{0: "Disabled", 1: "Enabled"}', desc: Represents whether the ani-rollback check for the 2nd stage bootloader is enabled, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[10]', bloc: 'B5[2]'}
+  DIS_USB_SERIAL_JTAG                       : {show: n, blk : 0, word: 1, pos: 11, len  : 1, start : 43, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict: '{0: "Enabled", 1: "Disabled"}', desc: Represents whether USB Serial/JTAG is disabled, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[11]', bloc: 'B5[3]'}
+  DIS_FORCE_DOWNLOAD                        : {show: y, blk : 0, word: 1, pos: 12, len  : 1, start : 44, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict: '{0: "Enabled", 1: "Disabled"}', desc: Represents whether the function that forces chip into Download mode is disabled, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[12]', bloc: 'B5[4]'}
+  SPI_DOWNLOAD_MSPI_DIS                     : {show: y, blk : 0, word: 1, pos: 13, len  : 1, start : 45, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict: '{0: "Enabled", 1: "Disabled"}', desc: Represents whether SPI0 controller during boot_mode_download is disabled, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[13]', bloc: 'B5[5]'}
+  DIS_TWAI                                  : {show: y, blk : 0, word: 1, pos: 14, len  : 1, start : 46, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict: '{0: "Enabled", 1: "Disabled"}', desc: Represents whether TWAI function is disabled, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[14]', bloc: 'B5[6]'}
+  JTAG_SEL_ENABLE                           : {show: y, blk : 0, word: 1, pos: 15, len  : 1, start : 47, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict: '{0: "Disabled", 1: "Enabled"}', desc: 'Represents whether the selection of a JTAG signal source through the strapping pin value is enabled when all of EFUSE_DIS_PAD_JTAG; EFUSE_DIS_USB_JTAG and EFUSE_DIS_USB_SERIAL_JTAG are configured to 0', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[15]', bloc: 'B5[7]'}
+  SOFT_DIS_JTAG                             : {show: y, blk : 0, word: 1, pos: 16, len  : 3, start : 48, type  : 'uint:3', wr_dis  : 31, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether PAD JTAG is disabled in the soft way. It can be restarted via HMAC. Odd count of bits with a value of 1: Disabled; Even count of bits with a value of 1: Enabled', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[18:16]', bloc: 'B6[2:0]'}
+  DIS_PAD_JTAG                              : {show: y, blk : 0, word: 1, pos: 19, len  : 1, start : 51, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict: '{0: "Enabled", 1: "Disabled"}', desc: Represents whether PAD JTAG is disabled in the hard way (permanently), rloc: 'EFUSE_RD_REPEAT_DATA0_REG[19]', bloc: 'B6[3]'}
+  DIS_DOWNLOAD_MANUAL_ENCRYPT               : {show: y, blk : 0, word: 1, pos: 20, len  : 1, start : 52, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict: '{0: "Enabled", 1: "Disabled"}', desc: Represents whether flash encryption is disabled (except in SPI boot mode), rloc: 'EFUSE_RD_REPEAT_DATA0_REG[20]', bloc: 'B6[4]'}
   USB_DREFH                                 : {show: n, blk : 0, word: 1, pos: 21, len  : 2, start : 53, type  : 'uint:2', wr_dis  : 30, rd_dis: null, alt                            : '', dict             : '', desc: Represents the single-end input threshold vrefh; 1.76 V to 2 V with step of 80 mV, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[22:21]', bloc: 'B6[6:5]'}
   USB_DREFL                                 : {show: n, blk : 0, word: 1, pos: 23, len  : 2, start : 55, type  : 'uint:2', wr_dis  : 30, rd_dis: null, alt                            : '', dict             : '', desc: Represents the single-end input threshold vrefl; 1.76 V to 2 V with step of 80 mV, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[24:23]', bloc: 'B6[7],B7[0]'}
-  USB_EXCHG_PINS                            : {show: y, blk : 0, word: 1, pos: 25, len  : 1, start : 57, type      : bool, wr_dis  : 30, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the D+ and D- pins is exchanged.1: Exchanged0: Not exchanged', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[25]', bloc: 'B7[1]'}
-  VDD_SPI_AS_GPIO                           : {show: y, blk : 0, word: 1, pos: 26, len  : 1, start : 58, type      : bool, wr_dis  : 30, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether VDD SPI pin is functioned as GPIO.1: Functioned0: Not functioned', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[26]', bloc: 'B7[2]'}
-  WDT_DELAY_SEL                             : {show: y, blk : 0, word: 1, pos: 27, len  : 2, start : 59, type  : 'uint:2', wr_dis   : 3, rd_dis: null, alt                            : '', dict             : '', desc: "Represents RTC watchdog timeout threshold.0: The originally configured STG0 threshold \xD7 21: The originally configured STG0 threshold \xD7 42: The originally configured STG0 threshold \xD7 83: The originally configured STG0 threshold \xD7 16", rloc: 'EFUSE_RD_REPEAT_DATA0_REG[28:27]', bloc: 'B7[4:3]'}
+  USB_EXCHG_PINS                            : {show: y, blk : 0, word: 1, pos: 25, len  : 1, start : 57, type      : bool, wr_dis  : 30, rd_dis: null, alt                            : '', dict: '{0: "Not exchanged", 1: "Exchanged"}', desc: Represents whether the D+ and D- pins is exchanged, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[25]', bloc: 'B7[1]'}
+  VDD_SPI_AS_GPIO                           : {show: y, blk : 0, word: 1, pos: 26, len  : 1, start : 58, type      : bool, wr_dis  : 30, rd_dis: null, alt                            : '', dict: '{0: "Not functioned", 1: "Functioned"}', desc: Represents whether VDD SPI pin is functioned as GPIO, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[26]', bloc: 'B7[2]'}
+  WDT_DELAY_SEL                             : {show: y, blk : 0, word: 1, pos: 27, len  : 2, start : 59, type  : 'uint:2', wr_dis   : 3, rd_dis: null, alt                            : '', dict             : '', desc: "Represents RTC watchdog timeout threshold. The originally configured STG0 threshold * (2 ^ (EFUSE_WDT_DELAY_SEL + 1))", rloc: 'EFUSE_RD_REPEAT_DATA0_REG[28:27]', bloc: 'B7[4:3]'}
   BOOTLOADER_ANTI_ROLLBACK_SECURE_VERSION_LO: {show: y, blk : 0, word: 1, pos: 29, len  : 3, start : 61, type  : 'uint:3', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Represents the anti-rollback secure version of the 2nd stage bootloader used by the ROM bootloader (the low part of the field), rloc: 'EFUSE_RD_REPEAT_DATA0_REG[31:29]', bloc: 'B7[7:5]'}
-  KM_DISABLE_DEPLOY_MODE                    : {show: y, blk : 0, word: 2, pos : 0, len  : 4, start : 64, type  : 'uint:4', wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the new key deployment of key manager is disabled. Bit0: Represents whether the new ECDSA key deployment is disabled0: Enabled1: DisabledBit1: Represents whether the new XTS-AES (flash and PSRAM) key deployment is disabled0: Enabled1: DisabledBit2: Represents whether the new HMAC key deployment is disabled0: Enabled1: DisabledBit3: Represents whether the new DS key deployment is disabled0: Enabled1: Disabled', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[3:0]', bloc: 'B8[3:0]'}
-  KM_RND_SWITCH_CYCLE                       : {show: y, blk : 0, word: 2, pos : 4, len  : 2, start : 68, type  : 'uint:2', wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents the cycle at which the Key Manager switches random numbers.0: Controlled by the \hyperref[fielddesc:KEYMNGRNDSWITCHCYCLE]{KEYMNG\_RND\_SWITCH\_CYCLE} register. For more information; please refer to Chapter \ref{mod:keymng} \textit{\nameref{mod:keymng}}1: 8 Key Manager clock cycles2: 16 Key Manager clock cycles3: 32 Key Manager clock cycles', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[5:4]', bloc: 'B8[5:4]'}
-  KM_DEPLOY_ONLY_ONCE                       : {show: y, blk : 0, word: 2, pos : 6, len  : 4, start : 70, type  : 'uint:4', wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the corresponding key can be deployed only once.Bit0: Represents whether the ECDSA key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit1: Represents whether the XTS-AES (flash and PSRAM) key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit2: Represents whether the HMAC key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit3: Represents whether the DS key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only once', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[9:6]', bloc: 'B8[7:6],B9[1:0]'}
-  FORCE_USE_KEY_MANAGER_KEY                 : {show: y, blk : 0, word: 2, pos: 10, len  : 4, start : 74, type  : 'uint:4', wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the corresponding key must come from Key Manager. Bit0: Represents whether the ECDSA key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit1: Represents whether the XTS-AES (flash and PSRAM) key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit2: Represents whether the HMAC key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit3: Represents whether the DS key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key Manager', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[13:10]', bloc: 'B9[5:2]'}
-  FORCE_DISABLE_SW_INIT_KEY                 : {show: y, blk : 0, word: 2, pos: 14, len  : 1, start : 78, type      : bool, wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether to disable the use of the initialization key written by software and instead force use efuse\_init\_key.0: Enable1: Disable', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[14]', bloc: 'B9[6]'}
-  BOOTLOADER_ANTI_ROLLBACK_UPDATE_IN_ROM    : {show: y, blk : 0, word: 2, pos: 15, len  : 1, start : 79, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the ani-rollback SECURE_VERSION will be updated from the ROM bootloader.1: Enable0: Disable', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[15]', bloc: 'B9[7]'}
+  KM_DISABLE_DEPLOY_MODE                    : {show: y, blk : 0, word: 2, pos : 0, len  : 4, start : 64, type  : 'uint:4', wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the new key deployment of key manager is disabled. Bit0: ECDSA key deployment (0: Enabled, 1: Disabled). Bit1: XTS-AES (flash and PSRAM) key deployment (0: Enabled, 1: Disabled). Bit2: HMAC key deployment (0: Enabled, 1: Disabled). Bit3: DS key deployment (0: Enabled, 1: Disabled)', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[3:0]', bloc: 'B8[3:0]'}
+  KM_RND_SWITCH_CYCLE                       : {show: y, blk : 0, word: 2, pos : 4, len  : 2, start : 68, type  : 'uint:2', wr_dis   : 1, rd_dis: null, alt                            : '', dict: '{0: "Controlled by the KEYMNG_RND_SWITCH_CYCLE register", 1: "8 Key Manager clock cycles", 2: "16 Key Manager clock cycles", 3: "32 Key Manager clock cycles"}', desc: Represents the cycle at which the Key Manager switches random numbers, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[5:4]', bloc: 'B8[5:4]'}
+  KM_DEPLOY_ONLY_ONCE                       : {show: y, blk : 0, word: 2, pos : 6, len  : 4, start : 70, type  : 'uint:4', wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the corresponding key can be deployed only once. Bit0: ECDSA key (0: Multiple times, 1: Only once). Bit1: XTS-AES (flash and PSRAM) key (0: Multiple times, 1: Only once). Bit2: HMAC key (0: Multiple times, 1: Only once). Bit3: DS key (0: Multiple times, 1: Only once)', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[9:6]', bloc: 'B8[7:6],B9[1:0]'}
+  FORCE_USE_KEY_MANAGER_KEY                 : {show: y, blk : 0, word: 2, pos: 10, len  : 4, start : 74, type  : 'uint:4', wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the corresponding key must come from Key Manager. Bit0: ECDSA key (0: Not required, 1: Required). Bit1: XTS-AES (flash and PSRAM) key (0: Not required, 1: Required). Bit2: HMAC key (0: Not required, 1: Required). Bit3: DS key (0: Not required, 1: Required)', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[13:10]', bloc: 'B9[5:2]'}
+  FORCE_DISABLE_SW_INIT_KEY                 : {show: y, blk : 0, word: 2, pos: 14, len  : 1, start : 78, type      : bool, wr_dis   : 1, rd_dis: null, alt                            : '', dict: '{0: "Enable", 1: "Disable"}', desc: Represents whether to disable the use of the initialization key written by software and instead force use efuse_init_key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[14]', bloc: 'B9[6]'}
+  BOOTLOADER_ANTI_ROLLBACK_UPDATE_IN_ROM    : {show: y, blk : 0, word: 2, pos: 15, len  : 1, start : 79, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict: '{0: "Disable", 1: "Enable"}', desc: Represents whether the ani-rollback SECURE_VERSION will be updated from the ROM bootloader, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[15]', bloc: 'B9[7]'}
   SPI_BOOT_CRYPT_CNT                        : {show: y, blk : 0, word: 2, pos: 16, len  : 3, start : 80, type  : 'uint:3', wr_dis   : 4, rd_dis: null, alt                            : '', dict: '{0: "Disable", 1: "Enable", 3: "Disable", 7: "Enable"}', desc: Enables flash encryption when 1 or 3 bits are set and disables otherwise, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[18:16]', bloc: 'B10[2:0]'}
   SECURE_BOOT_KEY_REVOKE0                   : {show: y, blk : 0, word: 2, pos: 19, len  : 1, start : 83, type      : bool, wr_dis   : 5, rd_dis: null, alt                            : '', dict             : '', desc: Revoke 1st secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[19]', bloc: 'B10[3]'}
   SECURE_BOOT_KEY_REVOKE1                   : {show: y, blk : 0, word: 2, pos: 20, len  : 1, start : 84, type      : bool, wr_dis   : 6, rd_dis: null, alt                            : '', dict             : '', desc: Revoke 2nd secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[20]', bloc: 'B10[4]'}
   SECURE_BOOT_KEY_REVOKE2                   : {show: y, blk : 0, word: 2, pos: 21, len  : 1, start : 85, type      : bool, wr_dis   : 7, rd_dis: null, alt                            : '', dict             : '', desc: Revoke 3rd secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[21]', bloc: 'B10[5]'}
-  KEY_PURPOSE_0                             : {show: y, blk : 0, word: 2, pos: 22, len  : 5, start : 86, type  : 'uint:5', wr_dis   : 8, rd_dis: null, alt                  : KEY0_PURPOSE, dict             : '', desc: 'Represents the purpose of Key0. See Table \ref{tab:efuse-key-purpose}', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[26:22]', bloc: 'B10[7:6],B11[2:0]'}
-  KEY_PURPOSE_1                             : {show: y, blk : 0, word: 2, pos: 27, len  : 5, start : 91, type  : 'uint:5', wr_dis   : 9, rd_dis: null, alt                  : KEY1_PURPOSE, dict             : '', desc: 'Represents the purpose of Key1. See Table \ref{tab:efuse-key-purpose}', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[31:27]', bloc: 'B11[7:3]'}
-  KEY_PURPOSE_2                             : {show: y, blk : 0, word: 3, pos : 0, len  : 5, start : 96, type  : 'uint:5', wr_dis  : 10, rd_dis: null, alt                  : KEY2_PURPOSE, dict             : '', desc: 'Represents the purpose of Key2. See Table \ref{tab:efuse-key-purpose}', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[4:0]', bloc: 'B12[4:0]'}
-  KEY_PURPOSE_3                             : {show: y, blk : 0, word: 3, pos : 5, len  : 5, start: 101, type  : 'uint:5', wr_dis  : 11, rd_dis: null, alt                  : KEY3_PURPOSE, dict             : '', desc: 'Represents the purpose of Key3. See Table \ref{tab:efuse-key-purpose}', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[9:5]', bloc: 'B12[7:5],B13[1:0]'}
-  KEY_PURPOSE_4                             : {show: y, blk : 0, word: 3, pos: 10, len  : 5, start: 106, type  : 'uint:5', wr_dis  : 12, rd_dis: null, alt                  : KEY4_PURPOSE, dict             : '', desc: 'Represents the purpose of Key4. See Table \ref{tab:efuse-key-purpose}', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[14:10]', bloc: 'B13[6:2]'}
-  KEY_PURPOSE_5                             : {show: y, blk : 0, word: 3, pos: 15, len  : 5, start: 111, type  : 'uint:5', wr_dis  : 13, rd_dis: null, alt                  : KEY5_PURPOSE, dict             : '', desc: 'Represents the purpose of Key5. See Table \ref{tab:efuse-key-purpose}', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[19:15]', bloc: 'B13[7],B14[3:0]'}
-  SEC_DPA_LEVEL                             : {show: y, blk : 0, word: 3, pos: 20, len  : 2, start: 116, type  : 'uint:2', wr_dis  : 14, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents the security level of anti-DPA attack. The level is adjusted by configuring the clock random frequency division mode.0: Security level is SEC\_DPA\_OFF1: Security level is SEC\_DPA\_LOW2: Security level is SEC\_DPA\_MIDDLE3: Security level is SEC\_DPA\_HIGHFor more information; please refer to Chapter \ref{mod:sysreg} \textit{\nameref{mod:sysreg}} > Section \ref{sec:sysreg-anti-dpa-attack-security-control} \textit{\nameref{sec:sysreg-anti-dpa-attack-security-control}}.', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[21:20]', bloc: 'B14[5:4]'}
+  KEY_PURPOSE_0                             : {show: y, blk : 0, word: 2, pos: 22, len  : 5, start : 86, type  : 'uint:5', wr_dis   : 8, rd_dis: null, alt                  : KEY0_PURPOSE, dict             : '', desc: 'Represents the purpose of Key0.', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[26:22]', bloc: 'B10[7:6],B11[2:0]'}
+  KEY_PURPOSE_1                             : {show: y, blk : 0, word: 2, pos: 27, len  : 5, start : 91, type  : 'uint:5', wr_dis   : 9, rd_dis: null, alt                  : KEY1_PURPOSE, dict             : '', desc: 'Represents the purpose of Key1.', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[31:27]', bloc: 'B11[7:3]'}
+  KEY_PURPOSE_2                             : {show: y, blk : 0, word: 3, pos : 0, len  : 5, start : 96, type  : 'uint:5', wr_dis  : 10, rd_dis: null, alt                  : KEY2_PURPOSE, dict             : '', desc: 'Represents the purpose of Key2.', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[4:0]', bloc: 'B12[4:0]'}
+  KEY_PURPOSE_3                             : {show: y, blk : 0, word: 3, pos : 5, len  : 5, start: 101, type  : 'uint:5', wr_dis  : 11, rd_dis: null, alt                  : KEY3_PURPOSE, dict             : '', desc: 'Represents the purpose of Key3.', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[9:5]', bloc: 'B12[7:5],B13[1:0]'}
+  KEY_PURPOSE_4                             : {show: y, blk : 0, word: 3, pos: 10, len  : 5, start: 106, type  : 'uint:5', wr_dis  : 12, rd_dis: null, alt                  : KEY4_PURPOSE, dict             : '', desc: 'Represents the purpose of Key4.', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[14:10]', bloc: 'B13[6:2]'}
+  KEY_PURPOSE_5                             : {show: y, blk : 0, word: 3, pos: 15, len  : 5, start: 111, type  : 'uint:5', wr_dis  : 13, rd_dis: null, alt                  : KEY5_PURPOSE, dict             : '', desc: 'Represents the purpose of Key5.', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[19:15]', bloc: 'B13[7],B14[3:0]'}
+  SEC_DPA_LEVEL                             : {show: y, blk : 0, word: 3, pos: 20, len  : 2, start: 116, type  : 'uint:2', wr_dis  : 14, rd_dis: null, alt                            : '', dict: '{0: "SEC_DPA_OFF", 1: "SEC_DPA_LOW", 2: "SEC_DPA_MIDDLE", 3: "SEC_DPA_HIGH"}', desc: Represents the security level of anti-DPA attack. The level is adjusted by configuring the clock random frequency division mode, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[21:20]', bloc: 'B14[5:4]'}
   RECOVERY_BOOTLOADER_FLASH_SECTOR_HI       : {show: y, blk : 0, word: 3, pos: 22, len  : 3, start: 118, type  : 'uint:3', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled. (The high part of the field), rloc: 'EFUSE_RD_REPEAT_DATA2_REG[24:22]', bloc: 'B14[7:6],B15[0]'}
-  SECURE_BOOT_EN                            : {show: y, blk : 0, word: 3, pos: 25, len  : 1, start: 121, type      : bool, wr_dis  : 15, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether Secure Boot is enabled.1: Enabled0: Disabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[25]', bloc: 'B15[1]'}
-  SECURE_BOOT_AGGRESSIVE_REVOKE             : {show: y, blk : 0, word: 3, pos: 26, len  : 1, start: 122, type      : bool, wr_dis  : 16, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether aggressive revocation of Secure Boot is enabled.1: Enabled0: Disabled', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[26]', bloc: 'B15[2]'}
-  KM_XTS_KEY_LENGTH_256                     : {show: y, blk : 0, word: 3, pos: 27, len  : 1, start: 123, type      : bool, wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents which key flash encryption uses.0: XTS-AES-256 key1: XTS-AES-128 key', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[27]', bloc: 'B15[3]'}
+  SECURE_BOOT_EN                            : {show: y, blk : 0, word: 3, pos: 25, len  : 1, start: 121, type      : bool, wr_dis  : 15, rd_dis: null, alt                            : '', dict: '{0: "Disabled", 1: "Enabled"}', desc: Represents whether Secure Boot is enabled, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[25]', bloc: 'B15[1]'}
+  SECURE_BOOT_AGGRESSIVE_REVOKE             : {show: y, blk : 0, word: 3, pos: 26, len  : 1, start: 122, type      : bool, wr_dis  : 16, rd_dis: null, alt                            : '', dict: '{0: "Disabled", 1: "Enabled"}', desc: Represents whether aggressive revocation of Secure Boot is enabled, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[26]', bloc: 'B15[2]'}
+  KM_XTS_KEY_LENGTH_256                     : {show: y, blk : 0, word: 3, pos: 27, len  : 1, start: 123, type      : bool, wr_dis   : 1, rd_dis: null, alt                            : '', dict: '{0: "XTS-AES-256 key", 1: "XTS-AES-128 key"}', desc: Represents which key flash encryption uses, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[27]', bloc: 'B15[3]'}
   FLASH_TPUW                                : {show: y, blk : 0, word: 3, pos: 28, len  : 4, start: 124, type  : 'uint:4', wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents the flash waiting time after power-up. Measurement unit: ms. When the value is less than 15; the waiting time is the programmed value. Otherwise; the waiting time is a fixed value; i.e. 30 ms', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[31:28]', bloc: 'B15[7:4]'}
-  DIS_DOWNLOAD_MODE                         : {show: y, blk : 0, word: 4, pos : 0, len  : 1, start: 128, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether Download mode is disable or enable. 1. Disable 0: Enable', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[0]', bloc: 'B16[0]'}
-  DIS_DIRECT_BOOT                           : {show: y, blk : 0, word: 4, pos : 1, len  : 1, start: 129, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether direct boot mode is disabled or enabled. 1. Disable 0: Enable', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[1]', bloc: 'B16[1]'}
-  DIS_USB_SERIAL_JTAG_ROM_PRINT             : {show: y, blk : 0, word: 4, pos : 2, len  : 1, start: 130, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether print from USB-Serial-JTAG is disabled or enabled. 1. Disable 0: Enable', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[2]', bloc: 'B16[2]'}
-  LOCK_KM_KEY                               : {show: y, blk : 0, word: 4, pos : 3, len  : 1, start: 131, type      : bool, wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the keys in the Key Manager are locked after deployment.0: Not locked1: Locked', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[3]', bloc: 'B16[3]'}
-  DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE         : {show: y, blk : 0, word: 4, pos : 4, len  : 1, start: 132, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: Disable 0: Enable', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[4]', bloc: 'B16[4]'}
-  ENABLE_SECURITY_DOWNLOAD                  : {show: y, blk : 0, word: 4, pos : 5, len  : 1, start: 133, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether security download is enabled. Only downloading into flash is supported. Reading/writing RAM or registers is not supported (i.e. stub download is not supported).1: Enabled0: Disabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[5]', bloc: 'B16[5]'}
-  UART_PRINT_CONTROL                        : {show: y, blk : 0, word: 4, pos : 6, len  : 2, start: 134, type  : 'uint:2', wr_dis  : 18, rd_dis: null, alt                            : '', dict: '{0: "Enable", 1: "Enable when GPIO8 is low at reset", 2: "Enable when GPIO8 is high at reset", 3: "Disable"}', desc: Set the default UARTboot message output mode, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[7:6]', bloc: 'B16[7:6]'}
-  FORCE_SEND_RESUME                         : {show: y, blk : 0, word: 4, pos : 8, len  : 1, start: 136, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether ROM code is forced to send a resume command during SPI boot.1: Forced. 0: Not forced.', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[8]', bloc: 'B17[0]'}
+  DIS_DOWNLOAD_MODE                         : {show: y, blk : 0, word: 4, pos : 0, len  : 1, start: 128, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict: '{0: "Enable", 1: "Disable"}', desc: Represents whether Download mode is disable or enable, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[0]', bloc: 'B16[0]'}
+  DIS_DIRECT_BOOT                           : {show: y, blk : 0, word: 4, pos : 1, len  : 1, start: 129, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict: '{0: "Enable", 1: "Disable"}', desc: Represents whether direct boot mode is disabled or enabled, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[1]', bloc: 'B16[1]'}
+  DIS_USB_SERIAL_JTAG_ROM_PRINT             : {show: y, blk : 0, word: 4, pos : 2, len  : 1, start: 130, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict: '{0: "Enable", 1: "Disable"}', desc: Represents whether print from USB-Serial-JTAG is disabled or enabled, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[2]', bloc: 'B16[2]'}
+  LOCK_KM_KEY                               : {show: y, blk : 0, word: 4, pos : 3, len  : 1, start: 131, type      : bool, wr_dis   : 1, rd_dis: null, alt                            : '', dict: '{0: "Not locked", 1: "Locked"}', desc: Represents whether the keys in the Key Manager are locked after deployment, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[3]', bloc: 'B16[3]'}
+  DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE         : {show: y, blk : 0, word: 4, pos : 4, len  : 1, start: 132, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict: '{0: "Enable", 1: "Disable"}', desc: Represents whether the USB-Serial-JTAG download function is disabled or enabled, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[4]', bloc: 'B16[4]'}
+  ENABLE_SECURITY_DOWNLOAD                  : {show: y, blk : 0, word: 4, pos : 5, len  : 1, start: 133, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict: '{0: "Disabled", 1: "Enabled"}', desc: 'Represents whether security download is enabled. Only downloading into flash is supported. Reading/writing RAM or registers is not supported (i.e. stub download is not supported)', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[5]', bloc: 'B16[5]'}
+  UART_PRINT_CONTROL                        : {show: y, blk : 0, word: 4, pos : 6, len  : 2, start: 134, type  : 'uint:2', wr_dis  : 18, rd_dis: null, alt                            : '', dict: '{0: "Enable", 1: "Enable when GPIO8 is low at reset", 2: "Enable when GPIO8 is high at reset", 3: "Disable"}', desc: Set the default UART boot message output mode, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[7:6]', bloc: 'B16[7:6]'}
+  FORCE_SEND_RESUME                         : {show: y, blk : 0, word: 4, pos : 8, len  : 1, start: 136, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict: '{0: "Not forced", 1: "Forced"}', desc: Represents whether ROM code is forced to send a resume command during SPI boot, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[8]', bloc: 'B17[0]'}
   SECURE_VERSION                            : {show: y, blk : 0, word: 4, pos : 9, len  : 9, start: 137, type  : 'uint:9', wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: Represents the app secure version used by ESP-IDF anti-rollback feature, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[17:9]', bloc: 'B17[7:1],B18[1:0]'}
   RESERVE_0_146                             : {show: n, blk : 0, word: 4, pos: 18, len  : 7, start: 146, type  : 'uint:7', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[24:18]', bloc: 'B18[7:2],B19[0]'}
-  SECURE_BOOT_DISABLE_FAST_WAKE             : {show: y, blk : 0, word: 4, pos: 25, len  : 1, start: 153, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether FAST VERIFY ON WAKE is disabled when Secure Boot is enabled.1: Disabled0: Enabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[25]', bloc: 'B19[1]'}
-  HYS_EN_PAD                                : {show: y, blk : 0, word: 4, pos: 26, len  : 1, start: 154, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: "Represents whether the hysteresis function of PAD0 \u2013 PAD27 is enabled.1: Enabled0: Disabled", rloc: 'EFUSE_RD_REPEAT_DATA3_REG[26]', bloc: 'B19[2]'}
-  XTS_DPA_PSEUDO_LEVEL                      : {show: y, blk : 0, word: 4, pos: 27, len  : 2, start: 155, type  : 'uint:2', wr_dis  : 14, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents the pseudo round level of XTS-AES anti-DPA attack.0: Disabled1: Low2: Moderate3: High', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[28:27]', bloc: 'B19[4:3]'}
-  XTS_DPA_CLK_ENABLE                        : {show: y, blk : 0, word: 4, pos: 29, len  : 1, start: 157, type      : bool, wr_dis  : 14, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether XTS-AES anti-DPA attack clock is enabled.0: Disable1: Enabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[29]', bloc: 'B19[5]'}
+  SECURE_BOOT_DISABLE_FAST_WAKE             : {show: y, blk : 0, word: 4, pos: 25, len  : 1, start: 153, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict: '{0: "Enabled", 1: "Disabled"}', desc: Represents whether FAST VERIFY ON WAKE is disabled when Secure Boot is enabled, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[25]', bloc: 'B19[1]'}
+  HYS_EN_PAD                                : {show: y, blk : 0, word: 4, pos: 26, len  : 1, start: 154, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict: '{0: "Disabled", 1: "Enabled"}', desc: Represents whether the hysteresis function of PAD0 - PAD27 is enabled, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[26]', bloc: 'B19[2]'}
+  XTS_DPA_PSEUDO_LEVEL                      : {show: y, blk : 0, word: 4, pos: 27, len  : 2, start: 155, type  : 'uint:2', wr_dis  : 14, rd_dis: null, alt                            : '', dict: '{0: "Disabled", 1: "Low", 2: "Moderate", 3: "High"}', desc: Represents the pseudo round level of XTS-AES anti-DPA attack, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[28:27]', bloc: 'B19[4:3]'}
+  XTS_DPA_CLK_ENABLE                        : {show: y, blk : 0, word: 4, pos: 29, len  : 1, start: 157, type      : bool, wr_dis  : 14, rd_dis: null, alt                            : '', dict: '{0: "Disable", 1: "Enabled"}', desc: Represents whether XTS-AES anti-DPA attack clock is enabled, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[29]', bloc: 'B19[5]'}
   RESERVE_0_158                             : {show: n, blk : 0, word: 4, pos: 30, len  : 1, start: 158, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[30]', bloc: 'B19[6]'}
   SECURE_BOOT_SHA384_EN                     : {show: y, blk : 0, word: 4, pos: 31, len  : 1, start: 159, type      : bool, wr_dis  : 14, rd_dis: null, alt                            : '', dict             : '', desc: Represents if the chip supports Secure Boot using SHA-384, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[31]', bloc: 'B19[7]'}
-  HUK_GEN_STATE                             : {show: y, blk : 0, word: 5, pos : 0, len  : 9, start: 160, type  : 'uint:9', wr_dis  : 19, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the HUK generate mode is valid.Odd count of bits with a value of 1: InvalidEven count of bits with a value of 1: Valid', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[8:0]', bloc: 'B20,B21[0]'}
-  XTAL_48M_SEL                              : {show: y, blk : 0, word: 5, pos : 9, len  : 3, start: 169, type  : 'uint:3', wr_dis  : 17, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether XTAL frequency is 48MHz or not. If not; 40MHz XTAL will be used. If this field contains Odd number bit 1: Enable 48MHz XTAL\ Even number bit 1: Enable 40MHz XTAL', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[11:9]', bloc: 'B21[3:1]'}
-  XTAL_48M_SEL_MODE                         : {show: y, blk : 0, word: 5, pos: 12, len  : 1, start: 172, type      : bool, wr_dis  : 17, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents what determines the XTAL frequency in \textbf{Joint Download Boot} mode.  For more information; please refer to Chapter \ref{mod:bootctrl} \textit{\nameref{mod:bootctrl}}.0: Strapping PAD state1: \hyperref[fielddesc:EFUSEXTAL48MSEL]{EFUSE\_XTAL\_48M\_SEL} in eFuse', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[12]', bloc: 'B21[4]'}
-  ECC_FORCE_CONST_TIME                      : {show: y, blk : 0, word: 5, pos: 13, len  : 1, start: 173, type      : bool, wr_dis  : 14, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether to force ECC to use constant-time mode for point multiplication calculation. 0: Not force1: Force', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[13]', bloc: 'B21[5]'}
+  HUK_GEN_STATE                             : {show: y, blk : 0, word: 5, pos : 0, len  : 9, start: 160, type  : 'uint:9', wr_dis  : 19, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether the HUK generate mode is valid. Odd count of bits with a value of 1: Invalid; Even count of bits with a value of 1: Valid', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[8:0]', bloc: 'B20,B21[0]'}
+  XTAL_48M_SEL                              : {show: y, blk : 0, word: 5, pos : 9, len  : 3, start: 169, type  : 'uint:3', wr_dis  : 17, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether XTAL frequency is 48MHz or not. If not; 40MHz XTAL will be used. If this field contains Odd number bit 1: Enable 48MHz XTAL; Even number bit 1: Enable 40MHz XTAL', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[11:9]', bloc: 'B21[3:1]'}
+  XTAL_48M_SEL_MODE                         : {show: y, blk : 0, word: 5, pos: 12, len  : 1, start: 172, type      : bool, wr_dis  : 17, rd_dis: null, alt                            : '', dict: '{0: "Strapping PAD state", 1: "EFUSE_XTAL_48M_SEL in eFuse"}', desc: Represents what determines the XTAL frequency in Joint Download Boot mode, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[12]', bloc: 'B21[4]'}
+  ECC_FORCE_CONST_TIME                      : {show: y, blk : 0, word: 5, pos: 13, len  : 1, start: 173, type      : bool, wr_dis  : 14, rd_dis: null, alt                            : '', dict: '{0: "Not force", 1: "Force"}', desc: Represents whether to force ECC to use constant-time mode for point multiplication calculation, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[13]', bloc: 'B21[5]'}
   RECOVERY_BOOTLOADER_FLASH_SECTOR_LO       : {show: y, blk : 0, word: 5, pos: 14, len  : 9, start: 174, type  : 'uint:9', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled. (The low part of the field), rloc: 'EFUSE_RD_REPEAT_DATA4_REG[22:14]', bloc: 'B21[7:6],B22[6:0]'}
   RESERVE_0_183                             : {show: n, blk : 0, word: 5, pos: 23, len  : 9, start: 183, type  : 'uint:9', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[31:23]', bloc: 'B22[7],B23'}
   MAC                                       : {show: y, blk : 1, word: 0, pos : 0, len : 48, start  : 0, type : 'bytes:6', wr_dis  : 20, rd_dis: null, alt                   : MAC_FACTORY, dict             : '', desc: MAC address, rloc: EFUSE_RD_MAC_SYS0_REG, bloc: 'B0,B1,B2,B3,B4,B5'}

{esptool-4.11.dev1 → esptool-4.12.dev1}/esptool/__init__.py

@@ -29,7 +29,7 @@ __all__ = [
     "write_mem",
 ]
 
-__version__ = "4.11.dev1"
+__version__ = "4.12.dev1"
 
 import argparse
 import inspect
@@ -1012,6 +1012,22 @@ def main(argv=None, esp=None):
             except FatalError as e:
                 esp.trace(f"Unable to perform XMC flash chip startup sequence ({e}).")
 
+        if not esp.secure_download_mode:
+            try:
+                """
+                The flash state in the application has become increasingly complex,
+                which can cause the ROM to run with residual states when reflashing
+                after the application has been running. Since the ROM code is very
+                simple and does not have the capability to handle these states,
+                this adds a reset mechanism to the flash to cleanly reset its state,
+                allowing the ROM to boot successfully (e.g. 120M boot up).
+                """
+                esp.run_spiflash_command(0x66)  # Reset enable
+                esp.run_spiflash_command(0x99)  # Reset
+                time.sleep(0.001)
+            except FatalError as e:
+                esp.trace(f"Unable to reset flash chip ({e}).")
+
         if hasattr(args, "flash_size"):
             print("Configuring flash size...")
             if args.flash_size == "detect":

{esptool-4.11.dev1 → esptool-4.12.dev1}/esptool/targets/esp32c5.py

@@ -118,6 +118,15 @@ class ESP32C5ROM(ESP32C6ROM):
         minor_rev = self.get_minor_chip_version()
         return f"{chip_name} (revision v{major_rev}.{minor_rev})"
 
+    def get_chip_features(self):
+        return [
+            "Wi-Fi 6 (dual-band)",
+            "BT 5 (LE)",
+            "IEEE802.15.4",
+            "Single Core + LP Core",
+            "240MHz",
+        ]
+
     def get_crystal_freq(self):
         # The crystal detection algorithm of ESP32/ESP8266
         # works for ESP32-C5 as well.

{esptool-4.11.dev1 → esptool-4.12.dev1}/esptool/targets/esp32p4.py

@@ -9,7 +9,7 @@ from typing import Dict
 
 from .esp32 import ESP32ROM
 from ..loader import ESPLoader
-from ..util import FatalError, NotImplementedInROMError
+from ..util import FatalError, NotImplementedInROMError, NotSupportedError
 
 
 class ESP32P4ROM(ESP32ROM):
@@ -80,6 +80,18 @@ class ESP32P4ROM(ESP32ROM):
 
     FLASH_ENCRYPTED_WRITE_ALIGN = 16
 
+    # Flash power-on related registers and bits needed for ECO6
+    DR_REG_LPAON_BASE = 0x50110000
+    DR_REG_PMU_BASE = DR_REG_LPAON_BASE + 0x5000
+    DR_REG_LP_SYS_BASE = DR_REG_LPAON_BASE + 0x0
+    LP_SYSTEM_REG_ANA_XPD_PAD_GROUP_REG = DR_REG_LP_SYS_BASE + 0x10C
+    PMU_EXT_LDO_P0_0P1A_ANA_REG = DR_REG_PMU_BASE + 0x1BC
+    PMU_ANA_0P1A_EN_CUR_LIM_0 = 1 << 27
+    PMU_EXT_LDO_P0_0P1A_REG = DR_REG_PMU_BASE + 0x1B8
+    PMU_0P1A_TARGET0_0 = 0xFF << 23
+    PMU_0P1A_FORCE_TIEH_SEL_0 = 1 << 7
+    PMU_DATE_REG = DR_REG_PMU_BASE + 0x3FC
+
     @property
     def UARTDEV_BUF_NO(self):
         """Variable .bss.UartDev.buff_uart_no in ROM .bss
@@ -230,6 +242,8 @@ class ESP32P4ROM(ESP32ROM):
             self.ESP_RAM_BLOCK = self.USB_RAM_BLOCK
         if not self.sync_stub_detected:  # Don't run if stub is reused
             self.disable_watchdogs()
+        if not self.secure_download_mode:
+            self.power_on_flash()  # Needs to be powered on before attach_flash()
 
     def uses_usb_otg(self):
         """
@@ -290,6 +304,54 @@ class ESP32P4ROM(ESP32ROM):
         else:
             ESPLoader.hard_reset(self)
 
+    def power_on_flash(self):
+        """Power on the flash chip by setting the appropriate regs."""
+        if self.secure_download_mode:
+            raise NotSupportedError(self, "Powering on flash in secure download mode")
+
+        if self.get_chip_revision() != 301:  # !=ECO6
+            # The flash chip is powered off by default on ECO6, when the default flash
+            # voltage changed from 1.8V to 3.3V. This is to prevent damage to 1.8V flash
+            # chips. Board designers must set the appropriate voltage level in eFuse.
+            return
+
+        # Power up pad group
+        self.write_reg(self.LP_SYSTEM_REG_ANA_XPD_PAD_GROUP_REG, 1)
+        sleep(0.01)
+        # Flash power up sequence
+        self.write_reg(
+            self.PMU_EXT_LDO_P0_0P1A_ANA_REG,
+            self.read_reg(self.PMU_EXT_LDO_P0_0P1A_ANA_REG)
+            | self.PMU_ANA_0P1A_EN_CUR_LIM_0,
+        )
+        self.write_reg(
+            self.PMU_EXT_LDO_P0_0P1A_REG,
+            self.read_reg(self.PMU_EXT_LDO_P0_0P1A_REG)
+            | self.PMU_0P1A_FORCE_TIEH_SEL_0,
+        )
+        self.write_reg(self.PMU_DATE_REG, self.read_reg(self.PMU_DATE_REG) | (3 << 0))
+        sleep(0.00005)
+        self.write_reg(
+            self.PMU_EXT_LDO_P0_0P1A_ANA_REG,
+            self.read_reg(self.PMU_EXT_LDO_P0_0P1A_ANA_REG)
+            & ~self.PMU_ANA_0P1A_EN_CUR_LIM_0,
+        )
+        self.write_reg(
+            self.PMU_EXT_LDO_P0_0P1A_REG,
+            self.read_reg(self.PMU_EXT_LDO_P0_0P1A_REG) & ~self.PMU_0P1A_TARGET0_0,
+        )
+        # Update eFuse voltage to PMU
+        self.write_reg(
+            self.PMU_EXT_LDO_P0_0P1A_REG,
+            self.read_reg(self.PMU_EXT_LDO_P0_0P1A_REG) | 0x80,
+        )
+        self.write_reg(
+            self.PMU_EXT_LDO_P0_0P1A_REG,
+            self.read_reg(self.PMU_EXT_LDO_P0_0P1A_REG)
+            & ~self.PMU_0P1A_FORCE_TIEH_SEL_0,
+        )
+        sleep(0.0018)
+
 
 class ESP32P4StubLoader(ESP32P4ROM):
     """Access class for ESP32P4 stub loader, runs on top of ROM.

{esptool-4.11.dev1 → esptool-4.12.dev1}/esptool/targets/stub_flasher/1/README.md

@@ -1,3 +1,3 @@
 # Licensing
 
-The binaries in JSON format distributed in this directory are released as Free Software under GNU General Public License Version 2 or later. They were released at https://github.com/espressif/esptool-legacy-flasher-stub/releases/tag/v1.8.0 from where the sources can be obtained.
+The binaries in JSON format distributed in this directory are released as Free Software under GNU General Public License Version 2 or later. They were released at https://github.com/espressif/esptool-legacy-flasher-stub/releases/tag/v1.11.1 from where the sources can be obtained.

esptool-4.12.dev1/esptool/targets/stub_flasher/1/esp32.json

@@ -0,0 +1,8 @@
+{
+    "entry": 1074521688,
+    "text": "CAD0PxwA9D8AAPQ/AMD8PxAA9D82QQCB+v9R+v/AIABoCMAgAHIlAHBwdJzXQfb/gff/wCAAqASCKAByx/+goHTgCABWh/7G9f8AAIHx/8AgAGkIHfAAAKTr/T8ca/0/XKv9P6jr/T+c6/0/oOv9PzZBALH5/yCgdBARIOXPAJbaBJH6/4H4/8AgALgIwCAAghkAgID0G8jAIADCWQCKi8AgAKJIAMAgAIIZAJKgQICA9JLZQJeYR5Hs/4Ho/8AgAMgJoej/seb/h5wYBgIAAHzohxrixgkAwCAAiQrAIAC5CUYCAMAgALkKwCAAiQmSoYSS2X+aiJKgAMAgAJJYAB3wAAD4IPQ/+DD0PzZBAJH9/8AgAIgJgIAkVkj/kfr/wCAAiAmAgCRWSP8d8AAAABAg9D8AIPQ/NkEAEBEg5fz/gfv/DAnAIACZCAwakfn/UKoBwCAAqQnAIACoCVZ6/8AgACgIfPiAIjAgIAQd8AA2QQAQESAl/P8Wav+B7v8MGSCZAcAgAJkIwCAAmAhWef8d8AAMQP0/BCD0PzZBAGH9/1hGFoUGEBEg5fj/FvoFDPhyoABXqAtyJgJwcDRw90BwdUEQESCl+v8QESDl8/+YJgwaQIkRgKoBjDcMGpCqAbHt/4CIEYCIQcAgAIkLgdH/wCAAomgAwCAAqAhWev8MGBwKcIqTgFXAiplZRpkmHfAAACySAEA2QQCioMCB/f/gCAAd8AAANkEAgqDArQKHkhGioNuB9//gCACioNxGBAAAAACCoNuHkgiB8v/gCACioN2B8P/gCAAd8DZBADoyxgIAAKICABsiEBEgpfv/N5LxHfAAAAB82gVA2C4GQJzaBUAc2wVANiEhotEQDBaB+v/gCABAZhGGCQAAYHNjzQe9Aa0CgfX/4AgAoKB0/ErNB70BotEQgfL/4AgAeiJwM8BWY/1cgzLTEDoxstEQrQOB7P/gCAAcC60DEBEg5ff/DAKGAAAioGMd8FgQAAB8EAAAeBAAAHQQAABwEAAA/GcAQNCSAEAIaABANkEhgfv/LAoaiEkIgfj/GohZCAwIUtEQgmUagfb/4AgAkfP/DBgamZgJQIgRl7gChkIAUKUggc3/4AgAkev/gqBsgtgQioEamYkJgeX/keX/ioEamQwGiQnGKgCB5f9gQ8AaiIgIvQGARGPNBK0CgcD/4AgAoKB0nApCoGgMCELUEIJlFgwHSkHGDgAQESDl5/+9BK0BEBEgZev/EBEg5eb/zQQQsSBQpSCBsv/gCABKIkpmN7bCgc3/cJbAGoiICIc5l4bs/wAMCZJFbIHG/xCIgKIoAIHI/+AIAFba/oHB/6IFbBqIsigAEBEgJZgA9+oM9kcJepSiSQAbd8bx/3zpl5rCZkcIciUaN7cCd7aicbP/vQV6ca0HgZf/4AgAEBEgpd7/rQccCxARICXi/xARIKXd/ywKgbH/4AgAHfAIIPQ/cOL6P0gkBkDwIgZANmEAEBEgpcr/EKEggfv/4AgALQoMF/wqiAGSogCQiBCJARARIOXO/5Hy/wwawCAAiAmgqgGgiCDAIACJCbIhAKHt/4Hu/+AIAKBygy0HHfA2QQCBOf8MGZJIADCcQZkofPmQlLUpODkYmiIwMLQqMwwJmVgwPEEMGTlIQJSDgtgrkkgMEBEgpff/LQqCoMWgKJMd8HguBkA2QQBtAiEm/4gygDNjFkMEeBJ6c3B8QcYBAAAAEBEgpcj/iEKmGASIIoen7xARIGXB/xZq/6gSzQO9BoHw/+AIAIw6gqDEiVKIEjqIiRKIMjCIwIkyHfAAUC0GQDZBAG0CIQ//MLMggtIrgggMjKhgpiAQESCl+P8GFACIMoAzYxaDBHgSenNwfEFGAQAQESBlwf+IQqYYBIgih6fvEBEgJbr/Fmr/qBIwwyBgtiCB6v/gCACgoHSMOoKgxIlSiBI6iIkSiDIwiMCCYgMd8AAAAMD8P09IQUms6/0/cOALQBTgC0AMAPQ/OED0PwAAAQCw6/0/wOv9PwBAAABgkPQ/ZJD0P2iQ9D9ckPQ/BMD8PwjA/D8I7P0/ECcAABQA9D/w//8ArOv9PwzA/D8kQP0/fGgAQOxnAEBYhgBAbCoGQDgyBkAULAZAzCwGQEwsBkA0hQBAzJAAQDDvBUBYkgBATIIAQDbBAIHb/wwKiYGB8P/gCACB1/+R2P8MCgYBAACpCEuIlzj4EBEgpbn/DEuiwSAQESAlvf8QESCluP+Bdf4xcf6Rzv/AIAA5CIFb/rHM/5JoAMKgAKKgBYHe/+AIAJHI/6KhAcAgAIgJoIggwCAAiQksCoEP/+AIAIHX/+AIAIHB/8AgAIgIzLocyZCIEILI+AwZgKmDDAuB0P/gCADBuv98/wwdsqAB8PD14qEAQN0RgLsBoqAAgcn/4AgAgqGMQZ/+gth/ijMi1CvAIACIAxZ4/8AgAGgDDAkMGMAgAJkDgkEQggYBDCqCQRGiUQmZUSaYCBw5lxgfRggAAIIGA5IGAoCIEZCIIGZIEYgmwCAAiAiJUUYBAAAcKIJRCRARIOWp/wyLosEQEBEgpa3/ggYDkgYCgIgRkIggkqAQktlAh7kcoqDAEBEgZaj/oqDuEBEg5af/EBEgZab/xtr/AACSBgEcOpc6NPYpGMbuAAAAkskvkJB09klwoYT/oJmgmAmgCQCSyf6QkHQcGpe6AsblAKF//6CZoJgJoAkAoskwoKB0tlrJBuAALEkMBXKgwJcYAkbgAFlRDHcMChARICWh/wwKEBEgpaD/EBEgJZ//EBEg5Z7/DIuiwRByx/8QESAlov9WJ/3GxQAMF1ZYM4JhDIF7/+AIAIjBhiwAJogEDBfGxwBYJng2cIUggIC0Vtj+EBEg5b7/elWcGgb4/wCgrEGBcP/gCABWigRy1/CMd3ClwKCA9FZY/oFT/8YEAHClwKCg9YFo/+AIAOyqgU7/gHfAdzjohgQAAABwpcCgrEGBYP/gCADcSnLX8Fa3/gwIBgMAPFjGAQA8aIYAAAA8eAwXgHiDhqYAZogCRpwAxn0AZrgCBpoAhnsADBcmuAIGoAC4NqgmEBEgZZj/DAigeIOGmwB8uZCYEAwFcqDAJrkCRpwAoTP/mEZyoMKXugLGmAAcSagmuFYMDJeYAchmEBEg5bb/fQoGjgB8uZCYEAwFcqDAJrkCxo4AmEahJf9yoMKXugJGiwC4NqgmsFmCHEm4VgwMl5gByGYQESBls/+BBv4MCZlogtgrfQpZKEZ8AJEC/gwFogkAcqDGFmofqCaCyPByoMCHmgF4WQwJoqDvRgIAmrayCxgbmbCqMIcp8oIGBZIGBICIEZCIIJIGBgwFAJkRgJkgggYHgIgBkIgghxoCxmoAxmoAgez9DAWSCAByoMYW2RmYOHKgyFZZGXhYkkgARmMAHIkMBQwXlxgCRmAA+HboZthWyEayJgOiJgKBBv/gCAAMCF0KoHiDxlgADBcmSAIGUgDB7/58+8AgAIgMstuQDBkwmRGwiBCQiCCoJsAgAIkMwej+wCAAiAywiBCQiCDAIACJDMHk/sAgAIgMsIgQkIggwCAAiQzB4P7AIACIDLCIEJCIIMAgAIkMDAuB6P7gCABGGgCAkDQMBXKgwFbZDoCEQYt2xgsAqDeJwYHl/uAIAJgnqBe4B4jBoKkQJgkNwCAAyAvAmRDAmTCQqiDAIACpCxtVcscQhzXMRh4AJkh2DAVyoMAGKQAMFya4AkYiAIHD/qhWmCapCIHC/pkIDAeGHQDRvv7iyPDIDcysDAVyoMacvkYdAAAAkbr+UqAAkikAcqDJ5zlkgIAUcqDAVrgFgbT+DAqYCAwLxgIAuqb4arqs+QpLuwwa5zvwjHqwmcCZCLqMiQ0MBQwHhgsADBdmiBahp/6SoMiICoCJkwwJmQqhov6AeYOZCgwFRgMADAVyoP9GAQAAAAByoMFwoHQQESAlaf9QoHQQESClaP8QESAlZ/9WZ7eCBgEcKYc5IPY4Agba/oLI/YCAdAz5h7kChtb+kZD+kIigiAigCAAAAJKg0pcYR5Kg1JcYU4bP/qGK/lg2eCaBlv7gCACBiP6hiP7AIACICICUNcCIEaCIEICJIFCIggwKcLjCgY7+4AgAoqPogYv+4AgABsD+ANhWyEa4NqgmEBEg5W3/hrv+ALIGA4IGAoC7EYC7ILLL8KLGGBARIKWK/4a0/rIGA4IGAoC7EYC7ILLL8KLGGBARIKWO/8at/nIGA4IGAoB3EYB3IIg0csfwzBj2VwtRZv5ixhgMGEYhAACCoMnGJADoBYFA/agi4IjAiWF5cYKgA6c3AQwYidHpwRARIOVO/4jR6MHRWf6hWf69BokBwsEc8sEYgWH+4AgAuCKNCqhxkVL+oLvAuSKgd8C4BapmqGHA+ECqu7kFwMVBkLvAjJjS24AMGtCskxY6AaFH/oJhDBARIKWE/4FE/okFgiEMjLeoNIx6gK8xgKrAlhr31ogAgqDHiVSGff4AViifiDQW2J6CoMjG+v8AiCZWGJ4MCoFD/uAIAKEx/oE+/uAIAIFA/uAIAMZx/gB4NhYXnAwKgTv+4AgAoqPogTb+4AgA4AcAhmr+HfAAAAA2QQCioMCYA40Cp5IODBisGQwIiQN84sYOAAAAJhkJJikWfPKGCwAAAJKg24AiI5eYIwwoiQMG+v+SoNyXkgkMGIkDIqDABgMAkqDdl5LSDBiJAyKg2x3w",
+    "text_start": 1074520064,
+    "data": "DMD8P1XoC0Dr6AtAd+0LQIvpC0AO6QtAi+kLQOTpC0Dr6gtAYesLQAbrC0AB6AtAl+oLQODqC0AC6gtAgusLQCzqC0CC6wtA4ugLQETpC0CL6QtA5OkLQPToC0BP7AtAO+0LQCLnC0Bb7QtAIucLQCLnC0Ai5wtAIucLQCLnC0Ai5wtAIucLQCLnC0Dj6wtAIucLQGrsC0A77QtA",
+    "data_start": 1073605548,
+    "bss_start": 1073528832
+}

esptool-4.12.dev1/esptool/targets/stub_flasher/1/esp32c2.json

@@ -0,0 +1,8 @@
+{
+    "entry": 1077413338,
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esptool-4.12.dev1/esptool/targets/stub_flasher/1/esp32c3.json

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esptool-4.12.dev1/esptool/targets/stub_flasher/1/esp32c5.json

@@ -0,0 +1,8 @@
+{
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esptool-4.12.dev1/esptool/targets/stub_flasher/1/esp32c5beta3.json

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esptool-4.12.dev1/esptool/targets/stub_flasher/1/esp32c6.json

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+}

esptool-4.12.dev1/esptool/targets/stub_flasher/1/esp32c61.json

@@ -0,0 +1,8 @@
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esptool-4.12.dev1/esptool/targets/stub_flasher/1/esp32c6beta.json

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+}

esptool-4.12.dev1/esptool/targets/stub_flasher/1/esp32h2.json

@@ -0,0 +1,8 @@
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esptool-4.12.dev1/esptool/targets/stub_flasher/1/esp32h2beta1.json

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