esptool 4.10.dev2__tar.gz → 4.11.dev1__tar.gz

{esptool-4.10.dev2/esptool.egg-info → esptool-4.11.dev1}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: esptool
-Version: 4.10.dev2
+Version: 4.11.dev1
 Summary: A serial utility to communicate & flash code to Espressif chips.
 Author: Fredrik Ahlberg (themadinventor), Angus Gratton (projectgus), Espressif Systems
 License: GPLv2+

{esptool-4.10.dev2 → esptool-4.11.dev1}/espefuse/efuse/base_fields.py

@@ -488,8 +488,14 @@ class EspEfusesBase(object):
         print("Re-connecting...")
         baudrate = esp._port.baudrate
         port = esp._port.port
+        connect_mode = (
+            "usb-reset"
+            if esp._get_pid() == esp.USB_JTAG_SERIAL_PID
+            else "default-reset"
+        )
+        print(f"Port: {port}, Baudrate: {baudrate}, Connect mode: {connect_mode}")
         esp._port.close()
-        return esptool.cmds.detect_chip(port, baudrate)
+        return esptool.cmds.detect_chip(port, baudrate, connect_mode)
 
     def get_index_block_by_name(self, name):
         for block in self.blocks:

{esptool-4.10.dev2 → esptool-4.11.dev1}/espefuse/efuse/emulate_efuse_controller_base.py

@@ -18,6 +18,7 @@ class EmulateEfuseControllerBase(object):
     Blocks = None
     Fields = None
     REGS = None
+    USB_JTAG_SERIAL_PID = 0x1001
 
     def __init__(self, efuse_file=None, debug=False):
         self.debug = debug
@@ -75,6 +76,9 @@ class EmulateEfuseControllerBase(object):
         blk = self.Blocks.get(self.Blocks.BLOCKS[block])
         self.write_reg(blk.wr_addr + (4 * n), value)
 
+    def _get_pid(self):
+        return -1
+
     """ << esptool method end """
 
     def handle_writing_event(self, addr, value):

{esptool-4.10.dev2 → esptool-4.11.dev1}/espefuse/efuse/esp32c5/fields.py

@@ -410,9 +410,6 @@ class EfuseKeyPurposeField(EfuseField):
         ("ECDSA_KEY_P256",               1,  None,       "Reverse", "need_rd_protect"),      # ECDSA key P256
         ("ECDSA_KEY",                    1,  None,       "Reverse", "need_rd_protect"),      # ECDSA key P256
         ("RESERVED",                     1,  None,       None,      "no_need_rd_protect"),   # Reserved
-        ("XTS_AES_256_KEY_1",            2,  None,       "Reverse", "need_rd_protect"),      # XTS_AES_256_KEY_1 (flash/PSRAM encryption)
-        ("XTS_AES_256_KEY_2",            3,  None,       "Reverse", "need_rd_protect"),      # XTS_AES_256_KEY_2 (flash/PSRAM encryption)
-        ("XTS_AES_256_KEY",             -1, "VIRTUAL",   None,      "no_need_rd_protect"),   # Virtual purpose splits to XTS_AES_256_KEY_1 and XTS_AES_256_KEY_2
         ("XTS_AES_128_KEY",              4,  None,       "Reverse", "need_rd_protect"),      # XTS_AES_128_KEY (flash/PSRAM encryption)
         ("HMAC_DOWN_ALL",                5,  None,       None,      "need_rd_protect"),      # HMAC Downstream mode
         ("HMAC_DOWN_JTAG",               6,  None,       None,      "need_rd_protect"),      # JTAG soft enable key (uses HMAC Downstream mode)
@@ -422,9 +419,6 @@ class EfuseKeyPurposeField(EfuseField):
         ("SECURE_BOOT_DIGEST1",          10, "DIGEST",   None,      "no_need_rd_protect"),   # SECURE_BOOT_DIGEST1 (Secure Boot key digest)
         ("SECURE_BOOT_DIGEST2",          11, "DIGEST",   None,      "no_need_rd_protect"),   # SECURE_BOOT_DIGEST2 (Secure Boot key digest)
         ("KM_INIT_KEY",                  12, None,       None,      "need_rd_protect"),      # init key that is used for the generation of AES/ECDSA key
-        ("XTS_AES_256_PSRAM_KEY_1",      13, None,       "Reverse", "need_rd_protect"),      # XTS_AES_256_PSRAM_KEY_1 (PSRAM encryption)
-        ("XTS_AES_256_PSRAM_KEY_2",      14, None,       "Reverse", "need_rd_protect"),      # XTS_AES_256_PSRAM_KEY_1 (PSRAM encryption)
-        ("XTS_AES_256_PSRAM_KEY",        -2, "VIRTUAL",  None,      "no_need_rd_protect"),   # Virtual purpose splits to XTS_AES_256_PSRAM_KEY_1 and XTS_AES_256_PSRAM_KEY_1
         ("XTS_AES_128_PSRAM_KEY",        15, None,       "Reverse", "need_rd_protect"),      # XTS_AES_128_PSRAM_KEY (PSRAM encryption)
         ("ECDSA_KEY_P192",               16, None,       "Reverse", "need_rd_protect"),      # ECDSA key P192
         ("ECDSA_KEY_P384_L",             17, None,       "Reverse", "need_rd_protect"),      # ECDSA key P384 low

{esptool-4.10.dev2 → esptool-4.11.dev1}/espefuse/efuse/esp32h4/fields.py

@@ -394,8 +394,6 @@ class EfuseKeyPurposeField(EfuseField):
     KEY_PURPOSES = [
         ("USER",                         0,  None,       None,      "no_need_rd_protect"),   # User purposes (software-only use)
         ("ECDSA_KEY",                    1,  None,       "Reverse", "need_rd_protect"),      # ECDSA key
-        ("XTS_AES_256_KEY_1",            2,  None,       "Reverse", "need_rd_protect"),      # XTS_AES_256_KEY_1 (flash/PSRAM encryption)
-        ("XTS_AES_256_KEY_2",            3,  None,       "Reverse", "need_rd_protect"),      # XTS_AES_256_KEY_2 (flash/PSRAM encryption)
         ("XTS_AES_128_KEY",              4,  None,       "Reverse", "need_rd_protect"),      # XTS_AES_128_KEY (flash/PSRAM encryption)
         ("HMAC_DOWN_ALL",                5,  None,       None,      "need_rd_protect"),      # HMAC Downstream mode
         ("HMAC_DOWN_JTAG",               6,  None,       None,      "need_rd_protect"),      # JTAG soft enable key (uses HMAC Downstream mode)
@@ -405,7 +403,6 @@ class EfuseKeyPurposeField(EfuseField):
         ("SECURE_BOOT_DIGEST1",          10, "DIGEST",   None,      "no_need_rd_protect"),   # SECURE_BOOT_DIGEST1 (Secure Boot key digest)
         ("SECURE_BOOT_DIGEST2",          11, "DIGEST",   None,      "no_need_rd_protect"),   # SECURE_BOOT_DIGEST2 (Secure Boot key digest)
         ("KM_INIT_KEY",                  12, None,       None,      "need_rd_protect"),      # init key that is used for the generation of AES/ECDSA key
-        ("XTS_AES_256_KEY",              -1, "VIRTUAL",  None,      "no_need_rd_protect"),   # Virtual purpose splits to XTS_AES_256_KEY_1 and XTS_AES_256_KEY_2
     ]
 # fmt: on
 

{esptool-4.10.dev2 → esptool-4.11.dev1}/espefuse/efuse/esp32p4/emulate_efuse_controller.py

@@ -27,7 +27,7 @@ class EmulateEfuseController(EmulateEfuseControllerBase):
     """ esptool method start >>"""
 
     def get_major_chip_version(self):
-        return 0
+        return 3
 
     def get_minor_chip_version(self):
         return 0

{esptool-4.10.dev2 → esptool-4.11.dev1}/espefuse/efuse/esp32p4/fields.py

@@ -67,7 +67,10 @@ class EspEfuses(base_fields.EspEfusesBase):
         extend_efuse_table=None,
     ):
         self.Blocks = EfuseDefineBlocks()
-        self.Fields = EfuseDefineFields(extend_efuse_table)
+        chip_revision = 300 if skip_connect else esp.get_chip_revision()
+        revision_file = "esp32p4_v3.0" if chip_revision >= 300 else None
+        print(f"Loading eFuses for {esp.CHIP_NAME} v{chip_revision / 100:.1f}...")
+        self.Fields = EfuseDefineFields(extend_efuse_table, revision=revision_file)
         self.REGS = EfuseDefineRegisters
         self.BURN_BLOCK_DATA_NAMES = self.Blocks.get_burn_block_data_names()
         self.BLOCKS_FOR_KEYS = self.Blocks.get_blocks_for_keys()
@@ -291,9 +294,63 @@ class EfuseField(base_fields.EfuseFieldBase):
             "keypurpose": EfuseKeyPurposeField,
             "t_sensor": EfuseTempSensor,
             "adc_tp": EfuseAdcPointCalibration,
+            "wafer": EfuseWafer,
+            "recovery_bootloader": EfuseBtldrRecoveryField,
         }.get(efuse.class_type, EfuseField)(parent, efuse)
 
 
+class EfuseBtldrRecoveryField(EfuseField):
+    """
+    Handles composite recovery bootloader flash sector fields for ESP32-P4 ECO5 (v3.0).
+    Combines/splits the following eFuse fields:
+      - RECOVERY_BOOTLOADER_FLASH_SECTOR_0_1  (bits 1:0, uint:2)
+      - RECOVERY_BOOTLOADER_FLASH_SECTOR_2_2  (bit 2, bool)
+      - RECOVERY_BOOTLOADER_FLASH_SECTOR_3_6  (bits 6:3, uint:4)
+      - RECOVERY_BOOTLOADER_FLASH_SECTOR_7_7  (bit 7, bool)
+      - RECOVERY_BOOTLOADER_FLASH_SECTOR_8_10 (bits 10:8, uint:3)
+      - RECOVERY_BOOTLOADER_FLASH_SECTOR_11_11(bit 11, bool)
+    """
+
+    FIELD_ORDER = [
+        ("RECOVERY_BOOTLOADER_FLASH_SECTOR_0_1", 0, 2),
+        ("RECOVERY_BOOTLOADER_FLASH_SECTOR_2_2", 2, 1),
+        ("RECOVERY_BOOTLOADER_FLASH_SECTOR_3_6", 3, 4),
+        ("RECOVERY_BOOTLOADER_FLASH_SECTOR_7_7", 7, 1),
+        ("RECOVERY_BOOTLOADER_FLASH_SECTOR_8_10", 8, 3),
+        ("RECOVERY_BOOTLOADER_FLASH_SECTOR_11_11", 11, 1),
+    ]
+
+    def get(self, from_read=True):
+        value = 0
+        for field_name, bit_offset, bit_len in self.FIELD_ORDER:
+            field = self.parent[field_name]
+            field_val = field.get(from_read)
+            assert field.bit_len == bit_len
+            value |= (field_val & ((1 << bit_len) - 1)) << bit_offset
+        return value
+
+    def save(self, new_value):
+        for field_name, bit_offset, bit_len in self.FIELD_ORDER:
+            field = self.parent[field_name]
+            field_val = (new_value >> bit_offset) & ((1 << bit_len) - 1)
+            field.save(field_val)
+            print(
+                f"\t    - '{field.name}' {field.get_bitstring()} -> {field.get_bitstring(from_read=False)}"
+            )
+
+
+class EfuseWafer(EfuseField):
+    def get(self, from_read=True):
+        hi_bits = self.parent["WAFER_VERSION_MAJOR_HI"].get(from_read)
+        assert self.parent["WAFER_VERSION_MAJOR_HI"].bit_len == 1
+        lo_bits = self.parent["WAFER_VERSION_MAJOR_LO"].get(from_read)
+        assert self.parent["WAFER_VERSION_MAJOR_LO"].bit_len == 2
+        return (hi_bits << 2) + lo_bits
+
+    def save(self, new_value):
+        raise esptool.FatalError(f"Burning {self.name} is not supported")
+
+
 class EfuseTempSensor(EfuseField):
     def get(self, from_read=True):
         value = self.get_bitstring(from_read)
@@ -380,10 +437,11 @@ class EfuseMacField(EfuseField):
 
 # fmt: off
 class EfuseKeyPurposeField(EfuseField):
-    key_purpose_len = 4  # bits for key purpose
+    key_purpose_len = 5  # bits for key purpose
     KeyPurposeType = Tuple[str, int, Optional[str], Optional[str], str]
     KEY_PURPOSES: List[KeyPurposeType] = [
         ("USER",                         0,  None,       None,      "no_need_rd_protect"),   # User purposes (software-only use)
+        ("ECDSA_KEY_P256",               1,  None,       "Reverse", "need_rd_protect"),      # ECDSA key P256
         ("ECDSA_KEY",                    1,  None,       "Reverse", "need_rd_protect"),      # ECDSA key
         ("XTS_AES_256_KEY_1",            2,  None,       "Reverse", "need_rd_protect"),      # XTS_AES_256_KEY_1 (flash/PSRAM encryption)
         ("XTS_AES_256_KEY_2",            3,  None,       "Reverse", "need_rd_protect"),      # XTS_AES_256_KEY_2 (flash/PSRAM encryption)
@@ -397,6 +455,10 @@ class EfuseKeyPurposeField(EfuseField):
         ("SECURE_BOOT_DIGEST2",          11, "DIGEST",   None,      "no_need_rd_protect"),   # SECURE_BOOT_DIGEST2 (Secure Boot key digest)
         ("KM_INIT_KEY",                  12, None,       None,      "need_rd_protect"),      # init key that is used for the generation of AES/ECDSA key
         ("XTS_AES_256_KEY",              -1, "VIRTUAL",  None,      "no_need_rd_protect"),   # Virtual purpose splits to XTS_AES_256_KEY_1 and XTS_AES_256_KEY_2
+        ("ECDSA_KEY_P192",               16, None,       "Reverse", "need_rd_protect"),      # ECDSA key P192
+        ("ECDSA_KEY_P384_L",             17, None,       "Reverse", "need_rd_protect"),      # ECDSA key P384 low
+        ("ECDSA_KEY_P384_H",             18, None,       "Reverse", "need_rd_protect"),      # ECDSA key P384 high
+        ("ECDSA_KEY_P384",               -3, "VIRTUAL",  None,      "need_rd_protect"),      # Virtual purpose splits to ECDSA_KEY_P384_L and ECDSA_KEY_P384_H
     ]
     CUSTOM_KEY_PURPOSES: List[KeyPurposeType] = []
     for id in range(0, 1 << key_purpose_len):
@@ -436,9 +498,25 @@ class EfuseKeyPurposeField(EfuseField):
                 return key[4] == "need_rd_protect"
 
     def get(self, from_read=True):
-        for p in self.KEY_PURPOSES:
-            if p[1] == self.get_raw(from_read):
-                return p[0]
+        # Handle special case for KEY_PURPOSE_<digit>_H fields (e.g., KEY_PURPOSE_0_H ... KEY_PURPOSE_9_H)
+        if self.name.startswith("KEY_PURPOSE_") and self.name.endswith("_H"):
+            return self.get_raw(from_read)
+        else:
+            if any(
+                efuse is not None
+                and getattr(efuse, "name", None) == "KEY_PURPOSE_0_H"
+                for efuse in self.parent
+            ):  # check if the hi bit field for KEY_PURPOSE_.. exists
+                hi_bits = self.parent[f"{self.name}_H"].get_raw(from_read)
+                assert self.parent[f"{self.name}_H"].bit_len == 1
+                lo_bits = self.parent[f"{self.name}"].get_raw(from_read)
+                assert self.parent[f"{self.name}"].bit_len == 4
+                raw_val = (hi_bits << 4) + lo_bits
+            else:
+                raw_val = self.get_raw(from_read)
+            for p in self.KEY_PURPOSES:
+                if p[1] == raw_val:
+                    return p[0]
         return "FORBIDDEN_STATE"
 
     def get_name(self, raw_val):
@@ -448,4 +526,31 @@ class EfuseKeyPurposeField(EfuseField):
 
     def save(self, new_value):
         raw_val = int(self.check_format(str(new_value)))
-        return super(EfuseKeyPurposeField, self).save(raw_val)
+        # Check if _H field exists (5-bit key purpose split into lo/hi)
+        if (any(
+                efuse is not None
+                and getattr(efuse, "name", None) == "KEY_PURPOSE_0_H"
+                for efuse in self.parent
+            )
+            and self.name.startswith("KEY_PURPOSE_")
+            and not self.name.endswith("_H")
+        ):
+            FIELD_ORDER = [
+                (self.name, 0),  # lo bits (bits 0-3)
+                (f"{self.name}_H", 4),  # hi bit (bit 4)
+            ]
+            for field_name, bit_offset in FIELD_ORDER:
+                field = self.parent[field_name]
+                field_val = (raw_val >> bit_offset) & ((1 << field.bit_len) - 1)
+                print(field_val, field_name)
+                if field_val != 0:
+                    if field_name.endswith("_H"):
+                        field.save(field_val)
+                    else:
+                        super().save(field_val)
+                    print(
+                        f"\t    - '{field.name}' {field.get_bitstring()} -> {field.get_bitstring(from_read=False)}"
+                    )
+        else:
+            # Single field, just save as usual
+            super().save(raw_val)

{esptool-4.10.dev2 → esptool-4.11.dev1}/espefuse/efuse/esp32p4/mem_definition.py

@@ -12,6 +12,7 @@ from ..mem_definition_base import (
     EfuseBlocksBase,
     EfuseFieldsBase,
     EfuseRegistersBase,
+    Field,
 )
 from typing import List
 
@@ -111,7 +112,7 @@ class EfuseDefineBlocks(EfuseBlocksBase):
 
 
 class EfuseDefineFields(EfuseFieldsBase):
-    def __init__(self, extend_efuse_table) -> None:
+    def __init__(self, extend_efuse_table, revision=None) -> None:
         # List of efuse fields from TRM the chapter eFuse Controller.
         self.EFUSES = []
         self.KEYBLOCKS = []
@@ -120,6 +121,8 @@ class EfuseDefineFields(EfuseFieldsBase):
 
         dir_name = os.path.dirname(os.path.abspath(__file__))
         dir_name, file_name = os.path.split(dir_name)
+        if revision is not None:
+            file_name = revision
         file_name = file_name + ".yaml"
         dir_name, _ = os.path.split(dir_name)
         efuse_file = os.path.join(dir_name, "efuse_defs", file_name)
@@ -148,6 +151,31 @@ class EfuseDefineFields(EfuseFieldsBase):
                 self.BLOCK2_CALIBRATION_EFUSES.append(efuse)
                 self.ALL_EFUSES[i] = None
 
+        f = Field()
+        f.name = "WAFER_VERSION_MAJOR"
+        f.block = 0
+        f.bit_len = 3
+        f.type = f"uint:{f.bit_len}"
+        f.category = "identity"
+        f.class_type = "wafer"
+        f.description = "calc WAFER VERSION MAJOR from (WAFER_VERSION_MAJOR_HI << 2) + WAFER_VERSION_MAJOR_LO (read only)"
+        self.CALC.append(f)
+
+        if any(
+            efuse is not None
+            and getattr(efuse, "name", None) == "RECOVERY_BOOTLOADER_FLASH_SECTOR_0_1"
+            for efuse in self.ALL_EFUSES
+        ):
+            f = Field()
+            f.name = "RECOVERY_BOOTLOADER_FLASH_SECTOR"
+            f.block = 0
+            f.bit_len = 12
+            f.type = f"uint:{f.bit_len}"
+            f.category = "config"
+            f.class_type = "recovery_bootloader"
+            f.description = "recovery_bootloader = RECOVERY_BOOTLOADER_FLASH_SECTOR_0_1 + 2_2 + 3_6 + 7_7 + 8_10 + 11_11"
+            self.CALC.append(f)
+
         for efuse in self.ALL_EFUSES:
             if efuse is not None:
                 self.EFUSES.append(efuse)

esptool-4.11.dev1/espefuse/efuse_defs/esp32p4_v3.0.yaml

@@ -0,0 +1,174 @@
+VER_NO: 0b11fcae5408d9e48251cefb10178c11
+EFUSES:
+  WR_DIS                                : {show: y, blk : 0, word: 0, pos : 0, len : 32, start  : 0, type : 'uint:32', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Disable programming of individual eFuses, rloc: EFUSE_RD_WR_DIS_REG, bloc: 'B0,B1,B2,B3'}
+  RD_DIS                                : {show: y, blk : 0, word: 1, pos : 0, len  : 7, start : 32, type  : 'uint:7', wr_dis   : 0, rd_dis: null, alt                            : '', dict             : '', desc: Disable reading from BlOCK4-10, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[6:0]', bloc: 'B4[6:0]'}
+  RECOVERY_BOOTLOADER_FLASH_SECTOR_0_1  : {show: y, blk : 0, word: 1, pos : 7, len  : 2, start : 39, type  : 'uint:2', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[8:7]', bloc: 'B4[7],B5[0]'}
+  DIS_USB_JTAG                          : {show: y, blk : 0, word: 1, pos : 9, len  : 1, start : 41, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to disable function of usb switch to jtag in module of usb device, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[9]', bloc: 'B5[1]'}
+  RECOVERY_BOOTLOADER_FLASH_SECTOR_2_2  : {show: y, blk : 0, word: 1, pos: 10, len  : 1, start : 42, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[10]', bloc: 'B5[2]'}
+  DIS_USB_SERIAL_JTAG                   : {show: n, blk : 0, word: 1, pos: 11, len  : 1, start : 43, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to disable USB-Serial-JTAG, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[11]', bloc: 'B5[3]'}
+  DIS_FORCE_DOWNLOAD                    : {show: y, blk : 0, word: 1, pos: 12, len  : 1, start : 44, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to disable the function that forces chip into download mode, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[12]', bloc: 'B5[4]'}
+  SPI_DOWNLOAD_MSPI_DIS                 : {show: y, blk : 0, word: 1, pos: 13, len  : 1, start : 45, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to disable accessing MSPI flash/MSPI ram by SYS AXI matrix during boot_mode_download, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[13]', bloc: 'B5[5]'}
+  DIS_TWAI                              : {show: y, blk : 0, word: 1, pos: 14, len  : 1, start : 46, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to disable TWAI function, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[14]', bloc: 'B5[6]'}
+  JTAG_SEL_ENABLE                       : {show: y, blk : 0, word: 1, pos: 15, len  : 1, start : 47, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio25 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[15]', bloc: 'B5[7]'}
+  SOFT_DIS_JTAG                         : {show: y, blk : 0, word: 1, pos: 16, len  : 3, start : 48, type  : 'uint:3', wr_dis  : 31, rd_dis: null, alt                            : '', dict             : '', desc: Set odd bits to disable JTAG in the soft way. JTAG can be enabled in HMAC module, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[18:16]', bloc: 'B6[2:0]'}
+  DIS_PAD_JTAG                          : {show: y, blk : 0, word: 1, pos: 19, len  : 1, start : 51, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to disable JTAG in the hard way. JTAG is disabled permanently, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[19]', bloc: 'B6[3]'}
+  DIS_DOWNLOAD_MANUAL_ENCRYPT           : {show: y, blk : 0, word: 1, pos: 20, len  : 1, start : 52, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to disable flash manual encrypt function (except in SPI boot mode), rloc: 'EFUSE_RD_REPEAT_DATA0_REG[20]', bloc: 'B6[4]'}
+  RECOVERY_BOOTLOADER_FLASH_SECTOR_3_6  : {show: y, blk : 0, word: 1, pos: 21, len  : 4, start : 53, type  : 'uint:4', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[24:21]', bloc: 'B6[7:5],B7[0]'}
+  USB_PHY_SEL                           : {show: y, blk : 0, word: 1, pos: 25, len  : 1, start : 57, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: '0: intphy(gpio24/25) <---> usb_device 1: intphy(26/27) <---> usb_otg11.1: intphy(gpio26/27) <---> usb_device 1: intphy(24/25) <---> usb_otg11', rloc: 'EFUSE_RD_REPEAT_DATA0_REG[25]', bloc: 'B7[1]'}
+  HUK_GEN_STATE                         : {show: y, blk : 0, word: 1, pos: 26, len  : 5, start : 58, type  : 'uint:5', wr_dis  : 19, rd_dis: null, alt                            : '', dict             : '', desc: Set the bits to control validation of HUK generate mode. Odd of 1 is invalid; even of 1 is valid, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[30:26]', bloc: 'B7[6:2]'}
+  RECOVERY_BOOTLOADER_FLASH_SECTOR_7_7  : {show: y, blk : 0, word: 1, pos: 31, len  : 1, start : 63, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled, rloc: 'EFUSE_RD_REPEAT_DATA0_REG[31]', bloc: 'B7[7]'}
+  RECOVERY_BOOTLOADER_FLASH_SECTOR_8_10 : {show: y, blk : 0, word: 2, pos : 0, len  : 3, start : 64, type  : 'uint:3', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[2:0]', bloc: 'B8[2:0]'}
+  RECOVERY_BOOTLOADER_FLASH_SECTOR_11_11: {show: y, blk : 0, word: 2, pos : 3, len  : 1, start : 67, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[3]', bloc: 'B8[3]'}
+  KM_RND_SWITCH_CYCLE                   : {show: y, blk : 0, word: 2, pos : 4, len  : 1, start : 68, type      : bool, wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'Set the bits to control key manager random number switch cycle. 0: control by register. 1: 8 km clk cycles. 2: 16 km cycles. 3: 32 km cycles', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[4]', bloc: 'B8[4]'}
+  KM_DEPLOY_ONLY_ONCE                   : {show: y, blk : 0, word: 2, pos : 5, len  : 4, start : 69, type  : 'uint:4', wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'EFUSE_KM_DEPLOY_ONLY_ONCE and EFUSE_KM_DEPLOY_ONLY_ONCE_H together form one field: {EFUSE_KM_DEPLOY_ONLY_ONCE_H; EFUSE_KM_DEPLOY_ONLY_ONCE[3:0]}. Set each bit to control whether corresponding key can only be deployed once. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds; bit4:psram', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[8:5]', bloc: 'B8[7:5],B9[0]'}
+  FORCE_USE_KEY_MANAGER_KEY             : {show: y, blk : 0, word: 2, pos : 9, len  : 4, start : 73, type  : 'uint:4', wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'EFUSE_FORCE_USE_KEY_MANAGER_KEY and EFUSE_FORCE_USE_KEY_MANAGER_KEY_H together form one field: {EFUSE_FORCE_USE_KEY_MANAGER_KEY_H; EFUSE_FORCE_USE_KEY_MANAGER_KEY[3:0]}. Set each bit to control whether corresponding key must come from key manager. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds; bit4:psram', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[12:9]', bloc: 'B9[4:1]'}
+  FORCE_DISABLE_SW_INIT_KEY             : {show: y, blk : 0, word: 2, pos: 13, len  : 1, start : 77, type      : bool, wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to disable software written init key; and force use efuse_init_key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[13]', bloc: 'B9[5]'}
+  KM_XTS_KEY_LENGTH_256                 : {show: y, blk : 0, word: 2, pos: 14, len  : 1, start : 78, type      : bool, wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to config flash encryption xts-512 key; else use xts-256 key when using the key manager, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[14]', bloc: 'B9[6]'}
+  ECC_FORCE_CONST_TIME                  : {show: y, blk : 0, word: 2, pos: 15, len  : 1, start : 79, type      : bool, wr_dis  : 14, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to permanently turn on ECC const-time mode, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[15]', bloc: 'B9[7]'}
+  RESERVE_0_80                          : {show: n, blk : 0, word: 2, pos: 16, len  : 1, start : 80, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[16]', bloc: 'B10[0]'}
+  WDT_DELAY_SEL                         : {show: y, blk : 0, word: 2, pos: 17, len  : 1, start : 81, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: Select lp wdt timeout threshold at startup = initial timeout value * (2 ^ (EFUSE_WDT_DELAY_SEL + 1)), rloc: 'EFUSE_RD_REPEAT_DATA1_REG[17]', bloc: 'B10[1]'}
+  SPI_BOOT_CRYPT_CNT                    : {show: y, blk : 0, word: 2, pos: 18, len  : 3, start : 82, type  : 'uint:3', wr_dis   : 4, rd_dis: null, alt                            : '', dict: '{0: "Disable", 1: "Enable", 3: "Disable", 7: "Enable"}', desc: 'Set this bit to enable SPI boot encrypt/decrypt. Odd number of 1: enable. even number of 1: disable', rloc: 'EFUSE_RD_REPEAT_DATA1_REG[20:18]', bloc: 'B10[4:2]'}
+  SECURE_BOOT_KEY_REVOKE0               : {show: y, blk : 0, word: 2, pos: 21, len  : 1, start : 85, type      : bool, wr_dis   : 5, rd_dis: null, alt                            : '', dict             : '', desc: Revoke 1st secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[21]', bloc: 'B10[5]'}
+  SECURE_BOOT_KEY_REVOKE1               : {show: y, blk : 0, word: 2, pos: 22, len  : 1, start : 86, type      : bool, wr_dis   : 6, rd_dis: null, alt                            : '', dict             : '', desc: Revoke 2nd secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[22]', bloc: 'B10[6]'}
+  SECURE_BOOT_KEY_REVOKE2               : {show: y, blk : 0, word: 2, pos: 23, len  : 1, start : 87, type      : bool, wr_dis   : 7, rd_dis: null, alt                            : '', dict             : '', desc: Revoke 3rd secure boot key, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[23]', bloc: 'B10[7]'}
+  KEY_PURPOSE_0                         : {show: y, blk : 0, word: 2, pos: 24, len  : 4, start : 88, type  : 'uint:4', wr_dis   : 8, rd_dis: null, alt                  : KEY0_PURPOSE, dict             : '', desc: Purpose of Key0, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[27:24]', bloc: 'B11[3:0]'}
+  KEY_PURPOSE_1                         : {show: y, blk : 0, word: 2, pos: 28, len  : 4, start : 92, type  : 'uint:4', wr_dis   : 9, rd_dis: null, alt                  : KEY1_PURPOSE, dict             : '', desc: Purpose of Key1, rloc: 'EFUSE_RD_REPEAT_DATA1_REG[31:28]', bloc: 'B11[7:4]'}
+  KEY_PURPOSE_2                         : {show: y, blk : 0, word: 3, pos : 0, len  : 4, start : 96, type  : 'uint:4', wr_dis  : 10, rd_dis: null, alt                  : KEY2_PURPOSE, dict             : '', desc: Purpose of Key2, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[3:0]', bloc: 'B12[3:0]'}
+  KEY_PURPOSE_3                         : {show: y, blk : 0, word: 3, pos : 4, len  : 4, start: 100, type  : 'uint:4', wr_dis  : 11, rd_dis: null, alt                  : KEY3_PURPOSE, dict             : '', desc: Purpose of Key3, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[7:4]', bloc: 'B12[7:4]'}
+  KEY_PURPOSE_4                         : {show: y, blk : 0, word: 3, pos : 8, len  : 4, start: 104, type  : 'uint:4', wr_dis  : 12, rd_dis: null, alt                  : KEY4_PURPOSE, dict             : '', desc: Purpose of Key4, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[11:8]', bloc: 'B13[3:0]'}
+  KEY_PURPOSE_5                         : {show: y, blk : 0, word: 3, pos: 12, len  : 4, start: 108, type  : 'uint:4', wr_dis  : 13, rd_dis: null, alt                  : KEY5_PURPOSE, dict             : '', desc: Purpose of Key5, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[15:12]', bloc: 'B13[7:4]'}
+  SEC_DPA_LEVEL                         : {show: y, blk : 0, word: 3, pos: 16, len  : 2, start: 112, type  : 'uint:2', wr_dis  : 14, rd_dis: null, alt                            : '', dict             : '', desc: Configures the clock random divide mode to determine the dpa secure level, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[17:16]', bloc: 'B14[1:0]'}
+  RESERVE_0_114                         : {show: n, blk : 0, word: 3, pos: 18, len  : 1, start: 114, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[18]', bloc: 'B14[2]'}
+  XTS_DPA_CLK_ENABLE                    : {show: y, blk : 0, word: 3, pos: 19, len  : 1, start: 115, type      : bool, wr_dis  : 14, rd_dis: null, alt                            : '', dict             : '', desc: Sets this bit to enable xts clock anti-dpa attack function, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[19]', bloc: 'B14[3]'}
+  SECURE_BOOT_EN                        : {show: y, blk : 0, word: 3, pos: 20, len  : 1, start: 116, type      : bool, wr_dis  : 15, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to enable secure boot, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[20]', bloc: 'B14[4]'}
+  SECURE_BOOT_AGGRESSIVE_REVOKE         : {show: y, blk : 0, word: 3, pos: 21, len  : 1, start: 117, type      : bool, wr_dis  : 16, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to enable revoking aggressive secure boot, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[21]', bloc: 'B14[5]'}
+  KM_DEPLOY_ONLY_ONCE_H                 : {show: y, blk : 0, word: 3, pos: 22, len  : 1, start: 118, type      : bool, wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'EFUSE_KM_DEPLOY_ONLY_ONCE and EFUSE_KM_DEPLOY_ONLY_ONCE_H together form one field: {EFUSE_KM_DEPLOY_ONLY_ONCE_H; EFUSE_KM_DEPLOY_ONLY_ONCE[3:0]}. Set each bit to control whether corresponding key can only be deployed once. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds; bit4:psram', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[22]', bloc: 'B14[6]'}
+  FORCE_USE_KEY_MANAGER_KEY_H           : {show: y, blk : 0, word: 3, pos: 23, len  : 1, start: 119, type      : bool, wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'EFUSE_FORCE_USE_KEY_MANAGER_KEY and EFUSE_FORCE_USE_KEY_MANAGER_KEY_H together form one field: {EFUSE_FORCE_USE_KEY_MANAGER_KEY_H; EFUSE_FORCE_USE_KEY_MANAGER_KEY[3:0]}. Set each bit to control whether corresponding key must come from key manager. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds; bit4:psram', rloc: 'EFUSE_RD_REPEAT_DATA2_REG[23]', bloc: 'B14[7]'}
+  RESERVE_0_120                         : {show: n, blk : 0, word: 3, pos: 24, len  : 2, start: 120, type  : 'uint:2', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[25:24]', bloc: 'B15[1:0]'}
+  FLASH_ECC_EN                          : {show: y, blk : 0, word: 3, pos: 26, len  : 1, start: 122, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to enable ECC for flash boot, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[26]', bloc: 'B15[2]'}
+  DIS_USB_OTG_DOWNLOAD_MODE             : {show: y, blk : 0, word: 3, pos: 27, len  : 1, start: 123, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to disable download via USB-OTG, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[27]', bloc: 'B15[3]'}
+  FLASH_TPUW                            : {show: y, blk : 0, word: 3, pos: 28, len  : 4, start: 124, type  : 'uint:4', wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: Configures flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the configurable value. Otherwise; the waiting time is 30, rloc: 'EFUSE_RD_REPEAT_DATA2_REG[31:28]', bloc: 'B15[7:4]'}
+  DIS_DOWNLOAD_MODE                     : {show: y, blk : 0, word: 4, pos : 0, len  : 1, start: 128, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Set this bit to disable download mode (boot_mode[3:0] = 0; 1; 2; 4; 5; 6; 7)', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[0]', bloc: 'B16[0]'}
+  DIS_DIRECT_BOOT                       : {show: y, blk : 0, word: 4, pos : 1, len  : 1, start: 129, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to disable direct boot mode, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[1]', bloc: 'B16[1]'}
+  DIS_USB_SERIAL_JTAG_ROM_PRINT         : {show: y, blk : 0, word: 4, pos : 2, len  : 1, start: 130, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to disable USB-Serial-JTAG print during rom boot, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[2]', bloc: 'B16[2]'}
+  LOCK_KM_KEY                           : {show: y, blk : 0, word: 4, pos : 3, len  : 1, start: 131, type      : bool, wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: set this bit to lock the key manager key after deploy, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[3]', bloc: 'B16[3]'}
+  DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE     : {show: y, blk : 0, word: 4, pos : 4, len  : 1, start: 132, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to disable the USB-Serial-JTAG download function, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[4]', bloc: 'B16[4]'}
+  ENABLE_SECURITY_DOWNLOAD              : {show: y, blk : 0, word: 4, pos : 5, len  : 1, start: 133, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to enable security download mode, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[5]', bloc: 'B16[5]'}
+  UART_PRINT_CONTROL                    : {show: y, blk : 0, word: 4, pos : 6, len  : 2, start: 134, type  : 'uint:2', wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Set the type of UART printing; 00: force enable printing; 01: enable printing when GPIO8 is reset at low level; 10: enable printing when GPIO8 is reset at high level; 11: force disable printing', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[7:6]', bloc: 'B16[7:6]'}
+  FORCE_SEND_RESUME                     : {show: y, blk : 0, word: 4, pos : 8, len  : 1, start: 136, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to force ROM code to send a resume command during SPI boot, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[8]', bloc: 'B17[0]'}
+  SECURE_VERSION                        : {show: y, blk : 0, word: 4, pos : 9, len : 16, start: 137, type : 'uint:16', wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: Secure version used by ESP-IDF anti-rollback feature, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[24:9]', bloc: 'B17[7:1],B18,B19[0]'}
+  SECURE_BOOT_DISABLE_FAST_WAKE         : {show: y, blk : 0, word: 4, pos: 25, len  : 1, start: 153, type      : bool, wr_dis  : 18, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether secure boot do fast verification on wake is disabled. 0: enabled 1: disabled', rloc: 'EFUSE_RD_REPEAT_DATA3_REG[25]', bloc: 'B19[1]'}
+  HYS_EN_PAD                            : {show: y, blk : 0, word: 4, pos: 26, len  : 1, start: 154, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: Set bits to enable hysteresis function of PAD0~27, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[26]', bloc: 'B19[2]'}
+  KEY_PURPOSE_0_H                       : {show: y, blk : 0, word: 4, pos: 27, len  : 1, start: 155, type      : bool, wr_dis   : 8, rd_dis: null, alt                            : '', dict             : '', desc: Purpose of Key0. The 5-th bit, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[27]', bloc: 'B19[3]'}
+  KEY_PURPOSE_1_H                       : {show: y, blk : 0, word: 4, pos: 28, len  : 1, start: 156, type      : bool, wr_dis   : 9, rd_dis: null, alt                            : '', dict             : '', desc: Purpose of Key1. The 5-th bit, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[28]', bloc: 'B19[4]'}
+  KEY_PURPOSE_2_H                       : {show: y, blk : 0, word: 4, pos: 29, len  : 1, start: 157, type      : bool, wr_dis  : 10, rd_dis: null, alt                            : '', dict             : '', desc: Purpose of Key2. The 5-th bit, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[29]', bloc: 'B19[5]'}
+  KEY_PURPOSE_3_H                       : {show: y, blk : 0, word: 4, pos: 30, len  : 1, start: 158, type      : bool, wr_dis  : 11, rd_dis: null, alt                            : '', dict             : '', desc: Purpose of Key3. The 5-th bit, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[30]', bloc: 'B19[6]'}
+  KEY_PURPOSE_4_H                       : {show: y, blk : 0, word: 4, pos: 31, len  : 1, start: 159, type      : bool, wr_dis  : 12, rd_dis: null, alt                            : '', dict             : '', desc: Purpose of Key4. The 5-th bit, rloc: 'EFUSE_RD_REPEAT_DATA3_REG[31]', bloc: 'B19[7]'}
+  PXA0_TIEH_SEL_0                       : {show: y, blk : 0, word: 5, pos : 0, len  : 2, start: 160, type  : 'uint:2', wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: 'Output LDO VO0 tieh source select. 0: 1''b1 1: sdmmc1 2: reg 3:sdmmc0', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[1:0]', bloc: 'B20[1:0]'}
+  PVT_GLITCH_EN                         : {show: y, blk : 0, word: 5, pos : 2, len  : 1, start: 162, type      : bool, wr_dis   : 3, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether to enable PVT power glitch monitor function.1:Enable. 0:Disable', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[2]', bloc: 'B20[2]'}
+  RESERVE_0_163                         : {show: n, blk : 0, word: 5, pos : 3, len  : 1, start: 163, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[3]', bloc: 'B20[3]'}
+  KEY_PURPOSE_5_H                       : {show: y, blk : 0, word: 5, pos : 4, len  : 1, start: 164, type      : bool, wr_dis  : 13, rd_dis: null, alt                            : '', dict             : '', desc: Purpose of Key5. The 5-th bit, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[4]', bloc: 'B20[4]'}
+  RESERVE_0_165                         : {show: n, blk : 0, word: 5, pos : 5, len  : 2, start: 165, type  : 'uint:2', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[6:5]', bloc: 'B20[6:5]'}
+  KM_DISABLE_DEPLOY_MODE_H              : {show: y, blk : 0, word: 5, pos : 7, len  : 1, start: 167, type      : bool, wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'EFUSE_KM_DISABLE_DEPLOY_MODE and EFUSE_KM_DISABLE_DEPLOY_MODE_H together form one field: {EFUSE_KM_DISABLE_DEPLOY_MODE_H; EFUSE_KM_DISABLE_DEPLOY_MODE[3:0]}. Set each bit to control whether corresponding key''s deploy mode of new value deployment is disabled. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds; bit4:psram', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[7]', bloc: 'B20[7]'}
+  KM_DISABLE_DEPLOY_MODE                : {show: y, blk : 0, word: 5, pos : 8, len  : 4, start: 168, type  : 'uint:4', wr_dis   : 1, rd_dis: null, alt                            : '', dict             : '', desc: 'EFUSE_KM_DISABLE_DEPLOY_MODE and EFUSE_KM_DISABLE_DEPLOY_MODE_H together form one field: {EFUSE_KM_DISABLE_DEPLOY_MODE_H; EFUSE_KM_DISABLE_DEPLOY_MODE[3:0]}. Set each bit to control whether corresponding key''s deploy mode of new value deployment is disabled. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds; bit4:psram', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[11:8]', bloc: 'B21[3:0]'}
+  RESERVE_0_172                         : {show: n, blk : 0, word: 5, pos: 12, len  : 4, start: 172, type  : 'uint:4', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[15:12]', bloc: 'B21[7:4]'}
+  XTS_DPA_PSEUDO_LEVEL                  : {show: y, blk : 0, word: 5, pos: 16, len  : 2, start: 176, type  : 'uint:2', wr_dis  : 14, rd_dis: null, alt                            : '', dict             : '', desc: 'Sets this bit to control the xts pseudo-round anti-dpa attack function. 0: controlled by register. 1-3: the higher the value is; the more pseudo-rounds are inserted to the xts-aes calculation', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[17:16]', bloc: 'B22[1:0]'}
+  HP_PWR_SRC_SEL                        : {show: y, blk : 0, word: 5, pos: 18, len  : 1, start: 178, type      : bool, wr_dis  : 17, rd_dis: null, alt                            : '', dict             : '', desc: 'HP system power source select. 0:LDO  1: DCDC', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[18]', bloc: 'B22[2]'}
+  SECURE_BOOT_SHA384_EN                 : {show: y, blk : 0, word: 5, pos: 19, len  : 1, start: 179, type      : bool, wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: 'Represents whether secure boot using SHA-384 is enabled. 0: disable 1: enable', rloc: 'EFUSE_RD_REPEAT_DATA4_REG[19]', bloc: 'B22[3]'}
+  DIS_WDT                               : {show: y, blk : 0, word: 5, pos: 20, len  : 1, start: 180, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: Set this bit to disable watch dog, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[20]', bloc: 'B22[4]'}
+  DIS_SWD                               : {show: y, blk : 0, word: 5, pos: 21, len  : 1, start: 181, type      : bool, wr_dis   : 2, rd_dis: null, alt                            : '', dict             : '', desc: Set bit to disable super-watchdog, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[21]', bloc: 'B22[5]'}
+  PVT_GLITCH_MODE                       : {show: y, blk : 0, word: 5, pos: 22, len  : 2, start: 182, type  : 'uint:2', wr_dis   : 3, rd_dis: null, alt                            : '', dict             : '', desc: Use to configure glitch mode, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[23:22]', bloc: 'B22[7:6]'}
+  RESERVE_0_184                         : {show: n, blk : 0, word: 5, pos: 24, len  : 8, start: 184, type  : 'uint:8', wr_dis: null, rd_dis: null, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_REPEAT_DATA4_REG[31:24]', bloc: B23}
+  MAC                                   : {show: y, blk : 1, word: 0, pos : 0, len : 48, start  : 0, type : 'bytes:6', wr_dis  : 20, rd_dis: null, alt                   : MAC_FACTORY, dict             : '', desc: MAC address, rloc: EFUSE_RD_MAC_SYS0_REG, bloc: 'B0,B1,B2,B3,B4,B5'}
+  RESERVE_1_48                          : {show: n, blk : 1, word: 1, pos: 16, len : 16, start : 48, type : 'uint:16', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_MAC_SYS1_REG[31:16]', bloc: 'B6,B7'}
+  WAFER_VERSION_MINOR                   : {show: y, blk : 1, word: 2, pos : 0, len  : 4, start : 64, type  : 'uint:4', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Minor chip version, rloc: 'EFUSE_RD_MAC_SYS2_REG[3:0]', bloc: 'B8[3:0]'}
+  WAFER_VERSION_MAJOR_LO                : {show: y, blk : 1, word: 2, pos : 4, len  : 2, start : 68, type  : 'uint:2', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Major chip version (lower 2 bits), rloc: 'EFUSE_RD_MAC_SYS2_REG[5:4]', bloc: 'B8[5:4]'}
+  DISABLE_WAFER_VERSION_MAJOR           : {show: y, blk : 1, word: 2, pos : 6, len  : 1, start : 70, type      : bool, wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Disables check of wafer version major, rloc: 'EFUSE_RD_MAC_SYS2_REG[6]', bloc: 'B8[6]'}
+  DISABLE_BLK_VERSION_MAJOR             : {show: y, blk : 1, word: 2, pos : 7, len  : 1, start : 71, type      : bool, wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Disables check of blk version major, rloc: 'EFUSE_RD_MAC_SYS2_REG[7]', bloc: 'B8[7]'}
+  BLK_VERSION_MINOR                     : {show: y, blk : 1, word: 2, pos : 8, len  : 3, start : 72, type  : 'uint:3', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: BLK_VERSION_MINOR of BLOCK2, rloc: 'EFUSE_RD_MAC_SYS2_REG[10:8]', bloc: 'B9[2:0]'}
+  BLK_VERSION_MAJOR                     : {show: y, blk : 1, word: 2, pos: 11, len  : 2, start : 75, type  : 'uint:2', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: BLK_VERSION_MAJOR of BLOCK2, rloc: 'EFUSE_RD_MAC_SYS2_REG[12:11]', bloc: 'B9[4:3]'}
+  PSRAM_CAP                             : {show: y, blk : 1, word: 2, pos: 13, len  : 3, start : 77, type  : 'uint:3', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: PSRAM capacity, rloc: 'EFUSE_RD_MAC_SYS2_REG[15:13]', bloc: 'B9[7:5]'}
+  TEMP                                  : {show: y, blk : 1, word: 2, pos: 16, len  : 2, start : 80, type  : 'uint:2', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Operating temperature of the ESP chip, rloc: 'EFUSE_RD_MAC_SYS2_REG[17:16]', bloc: 'B10[1:0]'}
+  PSRAM_VENDOR                          : {show: y, blk : 1, word: 2, pos: 18, len  : 2, start : 82, type  : 'uint:2', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: PSRAM vendor, rloc: 'EFUSE_RD_MAC_SYS2_REG[19:18]', bloc: 'B10[3:2]'}
+  PKG_VERSION                           : {show: y, blk : 1, word: 2, pos: 20, len  : 3, start : 84, type  : 'uint:3', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Package version, rloc: 'EFUSE_RD_MAC_SYS2_REG[22:20]', bloc: 'B10[6:4]'}
+  WAFER_VERSION_MAJOR_HI                : {show: y, blk : 1, word: 2, pos: 23, len  : 1, start : 87, type      : bool, wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Major chip version (MSB), rloc: 'EFUSE_RD_MAC_SYS2_REG[23]', bloc: 'B10[7]'}
+  LDO_VO1_DREF                          : {show: y, blk : 1, word: 2, pos: 24, len  : 4, start : 88, type  : 'uint:4', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Output VO1 parameter, rloc: 'EFUSE_RD_MAC_SYS2_REG[27:24]', bloc: 'B11[3:0]'}
+  LDO_VO2_DREF                          : {show: y, blk : 1, word: 2, pos: 28, len  : 4, start : 92, type  : 'uint:4', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Output VO2 parameter, rloc: 'EFUSE_RD_MAC_SYS2_REG[31:28]', bloc: 'B11[7:4]'}
+  LDO_VO1_MUL                           : {show: y, blk : 1, word: 3, pos : 0, len  : 3, start : 96, type  : 'uint:3', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Output VO1 parameter, rloc: 'EFUSE_RD_MAC_SYS3_REG[2:0]', bloc: 'B12[2:0]'}
+  LDO_VO2_MUL                           : {show: y, blk : 1, word: 3, pos : 3, len  : 3, start : 99, type  : 'uint:3', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Output VO2 parameter, rloc: 'EFUSE_RD_MAC_SYS3_REG[5:3]', bloc: 'B12[5:3]'}
+  LDO_VO3_K                             : {show: y, blk : 1, word: 3, pos : 6, len  : 8, start: 102, type  : 'uint:8', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Output VO3 calibration parameter, rloc: 'EFUSE_RD_MAC_SYS3_REG[13:6]', bloc: 'B12[7:6],B13[5:0]'}
+  LDO_VO3_VOS                           : {show: y, blk : 1, word: 3, pos: 14, len  : 6, start: 110, type  : 'uint:6', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Output VO3 calibration parameter, rloc: 'EFUSE_RD_MAC_SYS3_REG[19:14]', bloc: 'B13[7:6],B14[3:0]'}
+  LDO_VO3_C                             : {show: y, blk : 1, word: 3, pos: 20, len  : 6, start: 116, type  : 'uint:6', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Output VO3 calibration parameter, rloc: 'EFUSE_RD_MAC_SYS3_REG[25:20]', bloc: 'B14[7:4],B15[1:0]'}
+  LDO_VO4_K                             : {show: y, blk : 1, word: 3, pos: 26, len  : 8, start: 122, type  : 'uint:8', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Output VO4 calibration parameter, rloc: 'EFUSE_RD_MAC_SYS3_REG[31:26]', bloc: 'B15[7:2],B16[1:0]'}
+  LDO_VO4_VOS                           : {show: y, blk : 1, word: 4, pos : 2, len  : 6, start: 130, type  : 'uint:6', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Output VO4 calibration parameter, rloc: 'EFUSE_RD_MAC_SYS4_REG[7:2]', bloc: 'B16[7:2]'}
+  LDO_VO4_C                             : {show: y, blk : 1, word: 4, pos : 8, len  : 6, start: 136, type  : 'uint:6', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Output VO4 calibration parameter, rloc: 'EFUSE_RD_MAC_SYS4_REG[13:8]', bloc: 'B17[5:0]'}
+  RESERVED_1_142                        : {show: n, blk : 1, word: 4, pos: 14, len  : 2, start: 142, type  : 'uint:2', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: reserved, rloc: 'EFUSE_RD_MAC_SYS4_REG[15:14]', bloc: 'B17[7:6]'}
+  ACTIVE_HP_DBIAS                       : {show: y, blk : 1, word: 4, pos: 16, len  : 4, start: 144, type  : 'uint:4', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Active HP DBIAS of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS4_REG[19:16]', bloc: 'B18[3:0]'}
+  ACTIVE_LP_DBIAS                       : {show: y, blk : 1, word: 4, pos: 20, len  : 4, start: 148, type  : 'uint:4', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: Active LP DBIAS of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS4_REG[23:20]', bloc: 'B18[7:4]'}
+  RESERVED_1_152                        : {show: n, blk : 1, word: 4, pos: 24, len  : 4, start: 152, type  : 'uint:4', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: reserved, rloc: 'EFUSE_RD_MAC_SYS4_REG[27:24]', bloc: 'B19[3:0]'}
+  DSLP_DBG                              : {show: y, blk : 1, word: 4, pos: 28, len  : 4, start: 156, type  : 'uint:4', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: DSLP BDG of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS4_REG[31:28]', bloc: 'B19[7:4]'}
+  DSLP_LP_DBIAS                         : {show: y, blk : 1, word: 5, pos : 0, len  : 5, start: 160, type  : 'uint:5', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: DSLP LP DBIAS of fixed voltage, rloc: 'EFUSE_RD_MAC_SYS5_REG[4:0]', bloc: 'B20[4:0]'}
+  LP_DCDC_DBIAS_VOL_GAP                 : {show: y, blk : 1, word: 5, pos : 5, len  : 5, start: 165, type  : 'uint:5', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: DBIAS gap between LP and DCDC, rloc: 'EFUSE_RD_MAC_SYS5_REG[9:5]', bloc: 'B20[7:5],B21[1:0]'}
+  RESERVED_1_170                        : {show: n, blk : 1, word: 5, pos: 10, len  : 1, start: 170, type      : bool, wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: reserved, rloc: 'EFUSE_RD_MAC_SYS5_REG[10]', bloc: 'B21[2]'}
+  PVT_400M_BIAS                         : {show: y, blk : 1, word: 5, pos: 11, len  : 5, start: 171, type  : 'uint:5', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: PVT_DCM_VSET when the CPU is at 400M, rloc: 'EFUSE_RD_MAC_SYS5_REG[15:11]', bloc: 'B21[7:3]'}
+  PVT_40M_BIAS                          : {show: y, blk : 1, word: 5, pos: 16, len  : 5, start: 176, type  : 'uint:5', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: PVT_DCM_VSET corresponding to about 0.9V fixed voltage when the CPU is at 40M, rloc: 'EFUSE_RD_MAC_SYS5_REG[20:16]', bloc: 'B22[4:0]'}
+  PVT_100M_BIAS                         : {show: y, blk : 1, word: 5, pos: 21, len  : 5, start: 181, type  : 'uint:5', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: PVT_DCM_VSET corresponding to about 1.0V fixed voltage when the CPU is at 100M, rloc: 'EFUSE_RD_MAC_SYS5_REG[25:21]', bloc: 'B22[7:5],B23[1:0]'}
+  RESERVED_1_186                        : {show: n, blk : 1, word: 5, pos: 26, len  : 6, start: 186, type  : 'uint:6', wr_dis  : 20, rd_dis: null, alt                            : '', dict             : '', desc: reserved, rloc: 'EFUSE_RD_MAC_SYS5_REG[31:26]', bloc: 'B23[7:2]'}
+  OPTIONAL_UNIQUE_ID                    : {show: y, blk : 2, word: 0, pos : 0, len: 128, start  : 0, type: 'bytes:16', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Optional unique 128-bit ID, rloc: EFUSE_RD_SYS_PART1_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15'}
+  ADC1_AVE_INITCODE_ATTEN0              : {show: y, blk : 2, word: 4, pos : 0, len : 10, start: 128, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Average initcode of ADC1 atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[9:0]', bloc: 'B16,B17[1:0]'}
+  ADC1_AVE_INITCODE_ATTEN1              : {show: y, blk : 2, word: 4, pos: 10, len : 10, start: 138, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Average initcode of ADC1 atten1, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[19:10]', bloc: 'B17[7:2],B18[3:0]'}
+  ADC1_AVE_INITCODE_ATTEN2              : {show: y, blk : 2, word: 4, pos: 20, len : 10, start: 148, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Average initcode of ADC1 atten2, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[29:20]', bloc: 'B18[7:4],B19[5:0]'}
+  ADC1_AVE_INITCODE_ATTEN3              : {show: y, blk : 2, word: 4, pos: 30, len : 10, start: 158, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Average initcode of ADC1 atten3, rloc: 'EFUSE_RD_SYS_PART1_DATA4_REG[31:30]', bloc: 'B19[7:6],B20'}
+  ADC2_AVE_INITCODE_ATTEN0              : {show: y, blk : 2, word: 5, pos : 8, len : 10, start: 168, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Average initcode of ADC2 atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA5_REG[17:8]', bloc: 'B21,B22[1:0]'}
+  ADC2_AVE_INITCODE_ATTEN1              : {show: y, blk : 2, word: 5, pos: 18, len : 10, start: 178, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Average initcode of ADC2 atten1, rloc: 'EFUSE_RD_SYS_PART1_DATA5_REG[27:18]', bloc: 'B22[7:2],B23[3:0]'}
+  ADC2_AVE_INITCODE_ATTEN2              : {show: y, blk : 2, word: 5, pos: 28, len : 10, start: 188, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Average initcode of ADC2 atten2, rloc: 'EFUSE_RD_SYS_PART1_DATA5_REG[31:28]', bloc: 'B23[7:4],B24[5:0]'}
+  ADC2_AVE_INITCODE_ATTEN3              : {show: y, blk : 2, word: 6, pos : 6, len : 10, start: 198, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: Average initcode of ADC2 atten3, rloc: 'EFUSE_RD_SYS_PART1_DATA6_REG[15:6]', bloc: 'B24[7:6],B25'}
+  ADC1_HI_DOUT_ATTEN0                   : {show: y, blk : 2, word: 6, pos: 16, len : 10, start: 208, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: HI_DOUT of ADC1 atten0, rloc: 'EFUSE_RD_SYS_PART1_DATA6_REG[25:16]', bloc: 'B26,B27[1:0]'}
+  ADC1_HI_DOUT_ATTEN1                   : {show: y, blk : 2, word: 6, pos: 26, len : 10, start: 218, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: HI_DOUT of ADC1 atten1, rloc: 'EFUSE_RD_SYS_PART1_DATA6_REG[31:26]', bloc: 'B27[7:2],B28[3:0]'}
+  ADC1_HI_DOUT_ATTEN2                   : {show: y, blk : 2, word: 7, pos : 4, len : 10, start: 228, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: HI_DOUT of ADC1 atten2, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[13:4]', bloc: 'B28[7:4],B29[5:0]'}
+  ADC1_HI_DOUT_ATTEN3                   : {show: y, blk : 2, word: 7, pos: 14, len : 10, start: 238, type : 'uint:10', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: HI_DOUT of ADC1 atten3, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[23:14]', bloc: 'B29[7:6],B30'}
+  RESERVED_2_248                        : {show: n, blk : 2, word: 7, pos: 24, len  : 8, start: 248, type  : 'uint:8', wr_dis  : 21, rd_dis: null, alt                            : '', dict             : '', desc: reserved, rloc: 'EFUSE_RD_SYS_PART1_DATA7_REG[31:24]', bloc: B31}
+  BLOCK_USR_DATA                        : {show: y, blk : 3, word: 0, pos : 0, len: 192, start  : 0, type: 'bytes:24', wr_dis  : 22, rd_dis: null, alt                     : USER_DATA, dict             : '', desc: User data, rloc: EFUSE_RD_USR_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23'}
+  RESERVED_3_192                        : {show: n, blk : 3, word: 6, pos : 0, len  : 8, start: 192, type  : 'uint:8', wr_dis  : 22, rd_dis: null, alt                            : '', dict             : '', desc: reserved, rloc: 'EFUSE_RD_USR_DATA6_REG[7:0]', bloc: B24}
+  CUSTOM_MAC                            : {show: y, blk : 3, word: 6, pos : 8, len : 48, start: 200, type : 'bytes:6', wr_dis  : 22, rd_dis: null, alt: MAC_CUSTOM USER_DATA_MAC_CUSTOM, dict             : '', desc: Custom MAC, rloc: 'EFUSE_RD_USR_DATA6_REG[31:8]', bloc: 'B25,B26,B27,B28,B29,B30'}
+  RESERVED_3_248                        : {show: n, blk : 3, word: 7, pos: 24, len  : 8, start: 248, type  : 'uint:8', wr_dis  : 22, rd_dis: null, alt                            : '', dict             : '', desc: reserved, rloc: 'EFUSE_RD_USR_DATA7_REG[31:24]', bloc: B31}
+  BLOCK_KEY0                            : {show: y, blk : 4, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 23, rd_dis   : 0, alt                          : KEY0, dict             : '', desc: Key0 or user data, rloc: EFUSE_RD_KEY0_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
+  BLOCK_KEY1                            : {show: y, blk : 5, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 24, rd_dis   : 1, alt                          : KEY1, dict             : '', desc: Key1 or user data, rloc: EFUSE_RD_KEY1_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
+  BLOCK_KEY2                            : {show: y, blk : 6, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 25, rd_dis   : 2, alt                          : KEY2, dict             : '', desc: Key2 or user data, rloc: EFUSE_RD_KEY2_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
+  BLOCK_KEY3                            : {show: y, blk : 7, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 26, rd_dis   : 3, alt                          : KEY3, dict             : '', desc: Key3 or user data, rloc: EFUSE_RD_KEY3_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
+  BLOCK_KEY4                            : {show: y, blk : 8, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 27, rd_dis   : 4, alt                          : KEY4, dict             : '', desc: Key4 or user data, rloc: EFUSE_RD_KEY4_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
+  BLOCK_KEY5                            : {show: y, blk : 9, word: 0, pos : 0, len: 256, start  : 0, type: 'bytes:32', wr_dis  : 28, rd_dis   : 5, alt                          : KEY5, dict             : '', desc: Key5 or user data, rloc: EFUSE_RD_KEY5_DATA0_REG, bloc: 'B0,B1,B2,B3,B4,B5,B6,B7,B8,B9,B10,B11,B12,B13,B14,B15,B16,B17,B18,B19,B20,B21,B22,B23,B24,B25,B26,B27,B28,B29,B30,B31'}
+  ADC2_HI_DOUT_ATTEN0                   : {show: y, blk: 10, word: 0, pos : 0, len : 10, start  : 0, type : 'uint:10', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: HI_DOUT of ADC2 atten0, rloc: 'EFUSE_RD_SYS_PART2_DATA0_REG[9:0]', bloc: 'B0,B1[1:0]'}
+  ADC2_HI_DOUT_ATTEN1                   : {show: y, blk: 10, word: 0, pos: 10, len : 10, start : 10, type : 'uint:10', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: HI_DOUT of ADC2 atten1, rloc: 'EFUSE_RD_SYS_PART2_DATA0_REG[19:10]', bloc: 'B1[7:2],B2[3:0]'}
+  ADC2_HI_DOUT_ATTEN2                   : {show: y, blk: 10, word: 0, pos: 20, len : 10, start : 20, type : 'uint:10', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: HI_DOUT of ADC2 atten2, rloc: 'EFUSE_RD_SYS_PART2_DATA0_REG[29:20]', bloc: 'B2[7:4],B3[5:0]'}
+  ADC2_HI_DOUT_ATTEN3                   : {show: y, blk: 10, word: 0, pos: 30, len : 10, start : 30, type : 'uint:10', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: HI_DOUT of ADC2 atten3, rloc: 'EFUSE_RD_SYS_PART2_DATA0_REG[31:30]', bloc: 'B3[7:6],B4'}
+  ADC1_CH0_ATTEN0_INITCODE_DIFF         : {show: y, blk: 10, word: 1, pos : 8, len  : 4, start : 40, type  : 'uint:4', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Gap between ADC1_ch0 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA1_REG[11:8]', bloc: 'B5[3:0]'}
+  ADC1_CH1_ATTEN0_INITCODE_DIFF         : {show: y, blk: 10, word: 1, pos: 12, len  : 4, start : 44, type  : 'uint:4', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Gap between ADC1_ch1 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA1_REG[15:12]', bloc: 'B5[7:4]'}
+  ADC1_CH2_ATTEN0_INITCODE_DIFF         : {show: y, blk: 10, word: 1, pos: 16, len  : 4, start : 48, type  : 'uint:4', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Gap between ADC1_ch2 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA1_REG[19:16]', bloc: 'B6[3:0]'}
+  ADC1_CH3_ATTEN0_INITCODE_DIFF         : {show: y, blk: 10, word: 1, pos: 20, len  : 4, start : 52, type  : 'uint:4', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Gap between ADC1_ch3 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA1_REG[23:20]', bloc: 'B6[7:4]'}
+  ADC1_CH4_ATTEN0_INITCODE_DIFF         : {show: y, blk: 10, word: 1, pos: 24, len  : 4, start : 56, type  : 'uint:4', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Gap between ADC1_ch4 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA1_REG[27:24]', bloc: 'B7[3:0]'}
+  ADC1_CH5_ATTEN0_INITCODE_DIFF         : {show: y, blk: 10, word: 1, pos: 28, len  : 4, start : 60, type  : 'uint:4', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Gap between ADC1_ch5 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA1_REG[31:28]', bloc: 'B7[7:4]'}
+  ADC1_CH6_ATTEN0_INITCODE_DIFF         : {show: y, blk: 10, word: 2, pos : 0, len  : 4, start : 64, type  : 'uint:4', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Gap between ADC1_ch6 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA2_REG[3:0]', bloc: 'B8[3:0]'}
+  ADC1_CH7_ATTEN0_INITCODE_DIFF         : {show: y, blk: 10, word: 2, pos : 4, len  : 4, start : 68, type  : 'uint:4', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Gap between ADC1_ch7 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA2_REG[7:4]', bloc: 'B8[7:4]'}
+  ADC2_CH0_ATTEN0_INITCODE_DIFF         : {show: y, blk: 10, word: 2, pos : 8, len  : 4, start : 72, type  : 'uint:4', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Gap between ADC2_ch0 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA2_REG[11:8]', bloc: 'B9[3:0]'}
+  ADC2_CH1_ATTEN0_INITCODE_DIFF         : {show: y, blk: 10, word: 2, pos: 12, len  : 4, start : 76, type  : 'uint:4', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Gap between ADC2_ch1 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA2_REG[15:12]', bloc: 'B9[7:4]'}
+  ADC2_CH2_ATTEN0_INITCODE_DIFF         : {show: y, blk: 10, word: 2, pos: 16, len  : 4, start : 80, type  : 'uint:4', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Gap between ADC2_ch2 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA2_REG[19:16]', bloc: 'B10[3:0]'}
+  ADC2_CH3_ATTEN0_INITCODE_DIFF         : {show: y, blk: 10, word: 2, pos: 20, len  : 4, start : 84, type  : 'uint:4', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Gap between ADC2_ch3 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA2_REG[23:20]', bloc: 'B10[7:4]'}
+  ADC2_CH4_ATTEN0_INITCODE_DIFF         : {show: y, blk: 10, word: 2, pos: 24, len  : 4, start : 88, type  : 'uint:4', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Gap between ADC2_ch4 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA2_REG[27:24]', bloc: 'B11[3:0]'}
+  ADC2_CH5_ATTEN0_INITCODE_DIFF         : {show: y, blk: 10, word: 2, pos: 28, len  : 4, start : 92, type  : 'uint:4', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Gap between ADC2_ch5 and average initcode, rloc: 'EFUSE_RD_SYS_PART2_DATA2_REG[31:28]', bloc: 'B11[7:4]'}
+  TEMPERATURE_SENSOR                    : {show: y, blk: 10, word: 3, pos : 0, len : 10, start : 96, type : 'uint:10', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Temperature calibration data, rloc: 'EFUSE_RD_SYS_PART2_DATA3_REG[9:0]', bloc: 'B12,B13[1:0]'}
+  RESERVED_10_106                       : {show: n, blk: 10, word: 3, pos: 10, len : 22, start: 106, type : 'uint:22', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: reserved, rloc: 'EFUSE_RD_SYS_PART2_DATA3_REG[31:10]', bloc: 'B13[7:2],B14,B15'}
+  SYS_DATA_PART2_4                      : {show: n, blk: 10, word: 4, pos : 0, len : 32, start: 128, type : 'uint:32', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Represents the fourth 32-bit of second part of system data, rloc: EFUSE_RD_SYS_PART2_DATA4_REG, bloc: 'B16,B17,B18,B19'}
+  SYS_DATA_PART2_5                      : {show: n, blk: 10, word: 5, pos : 0, len : 32, start: 160, type : 'uint:32', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Represents the fifth 32-bit of second part of system data, rloc: EFUSE_RD_SYS_PART2_DATA5_REG, bloc: 'B20,B21,B22,B23'}
+  PVT_LIMIT                             : {show: n, blk: 10, word: 6, pos : 0, len : 16, start: 192, type : 'uint:16', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Power glitch monitor threthold, rloc: 'EFUSE_RD_SYS_PART2_DATA6_REG[15:0]', bloc: 'B24,B25'}
+  PVT_PUMP_LIMIT                        : {show: n, blk: 10, word: 6, pos: 16, len  : 8, start: 208, type  : 'uint:8', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Use to configure voltage monitor limit for charge pump, rloc: 'EFUSE_RD_SYS_PART2_DATA6_REG[23:16]', bloc: B26}
+  PVT_CELL_SELECT                       : {show: n, blk: 10, word: 6, pos: 24, len  : 7, start: 216, type  : 'uint:7', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Power glitch monitor PVT cell select, rloc: 'EFUSE_RD_SYS_PART2_DATA6_REG[30:24]', bloc: 'B27[6:0]'}
+  RESERVE_10_223                        : {show: n, blk: 10, word: 6, pos: 31, len  : 1, start: 223, type      : bool, wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_SYS_PART2_DATA6_REG[31]', bloc: 'B27[7]'}
+  PUMP_DRV                              : {show: n, blk: 10, word: 7, pos : 0, len  : 4, start: 224, type  : 'uint:4', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Use to configure charge pump voltage gain, rloc: 'EFUSE_RD_SYS_PART2_DATA7_REG[3:0]', bloc: 'B28[3:0]'}
+  USB_DEVICE_EXCHG_PINS                 : {show: y, blk: 10, word: 7, pos : 4, len  : 1, start: 228, type      : bool, wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Enable usb device exchange pins of D+ and D-, rloc: 'EFUSE_RD_SYS_PART2_DATA7_REG[4]', bloc: 'B28[4]'}
+  USB_OTG11_EXCHG_PINS                  : {show: y, blk: 10, word: 7, pos : 5, len  : 1, start: 229, type      : bool, wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Enable usb otg11 exchange pins of D+ and D-, rloc: 'EFUSE_RD_SYS_PART2_DATA7_REG[5]', bloc: 'B28[5]'}
+  USB_DEVICE_DREFH                      : {show: n, blk: 10, word: 7, pos : 6, len  : 2, start: 230, type  : 'uint:2', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: usb intphy of usb device single-end input high threshold; 1.76V to 2V. step by 80mV, rloc: 'EFUSE_RD_SYS_PART2_DATA7_REG[7:6]', bloc: 'B28[7:6]'}
+  USB_OTG11_DREFH                       : {show: n, blk: 10, word: 7, pos : 8, len  : 2, start: 232, type  : 'uint:2', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: usb intphy of usb otg11 single-end input high threshold; 1.76V to 2V. step by 80mV, rloc: 'EFUSE_RD_SYS_PART2_DATA7_REG[9:8]', bloc: 'B29[1:0]'}
+  USB_DEVICE_DREFL                      : {show: n, blk: 10, word: 7, pos: 10, len  : 2, start: 234, type  : 'uint:2', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: usb intphy of usb device single-end input low threshold; 0.8V to 1.04V. step by 80mV, rloc: 'EFUSE_RD_SYS_PART2_DATA7_REG[11:10]', bloc: 'B29[3:2]'}
+  USB_OTG11_DREFL                       : {show: n, blk: 10, word: 7, pos: 12, len  : 2, start: 236, type  : 'uint:2', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: usb intphy of usb otg11 single-end input low threshold; 0.8V to 1.04V. step by 80mV, rloc: 'EFUSE_RD_SYS_PART2_DATA7_REG[13:12]', bloc: 'B29[5:4]'}
+  RESERVE_10_238                        : {show: n, blk: 10, word: 7, pos: 14, len : 18, start: 238, type : 'uint:18', wr_dis  : 29, rd_dis   : 6, alt                            : '', dict             : '', desc: Reserved; it was created by set_missed_fields_in_regs func, rloc: 'EFUSE_RD_SYS_PART2_DATA7_REG[31:14]', bloc: 'B29[7:6],B30,B31'}

{esptool-4.10.dev2 → esptool-4.11.dev1}/espsecure/__init__.py

@@ -853,10 +853,7 @@ def verify_signature_v2(args):
 
     vk = _get_sbv2_pub_key(keyfile)
 
-    if isinstance(vk, rsa.RSAPublicKey):
-        SIG_BLOCK_MAX_COUNT = 3
-    elif isinstance(vk, ec.EllipticCurvePublicKey):
-        SIG_BLOCK_MAX_COUNT = 1
+    SIG_BLOCK_MAX_COUNT = 3
 
     image_content = args.datafile.read()
     if len(image_content) < SECTOR_SIZE or len(image_content) % SECTOR_SIZE != 0:

{esptool-4.10.dev2 → esptool-4.11.dev1}/esptool/__init__.py

@@ -29,7 +29,7 @@ __all__ = [
     "write_mem",
 ]
 
-__version__ = "4.10.dev2"
+__version__ = "4.11.dev1"
 
 import argparse
 import inspect