diffsynth-engine 0.3.6.dev10__tar.gz → 0.3.6.dev12__tar.gz

{diffsynth_engine-0.3.6.dev10 → diffsynth_engine-0.3.6.dev12}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: diffsynth_engine
-Version: 0.3.6.dev10
+Version: 0.3.6.dev12
 Author: MuseAI x ModelScope
 Classifier: Programming Language :: Python :: 3
 Classifier: Operating System :: OS Independent

{diffsynth_engine-0.3.6.dev10 → diffsynth_engine-0.3.6.dev12}/diffsynth_engine/__init__.py

@@ -3,13 +3,14 @@ from .configs import (
     SDXLPipelineConfig,
     FluxPipelineConfig,
     WanPipelineConfig,
+    ControlNetParams,
+    ControlType,
 )
 from .pipelines import (
     FluxImagePipeline,
     SDXLImagePipeline,
     SDImagePipeline,
     WanVideoPipeline,
-    ControlNetParams,
 )
 from .models.flux import FluxControlNet, FluxIPAdapter, FluxRedux
 from .models.sd import SDControlNet
@@ -44,6 +45,7 @@ __all__ = [
     "FluxReplaceByControlTool",
     "FluxReduxRefTool",
     "ControlNetParams",
+    "ControlType",
     "fetch_model",
     "fetch_modelscope_model",
     "fetch_civitai_model",

{diffsynth_engine-0.3.6.dev10 → diffsynth_engine-0.3.6.dev12}/diffsynth_engine/configs/__init__.py

@@ -8,7 +8,7 @@ from .pipeline import (
     FluxPipelineConfig,
     WanPipelineConfig,
 )
-from .controlnet import ControlType
+from .controlnet import ControlType, ControlNetParams
 
 __all__ = [
     "BaseConfig",
@@ -20,4 +20,5 @@ __all__ = [
     "FluxPipelineConfig",
     "WanPipelineConfig",
     "ControlType",
+    "ControlNetParams",
 ]

diffsynth_engine-0.3.6.dev10/diffsynth_engine/pipelines/controlnet_helper.py → diffsynth_engine-0.3.6.dev12/diffsynth_engine/configs/controlnet.py

@@ -1,12 +1,30 @@
+from dataclasses import dataclass
+from enum import Enum
+
 import torch
 import torch.nn as nn
 from typing import List, Union, Optional
 from PIL import Image
-from dataclasses import dataclass
 
 ImageType = Union[Image.Image, torch.Tensor, List[Image.Image], List[torch.Tensor]]
 
 
+# FLUX ControlType
+class ControlType(Enum):
+    normal = "normal"
+    bfl_control = "bfl_control"
+    bfl_fill = "bfl_fill"
+    bfl_kontext = "bfl_kontext"
+
+    def get_in_channel(self):
+        if self in [ControlType.normal, ControlType.bfl_kontext]:
+            return 64
+        elif self == ControlType.bfl_control:
+            return 128
+        elif self == ControlType.bfl_fill:
+            return 384
+
+
 @dataclass
 class ControlNetParams:
     image: ImageType
@@ -16,11 +34,3 @@ class ControlNetParams:
     control_start: float = 0
     control_end: float = 1
     processor_name: Optional[str] = None  # only used for sdxl controlnet union now
-
-
-def accumulate(result, new_item):
-    if result is None:
-        return new_item
-    for i, item in enumerate(new_item):
-        result[i] += item
-    return result

{diffsynth_engine-0.3.6.dev10 → diffsynth_engine-0.3.6.dev12}/diffsynth_engine/models/flux/flux_dit_fbcache.py

@@ -188,7 +188,7 @@ class FluxDiTFBCache(FluxDiT):
         dtype: torch.dtype,
         in_channel: int = 64,
         attn_kwargs: Optional[Dict[str, Any]] = None,
-        fb_cache_relative_l1_threshold: float = 0.05,
+        relative_l1_threshold: float = 0.05,
     ):
         with no_init_weights():
             model = torch.nn.utils.skip_init(
@@ -197,7 +197,7 @@ class FluxDiTFBCache(FluxDiT):
                 dtype=dtype,
                 in_channel=in_channel,
                 attn_kwargs=attn_kwargs,
-                fb_cache_relative_l1_threshold=fb_cache_relative_l1_threshold,
+                relative_l1_threshold=relative_l1_threshold,
             )
             model = model.requires_grad_(False)  # for loading gguf
         model.load_state_dict(state_dict, assign=True)

{diffsynth_engine-0.3.6.dev10 → diffsynth_engine-0.3.6.dev12}/diffsynth_engine/pipelines/__init__.py

@@ -1,5 +1,4 @@
 from .base import BasePipeline, LoRAStateDictConverter
-from .controlnet_helper import ControlNetParams
 from .flux_image import FluxImagePipeline
 from .sdxl_image import SDXLImagePipeline
 from .sd_image import SDImagePipeline
@@ -13,5 +12,4 @@ __all__ = [
     "SDXLImagePipeline",
     "SDImagePipeline",
     "WanVideoPipeline",
-    "ControlNetParams",
 ]

{diffsynth_engine-0.3.6.dev10 → diffsynth_engine-0.3.6.dev12}/diffsynth_engine/pipelines/flux_image.py

@@ -17,10 +17,10 @@ from diffsynth_engine.models.flux import (
     flux_dit_config,
     flux_text_encoder_config,
 )
-from diffsynth_engine.configs import FluxPipelineConfig, ControlType
+from diffsynth_engine.configs import FluxPipelineConfig, ControlType, ControlNetParams
 from diffsynth_engine.models.basic.lora import LoRAContext
 from diffsynth_engine.pipelines import BasePipeline, LoRAStateDictConverter
-from diffsynth_engine.pipelines.controlnet_helper import ControlNetParams, accumulate
+from diffsynth_engine.pipelines.utils import accumulate
 from diffsynth_engine.tokenizers import CLIPTokenizer, T5TokenizerFast
 from diffsynth_engine.algorithm.noise_scheduler import RecifitedFlowScheduler
 from diffsynth_engine.algorithm.sampler import FlowMatchEulerSampler

{diffsynth_engine-0.3.6.dev10 → diffsynth_engine-0.3.6.dev12}/diffsynth_engine/pipelines/sd_image.py

@@ -6,12 +6,12 @@ from typing import Callable, Dict, Optional, List
 from tqdm import tqdm
 from PIL import Image, ImageOps
 
-from diffsynth_engine.configs import SDPipelineConfig
+from diffsynth_engine.configs import SDPipelineConfig, ControlNetParams
 from diffsynth_engine.models.base import split_suffix
 from diffsynth_engine.models.basic.lora import LoRAContext
 from diffsynth_engine.models.sd import SDTextEncoder, SDVAEDecoder, SDVAEEncoder, SDUNet, sd_unet_config
 from diffsynth_engine.pipelines import BasePipeline, LoRAStateDictConverter
-from diffsynth_engine.pipelines.controlnet_helper import ControlNetParams, accumulate
+from diffsynth_engine.pipelines.utils import accumulate
 from diffsynth_engine.tokenizers import CLIPTokenizer
 from diffsynth_engine.algorithm.noise_scheduler import ScaledLinearScheduler
 from diffsynth_engine.algorithm.sampler import EulerSampler

{diffsynth_engine-0.3.6.dev10 → diffsynth_engine-0.3.6.dev12}/diffsynth_engine/pipelines/sdxl_image.py

@@ -6,7 +6,7 @@ from typing import Callable, Dict, Optional, List
 from tqdm import tqdm
 from PIL import Image, ImageOps
 
-from diffsynth_engine.configs import SDXLPipelineConfig
+from diffsynth_engine.configs import SDXLPipelineConfig, ControlNetParams
 from diffsynth_engine.models.base import split_suffix
 from diffsynth_engine.models.basic.lora import LoRAContext
 from diffsynth_engine.models.basic.timestep import TemporalTimesteps
@@ -19,7 +19,7 @@ from diffsynth_engine.models.sdxl import (
     sdxl_unet_config,
 )
 from diffsynth_engine.pipelines import BasePipeline, LoRAStateDictConverter
-from diffsynth_engine.pipelines.controlnet_helper import ControlNetParams, accumulate
+from diffsynth_engine.pipelines.utils import accumulate
 from diffsynth_engine.tokenizers import CLIPTokenizer
 from diffsynth_engine.algorithm.noise_scheduler import ScaledLinearScheduler
 from diffsynth_engine.algorithm.sampler import EulerSampler

diffsynth_engine-0.3.6.dev12/diffsynth_engine/pipelines/utils.py

@@ -0,0 +1,6 @@
+def accumulate(result, new_item):
+    if result is None:
+        return new_item
+    for i, item in enumerate(new_item):
+        result[i] += item
+    return result

{diffsynth_engine-0.3.6.dev10 → diffsynth_engine-0.3.6.dev12}/diffsynth_engine.egg-info/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: diffsynth_engine
-Version: 0.3.6.dev10
+Version: 0.3.6.dev12
 Author: MuseAI x ModelScope
 Classifier: Programming Language :: Python :: 3
 Classifier: Operating System :: OS Independent

{diffsynth_engine-0.3.6.dev10 → diffsynth_engine-0.3.6.dev12}/diffsynth_engine.egg-info/SOURCES.txt

@@ -123,10 +123,10 @@ diffsynth_engine/models/wan/wan_text_encoder.py
 diffsynth_engine/models/wan/wan_vae.py
 diffsynth_engine/pipelines/__init__.py
 diffsynth_engine/pipelines/base.py
-diffsynth_engine/pipelines/controlnet_helper.py
 diffsynth_engine/pipelines/flux_image.py
 diffsynth_engine/pipelines/sd_image.py
 diffsynth_engine/pipelines/sdxl_image.py
+diffsynth_engine/pipelines/utils.py
 diffsynth_engine/pipelines/wan_video.py
 diffsynth_engine/processor/__init__.py
 diffsynth_engine/processor/canny_processor.py

diffsynth_engine-0.3.6.dev10/diffsynth_engine/configs/controlnet.py

@@ -1,17 +0,0 @@
-from enum import Enum
-
-
-# FLUX ControlType
-class ControlType(Enum):
-    normal = "normal"
-    bfl_control = "bfl_control"
-    bfl_fill = "bfl_fill"
-    bfl_kontext = "bfl_kontext"
-
-    def get_in_channel(self):
-        if self in [ControlType.normal, ControlType.bfl_kontext]:
-            return 64
-        elif self == ControlType.bfl_control:
-            return 128
-        elif self == ControlType.bfl_fill:
-            return 384