cortex-unwind 1.1.0__tar.gz

cortex_unwind-1.1.0/LICENSE.txt

@@ -0,0 +1,21 @@
+MIT License
+
+Copyright (c) 2026 Trust & Thread
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.

cortex_unwind-1.1.0/PKG-INFO

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+Metadata-Version: 2.4
+Name: cortex-unwind
+Version: 1.1.0
+Summary: ARM Cortex-M HardFault stack frame unwinder and address mapper CLI
+Author-email: Trust & Thread <contact@trustandthread.com>
+License: MIT
+Project-URL: Homepage, https://www.trustandthread.com
+Project-URL: Bug Tracker, https://github.com/GaneshMba4066/cortex-unwind/issues
+Project-URL: Documentation, https://www.trustandthread.com/firmware-checklist/
+Keywords: arm,cortex-m,stm32,hardfault,stack,unwinder,debugging
+Classifier: Programming Language :: Python :: 3
+Classifier: License :: OSI Approved :: MIT License
+Classifier: Operating System :: OS Independent
+Classifier: Topic :: Software Development :: Embedded Systems
+Classifier: Topic :: Software Development :: Debuggers
+Requires-Python: >=3.6
+Description-Content-Type: text/markdown
+License-File: LICENSE.txt
+Dynamic: license-file
+
+\# cortex-unwind
+
+
+
+Zero-dependency CLI tool to decode ARM Cortex-M hardware stack frames and map
+
+crash sites to source lines via `arm-none-eabi-addr2line`.
+
+
+
+When a Cortex-M core takes a HardFault, hardware stacks 8 registers
+
+(`r0..r3, r12, lr, pc, xPSR`) onto the active stack. Paste those 8 words from a
+
+UART fault log or GDB (`x/8wx $sp`) and this tool gives you the crash site.
+
+
+
+Free \& Open Source (MIT) by \[Trust \& Thread](https://www.trustandthread.com).
+
+
+
+\## Installation
+
+
+
+pip install cortex-unwind
+
+
+
+Or run with zero install:
+
+
+
+curl -sL https://raw.githubusercontent.com/GaneshMba4066/cortex-unwind/main/cortex\_unwind.py | python3
+
+
+
+\## Quick Start
+
+
+
+Pass the 8 hardware-stacked registers (`R0` `R1` `R2` `R3` `R12` `LR` `PC` `xPSR`):
+
+
+
+cortex-unwind 0x0 0x1 0x20000000 0x40021000 0x0 0x08001255 0x08001290 0x21000000
+
+
+
+With an ELF file for instant symbol resolution of PC and LR:
+
+
+
+cortex-unwind 0x0 0x1 0x20000000 0x40021000 0x0 0x08001255 0x08001290 0x21000000 build/firmware.elf
+
+
+
+Got a raw hex dump from UART? Let `--auto` find the frame for you:
+
+
+
+cortex-unwind --auto "0x00 0x01 0x20000000 0x40021000 0x00 0x08001255 0x08001290 0x21000000"
+
+
+
+\## What you get
+
+
+
+\- Stacked register breakdown with Thumb-bit notes on PC/LR
+
+\- Execution state: IPSR → active exception (HardFault, NMI, IRQn...), APSR flags
+
+\- Thumb-bit validation (clear T-bit = corrupt PC, flagged immediately)
+
+\- `EXC\_RETURN` decoding of LR — MSP/PSP selection and basic (8-word) vs FP-extended (26-word) frame detection, per ARMv7-M/ARMv8-M bit 4 encoding
+
+\- `PC` and `LR` mapped to `function @ file:line` when an ELF and `arm-none-eabi-addr2line` are available
+
+\- EXC\_RETURN LRs are never symbolized (they aren't addresses — no misleading output)
+
+
+
+\## Requirements
+
+
+
+\- Python 3.6+, zero pip dependencies
+
+\- Optional: `arm-none-eabi-addr2line` (GNU Arm Embedded toolchain) + an unstripped `.elf` for source mapping
+
+
+
+\## Companion tools
+
+
+
+\- \[`cfsr-decode`](https://github.com/GaneshMba4066/cfsr-decode) — decode the CFSR/HFSR fault \*cause\*
+
+\- `cortex-unwind` (this tool) — decode the crash \*location\*
+
+\- \[Production Toolkit ($49)](https://www.trustandthread.com/toolkit/) — drop-in C HardFault handlers + runtime crash logging
+
+\- \[Firmware Crash Checklist (free)](https://www.trustandthread.com/firmware-checklist/)
+
+
+
+\## License
+
+
+
+MIT — Trust \& Thread
+

cortex_unwind-1.1.0/README.md

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+\# cortex-unwind
+
+
+
+Zero-dependency CLI tool to decode ARM Cortex-M hardware stack frames and map
+
+crash sites to source lines via `arm-none-eabi-addr2line`.
+
+
+
+When a Cortex-M core takes a HardFault, hardware stacks 8 registers
+
+(`r0..r3, r12, lr, pc, xPSR`) onto the active stack. Paste those 8 words from a
+
+UART fault log or GDB (`x/8wx $sp`) and this tool gives you the crash site.
+
+
+
+Free \& Open Source (MIT) by \[Trust \& Thread](https://www.trustandthread.com).
+
+
+
+\## Installation
+
+
+
+pip install cortex-unwind
+
+
+
+Or run with zero install:
+
+
+
+curl -sL https://raw.githubusercontent.com/GaneshMba4066/cortex-unwind/main/cortex\_unwind.py | python3
+
+
+
+\## Quick Start
+
+
+
+Pass the 8 hardware-stacked registers (`R0` `R1` `R2` `R3` `R12` `LR` `PC` `xPSR`):
+
+
+
+cortex-unwind 0x0 0x1 0x20000000 0x40021000 0x0 0x08001255 0x08001290 0x21000000
+
+
+
+With an ELF file for instant symbol resolution of PC and LR:
+
+
+
+cortex-unwind 0x0 0x1 0x20000000 0x40021000 0x0 0x08001255 0x08001290 0x21000000 build/firmware.elf
+
+
+
+Got a raw hex dump from UART? Let `--auto` find the frame for you:
+
+
+
+cortex-unwind --auto "0x00 0x01 0x20000000 0x40021000 0x00 0x08001255 0x08001290 0x21000000"
+
+
+
+\## What you get
+
+
+
+\- Stacked register breakdown with Thumb-bit notes on PC/LR
+
+\- Execution state: IPSR → active exception (HardFault, NMI, IRQn...), APSR flags
+
+\- Thumb-bit validation (clear T-bit = corrupt PC, flagged immediately)
+
+\- `EXC\_RETURN` decoding of LR — MSP/PSP selection and basic (8-word) vs FP-extended (26-word) frame detection, per ARMv7-M/ARMv8-M bit 4 encoding
+
+\- `PC` and `LR` mapped to `function @ file:line` when an ELF and `arm-none-eabi-addr2line` are available
+
+\- EXC\_RETURN LRs are never symbolized (they aren't addresses — no misleading output)
+
+
+
+\## Requirements
+
+
+
+\- Python 3.6+, zero pip dependencies
+
+\- Optional: `arm-none-eabi-addr2line` (GNU Arm Embedded toolchain) + an unstripped `.elf` for source mapping
+
+
+
+\## Companion tools
+
+
+
+\- \[`cfsr-decode`](https://github.com/GaneshMba4066/cfsr-decode) — decode the CFSR/HFSR fault \*cause\*
+
+\- `cortex-unwind` (this tool) — decode the crash \*location\*
+
+\- \[Production Toolkit ($49)](https://www.trustandthread.com/toolkit/) — drop-in C HardFault handlers + runtime crash logging
+
+\- \[Firmware Crash Checklist (free)](https://www.trustandthread.com/firmware-checklist/)
+
+
+
+\## License
+
+
+
+MIT — Trust \& Thread
+

cortex_unwind-1.1.0/cortex_unwind.egg-info/PKG-INFO

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+Metadata-Version: 2.4
+Name: cortex-unwind
+Version: 1.1.0
+Summary: ARM Cortex-M HardFault stack frame unwinder and address mapper CLI
+Author-email: Trust & Thread <contact@trustandthread.com>
+License: MIT
+Project-URL: Homepage, https://www.trustandthread.com
+Project-URL: Bug Tracker, https://github.com/GaneshMba4066/cortex-unwind/issues
+Project-URL: Documentation, https://www.trustandthread.com/firmware-checklist/
+Keywords: arm,cortex-m,stm32,hardfault,stack,unwinder,debugging
+Classifier: Programming Language :: Python :: 3
+Classifier: License :: OSI Approved :: MIT License
+Classifier: Operating System :: OS Independent
+Classifier: Topic :: Software Development :: Embedded Systems
+Classifier: Topic :: Software Development :: Debuggers
+Requires-Python: >=3.6
+Description-Content-Type: text/markdown
+License-File: LICENSE.txt
+Dynamic: license-file
+
+\# cortex-unwind
+
+
+
+Zero-dependency CLI tool to decode ARM Cortex-M hardware stack frames and map
+
+crash sites to source lines via `arm-none-eabi-addr2line`.
+
+
+
+When a Cortex-M core takes a HardFault, hardware stacks 8 registers
+
+(`r0..r3, r12, lr, pc, xPSR`) onto the active stack. Paste those 8 words from a
+
+UART fault log or GDB (`x/8wx $sp`) and this tool gives you the crash site.
+
+
+
+Free \& Open Source (MIT) by \[Trust \& Thread](https://www.trustandthread.com).
+
+
+
+\## Installation
+
+
+
+pip install cortex-unwind
+
+
+
+Or run with zero install:
+
+
+
+curl -sL https://raw.githubusercontent.com/GaneshMba4066/cortex-unwind/main/cortex\_unwind.py | python3
+
+
+
+\## Quick Start
+
+
+
+Pass the 8 hardware-stacked registers (`R0` `R1` `R2` `R3` `R12` `LR` `PC` `xPSR`):
+
+
+
+cortex-unwind 0x0 0x1 0x20000000 0x40021000 0x0 0x08001255 0x08001290 0x21000000
+
+
+
+With an ELF file for instant symbol resolution of PC and LR:
+
+
+
+cortex-unwind 0x0 0x1 0x20000000 0x40021000 0x0 0x08001255 0x08001290 0x21000000 build/firmware.elf
+
+
+
+Got a raw hex dump from UART? Let `--auto` find the frame for you:
+
+
+
+cortex-unwind --auto "0x00 0x01 0x20000000 0x40021000 0x00 0x08001255 0x08001290 0x21000000"
+
+
+
+\## What you get
+
+
+
+\- Stacked register breakdown with Thumb-bit notes on PC/LR
+
+\- Execution state: IPSR → active exception (HardFault, NMI, IRQn...), APSR flags
+
+\- Thumb-bit validation (clear T-bit = corrupt PC, flagged immediately)
+
+\- `EXC\_RETURN` decoding of LR — MSP/PSP selection and basic (8-word) vs FP-extended (26-word) frame detection, per ARMv7-M/ARMv8-M bit 4 encoding
+
+\- `PC` and `LR` mapped to `function @ file:line` when an ELF and `arm-none-eabi-addr2line` are available
+
+\- EXC\_RETURN LRs are never symbolized (they aren't addresses — no misleading output)
+
+
+
+\## Requirements
+
+
+
+\- Python 3.6+, zero pip dependencies
+
+\- Optional: `arm-none-eabi-addr2line` (GNU Arm Embedded toolchain) + an unstripped `.elf` for source mapping
+
+
+
+\## Companion tools
+
+
+
+\- \[`cfsr-decode`](https://github.com/GaneshMba4066/cfsr-decode) — decode the CFSR/HFSR fault \*cause\*
+
+\- `cortex-unwind` (this tool) — decode the crash \*location\*
+
+\- \[Production Toolkit ($49)](https://www.trustandthread.com/toolkit/) — drop-in C HardFault handlers + runtime crash logging
+
+\- \[Firmware Crash Checklist (free)](https://www.trustandthread.com/firmware-checklist/)
+
+
+
+\## License
+
+
+
+MIT — Trust \& Thread
+

cortex_unwind-1.1.0/cortex_unwind.egg-info/SOURCES.txt

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+LICENSE.txt
+README.md
+cortex_unwind.py
+pyproject.toml
+setup.cfg
+cortex_unwind.egg-info/PKG-INFO
+cortex_unwind.egg-info/SOURCES.txt
+cortex_unwind.egg-info/dependency_links.txt
+cortex_unwind.egg-info/entry_points.txt
+cortex_unwind.egg-info/top_level.txt

cortex_unwind-1.1.0/cortex_unwind.egg-info/dependency_links.txt

@@ -0,0 +1 @@
+

cortex_unwind-1.1.0/cortex_unwind.egg-info/entry_points.txt

@@ -0,0 +1,2 @@
+[console_scripts]
+cortex-unwind = cortex_unwind:main

cortex_unwind-1.1.0/cortex_unwind.egg-info/top_level.txt

@@ -0,0 +1 @@
+cortex_unwind

cortex_unwind-1.1.0/cortex_unwind.py

@@ -0,0 +1,253 @@
+#!/usr/bin/env python3
+"""
+cortex-unwind: ARM Cortex-M HardFault Stack Frame Unwinder
+Free & Open Source (MIT) by Trust & Thread — https://www.trustandthread.com
+
+Feed it the 8-word hardware-stacked frame (r0..r3, r12, lr, pc, xPSR) from a
+UART fault log or GDB dump, optionally an .elf, and get the crash site mapped
+to source line via arm-none-eabi-addr2line.
+
+Zero dependencies. Pure stdlib Python 3.6+.
+
+Usage:
+    python cortex_unwind.py <r0> <r1> <r2> <r3> <r12> <lr> <pc> <xpsr> [elf]
+    python cortex_unwind.py --auto <paste_or_hex_dump> [elf]
+    python cortex_unwind.py --example
+"""
+import os
+import re
+import shutil
+import subprocess
+import sys
+
+VERSION = "1.1.0"
+SITE = "https://www.trustandthread.com"
+
+FRAME_REGS = ["r0", "r1", "r2", "r3", "r12", "lr", "pc", "xpsr"]
+
+EXCEPTIONS = {
+    0: "Thread mode",
+    2: "NMI",
+    3: "HardFault",
+    4: "MemManage",
+    5: "BusFault",
+    6: "UsageFault",
+    10: "DebugMon",
+    14: "PendSV",
+    15: "SysTick",
+}
+
+def parse_hex(tok, name="hex"):
+    t = tok.strip().lower().replace("0x", "").replace(",", "")
+    try:
+        return int(t, 16)
+    except ValueError:
+        sys.exit(f"error: {name} value '{tok}' is not valid hex")
+
+
+def banner(ch="=", width=66):
+    return ch * width
+
+
+def addr2line(tool, elf, addr):
+    exe = shutil.which(tool)
+    if not exe:
+        return None
+    try:
+        r = subprocess.run(
+            [exe, "-f", "-C", "-e", elf, f"0x{addr:08X}"],
+            capture_output=True, text=True, timeout=10,
+        )
+        lines = [l.strip() for l in r.stdout.strip().splitlines() if l.strip()]
+        if len(lines) >= 2 and "??" not in lines[0]:
+            return lines[0], lines[1]
+    except (OSError, subprocess.TimeoutExpired):
+        pass
+    return None
+
+
+def pick_addr2line():
+    for t in ("arm-none-eabi-addr2line", "addr2line"):
+        if shutil.which(t):
+            return t
+    return None
+
+
+def is_exc_return(val):
+    return (val & 0xFFFFFFF0) == 0xFFFFFFF0
+
+
+def decode_xpsr(xpsr):
+    lines = []
+    ipsr = xpsr & 0x1FF
+    lines.append(f"IPSR = {ipsr}")
+    if ipsr in EXCEPTIONS:
+        lines.append(f"       Active exception: {EXCEPTIONS[ipsr]}")
+    elif 16 <= ipsr < 256:
+        lines.append(f"       Active IRQ: IRQ{ipsr - 16} (external interrupt)")
+    if xpsr & (1 << 24):
+        lines.append(" Thumb bit set (EPSR.T=1) — valid M-profile Thumb state")
+    else:
+        lines.append(" [!] Thumb bit CLEAR (EPSR.T=0) — invalid state or corrupt branch target")
+    flags = []
+    if xpsr & (1 << 31): flags.append("N")
+    if xpsr & (1 << 30): flags.append("Z")
+    if xpsr & (1 << 29): flags.append("C")
+    if xpsr & (1 << 28): flags.append("V")
+    if xpsr & (1 << 27): flags.append("Q")
+    if flags:
+        lines.append(f" APSR flags: {''.join(flags)}")
+    return lines
+
+
+def classify_exc_return(lr):
+    """Decode an EXC_RETURN value. Returns (lines, uses_fp_frame) or (None, None)."""
+    if not is_exc_return(lr):
+        return None, None
+    n = lr & 0x1F
+    kind = {
+        0x01: ("Return to Handler mode using MSP (no FP)", False),
+        0x09: ("Return to Thread mode using MSP (no FP)", False),
+        0x0D: ("Return to Thread mode using PSP (no FP)", False),
+        0x11: ("Return to Handler mode using MSP (FP extended frame)", True),
+        0x19: ("Return to Thread mode using MSP (FP extended frame)", True),
+        0x1D: ("Return to Thread mode using PSP (FP extended frame)", True),
+    }
+    desc, fp = kind.get(n, (f"Variant 0x{lr & 0xFF:X}", not bool(lr & (1 << 4))))
+    lines = [f" EXC_RETURN value detected: 0x{lr:08X} ({desc})"]
+    if fp:
+        lines.append("       Extended frame: 26 words stacked (includes FP registers).")
+    else:
+        lines.append("       Basic frame: 8 words stacked.")
+    return lines, fp
+
+
+def report(regs, elf=None):
+    tool = pick_addr2line()
+    out = []
+    w = out.append
+    w(banner())
+    w(f" TRUST & THREAD :: CORTEX-M STACK FRAME UNWINDER v{VERSION}")
+    w(banner())
+    w(f" {'Reg':<6} {'Value':<12} Notes")
+    w(banner("-"))
+    lr_val = regs[5]
+    pc = regs[6] & ~1
+    exc_lines, uses_fp = classify_exc_return(lr_val)
+    if exc_lines:
+        lr_note = "(EXC_RETURN — see below)"
+        lr_sym = None
+    else:
+        lr_note = "(Thumb bit set)" if lr_val & 1 else ""
+        lr_sym = lr_val & ~1
+    for name, val in zip(FRAME_REGS, regs):
+        note = ""
+        if name == "pc" and val & 1:
+            note = "(Thumb bit set)"
+        if name == "lr":
+            note = lr_note
+        w(f" {name:<6} 0x{val:08X} {note}")
+    w(banner("-"))
+
+    w("\n [Execution State]")
+    for line in decode_xpsr(regs[7]):
+        w("  " + line)
+
+    if exc_lines:
+        w("\n [EXC_RETURN Context]")
+        for line in exc_lines:
+            w("  " + line)
+        if uses_fp:
+            w("  [!] LR indicates an FP extended frame — pass 26 words (8 + S0-S15 + FPSCR)")
+            w("      for full FP register recovery in a future release.")
+
+    w("\n [Crash Site]")
+    w(f"  PC (faulting instruction): 0x{pc:08X}")
+    if elf:
+        res = addr2line(tool, elf, pc)
+        w(f"     -> {res[0]} at {res[1]}" if res else "     -> no symbol match (stripped ELF or invalid PC)")
+    if lr_sym is not None:
+        w(f"  LR (caller return):        0x{lr_sym:08X}")
+        if elf:
+            res = addr2line(tool, elf, lr_sym)
+            w(f"     -> {res[0]} at {res[1]}" if res else "     -> no symbol match")
+    else:
+        w("  LR (caller return):        hardware EXC_RETURN — no caller address available in this frame.")
+        w("      For the caller, unwind the next (callee-saved) frame or use the toolkit's full unwinder.")
+
+    if elf and not tool:
+        w("\n [?] Note: arm-none-eabi-addr2line not found in PATH.")
+
+    w("\n" + banner())
+    w(" NEXT STEPS & REMEDIATION:")
+    w(f"  1. Free crash triage guide: {SITE}/firmware-checklist/")
+    w(f"  2. Drop-in C HardFault handler & runtime crash logger: {SITE}/toolkit/")
+    w(banner() + "\n")
+    print("\n".join(out))
+    return 0
+
+
+EXAMPLE = """
+Examples:
+  # Basic decode of 8 stacked registers:
+  python cortex_unwind.py 0x0 0x1 0x20000000 0x40021000 0x0 0x08001255 0x08001290 0x21000000
+
+  # Auto-resolve symbols from an ELF:
+  python cortex_unwind.py 0x0 0x1 0x20000000 0x40021000 0x0 0x08001255 0x08001290 0x21000000 build/firmware.elf
+
+  # EXC_RETURN in LR (typical HardFault from an ISR):
+  python cortex_unwind.py 0x0 0x1 0x20000000 0x40021000 0x0 0xFFFFFFF9 0x08001290 0x21000000
+
+  # Auto-extract from raw memory dump:
+  python cortex_unwind.py --auto "0x00 0x01 0x20000000 0x40021000 0x00 0x08001255 0x08001290 0x21000000"
+"""
+
+
+def auto_extract(tokens):
+    # A single quoted argument may contain the whole dump — split on whitespace.
+    split = []
+    for t in tokens:
+        split.extend(t.replace(",", " ").split())
+    hexish = [t for t in split if re.fullmatch(r"(?:0[xX])?[0-9a-fA-F]{1,8}", t)]
+    if len(hexish) >= 8:
+        return [parse_hex(t, "frame") for t in hexish[-8:]]
+    return None
+
+
+def main():
+    args = [a for a in sys.argv[1:] if a != "--"]
+    if not args or args[0] in ("-h", "--help"):
+        print(__doc__.strip())
+        print(EXAMPLE)
+        return 0
+    if args[0] in ("-v", "--version"):
+        print(f"cortex-unwind v{VERSION}")
+        return 0
+    if args[0] == "--example":
+        print(EXAMPLE)
+        return 0
+
+    elf = None
+    frame = None
+    if args[0] == "--auto":
+        rest = args[1:]
+        for item in rest:
+            if item.endswith(".elf") and os.path.isfile(item):
+                elf = item
+        frame = auto_extract(rest)
+        if not frame:
+            sys.exit("error: --auto could not find 8 consecutive 32-bit hex values")
+    else:
+        if len(args) == 9 and args[8].endswith(".elf"):
+            elf = args[8]
+            args = args[:8]
+        if len(args) != 8:
+            print(__doc__.strip())
+            print(EXAMPLE)
+            return 1
+        frame = [parse_hex(a, FRAME_REGS[i]) for i, a in enumerate(args)]
+    return report(frame, elf)
+
+
+if __name__ == "__main__":
+    sys.exit(main())

cortex_unwind-1.1.0/pyproject.toml

@@ -0,0 +1,30 @@
+[build-system]
+requires = ["setuptools>=61.0"]
+build-backend = "setuptools.build_meta"
+
+[project]
+name = "cortex-unwind"
+version = "1.1.0"
+authors = [
+  { name = "Trust & Thread", email = "contact@trustandthread.com" },
+]
+description = "ARM Cortex-M HardFault stack frame unwinder and address mapper CLI"
+readme = "README.md"
+requires-python = ">=3.6"
+license = { text = "MIT" }
+classifiers = [
+    "Programming Language :: Python :: 3",
+    "License :: OSI Approved :: MIT License",
+    "Operating System :: OS Independent",
+    "Topic :: Software Development :: Embedded Systems",
+    "Topic :: Software Development :: Debuggers",
+]
+keywords = ["arm", "cortex-m", "stm32", "hardfault", "stack", "unwinder", "debugging"]
+
+[project.urls]
+"Homepage" = "https://www.trustandthread.com"
+"Bug Tracker" = "https://github.com/GaneshMba4066/cortex-unwind/issues"
+"Documentation" = "https://www.trustandthread.com/firmware-checklist/"
+
+[project.scripts]
+cortex-unwind = "cortex_unwind:main"

cortex_unwind-1.1.0/setup.cfg

@@ -0,0 +1,7 @@
+[tool.setuptools]
+py-modules = ["cortex_unwind"]
+
+[egg_info]
+tag_build = 
+tag_date = 0
+