carm-roofline 1.0.2.dev1__tar.gz → 1.0.3.dev1__tar.gz

{carm_roofline-1.0.2.dev1/carm_roofline.egg-info → carm_roofline-1.0.3.dev1}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: carm-roofline
-Version: 1.0.2.dev1
+Version: 1.0.3.dev1
 Summary: CARM: Cache-Aware Roofline Model benchmarking and visualization toolkit
 Author: CHaMP Team
 License:                                  Apache License
@@ -246,7 +246,6 @@ Dynamic: license-file
 
 # The CARM Tool
 
-
 Cache-Aware Roofline Model (CARM) toolkit - benchmark, visualize and profile Intel, AMD, ARM, RISC-V CPUs and NVIDIA, AMD GPUs.
 
 The package provides:
@@ -258,6 +257,10 @@ The package provides:
 > [!WARNING]
 > The development branch and associated python package are still experimental, and do not include all features yet. For a stable release, please refer to the main branch.
 
+## Documentation
+
+You can find the full documentation at [https://champ-hub.github.io/carm-roofline](https://champ-hub.github.io/carm-roofline/).
+
 ## Installation
 
 Install from PyPI:
@@ -279,10 +282,17 @@ source carm-env/bin/activate
 pip install carm-roofline[all]
 ```
 
+If cloning the repository directly (e.g. for development or access to example applications), use `--recurse-submodules` to also fetch the examples:
+
+```bash
+git clone --recurse-submodules https://github.com/champ-hub/carm-roofline
+```
+
 ## Requirements
 
 - Python 3.9+
-- GCC (for compiling benchmark binaries)
+- C compiler (e.g. gcc, clang)
+- Optional: [PAPI](https://github.com/icl-utk-edu/papi) headers and binaries for profiling
 
 ## Command-Line Interface
 
@@ -296,7 +306,7 @@ Available subcommands:
 
 - `benchmark` - run benchmark suites
 - `gui` - launch the results dashboard
-- `profile` - coming soon
+- `profile` - profile an application with PAPI or perf
 
 Show help:
 
@@ -304,6 +314,7 @@ Show help:
 carm --help
 carm benchmark --help
 carm gui --help
+carm profile --help
 ```
 
 ## Basic Usage

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/README.md

@@ -1,7 +1,6 @@
 
 # The CARM Tool
 
-
 Cache-Aware Roofline Model (CARM) toolkit - benchmark, visualize and profile Intel, AMD, ARM, RISC-V CPUs and NVIDIA, AMD GPUs.
 
 The package provides:
@@ -13,6 +12,10 @@ The package provides:
 > [!WARNING]
 > The development branch and associated python package are still experimental, and do not include all features yet. For a stable release, please refer to the main branch.
 
+## Documentation
+
+You can find the full documentation at [https://champ-hub.github.io/carm-roofline](https://champ-hub.github.io/carm-roofline/).
+
 ## Installation
 
 Install from PyPI:
@@ -34,10 +37,17 @@ source carm-env/bin/activate
 pip install carm-roofline[all]
 ```
 
+If cloning the repository directly (e.g. for development or access to example applications), use `--recurse-submodules` to also fetch the examples:
+
+```bash
+git clone --recurse-submodules https://github.com/champ-hub/carm-roofline
+```
+
 ## Requirements
 
 - Python 3.9+
-- GCC (for compiling benchmark binaries)
+- C compiler (e.g. gcc, clang)
+- Optional: [PAPI](https://github.com/icl-utk-edu/papi) headers and binaries for profiling
 
 ## Command-Line Interface
 
@@ -51,7 +61,7 @@ Available subcommands:
 
 - `benchmark` - run benchmark suites
 - `gui` - launch the results dashboard
-- `profile` - coming soon
+- `profile` - profile an application with PAPI or perf
 
 Show help:
 
@@ -59,6 +69,7 @@ Show help:
 carm --help
 carm benchmark --help
 carm gui --help
+carm profile --help
 ```
 
 ## Basic Usage

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/architecture/__init__.py

@@ -5,7 +5,13 @@ import contextvars
 from exec_interface import ExecutionInterface
 
 from .architecture import Architecture
-from .identity import MachineSignature, detect_machine_signature, generate_run_name, signature_from_architecture
+from .identity import (
+    MachineSignature,
+    detect_machine_signature,
+    generate_run_name,
+    signature_from_architecture,
+    write_machine_json,
+)
 from .memory import SimpleMemoryTopology
 
 # Context variable to hold the execution interface, for compatibility with simulation and native execution
@@ -31,4 +37,5 @@ __all__ = [
     "get_execution_interface",
     "set_execution_interface",
     "signature_from_architecture",
+    "write_machine_json",
 ]

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/architecture/architecture.py

@@ -5,13 +5,12 @@ from pathlib import Path
 from typing import TYPE_CHECKING, Any
 
 from arguments import InsertsArguments, positive_int
-from benchmark import generation as bench_gen
-from error import UserError
+from core import Frequency, UserError
+from isa import INCOMPATIBLE_ISAS, ISA_NAME_TO_CLASS
 from output_utils import configure_verbosity, debug, detail, format_if_container, warn
-from units import Frequency
 
 if TYPE_CHECKING:
-    from benchmark.generation import BaseISA
+    from isa import BaseISA
 
 from .config import load_memory_topology_from_toml
 from .detect import DetectedArchitecture, detect_for_isa, native_detect
@@ -32,7 +31,7 @@ def check_isa_compatibility(selected_isas: list[type[BaseISA]]) -> None:
 
     # Check for special incompatibilities within the same family
     isa_set = set(selected_isas)
-    for incompatible_pair in bench_gen.INCOMPATIBLE_ISAS:
+    for incompatible_pair in INCOMPATIBLE_ISAS:
         if incompatible_pair.issubset(isa_set):
             pair_names = ", ".join(isa.name for isa in incompatible_pair)
             raise UserError(f"Incompatible ISAs selected: {pair_names}")
@@ -245,10 +244,8 @@ class Architecture(InsertsArguments):
             detected = native_detect(threads=num_threads)
             isa_strs = detected.isa or []
 
-            self.isa: list[type[BaseISA]] = [bench_gen.ISA_NAME_TO_CLASS[isa_str] for isa_str in isa_strs]
+            self.isa: list[type[BaseISA]] = [ISA_NAME_TO_CLASS[isa_str] for isa_str in isa_strs]
         else:
-            from benchmark.generation import ISA_NAME_TO_CLASS
-
             self.isa = [ISA_NAME_TO_CLASS[isa_name] for isa_name in args.isa]
             # Verify that the selected ISAs are compatible
             check_isa_compatibility(self.isa)
@@ -279,7 +276,7 @@ class Architecture(InsertsArguments):
 
     @staticmethod
     def insert_arguments(parser: argparse.ArgumentParser) -> None:
-        from benchmark.generation import ISA_NAME_TO_CLASS
+        from isa import ISA_NAME_TO_CLASS
 
         parser.add_argument(
             "-i",

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/architecture/arm.py

@@ -1,7 +1,7 @@
 from __future__ import annotations
 
 from architecture.detect import DetectedArchitecture, TestContext, run_generic_tests
-from benchmark.generation import ArmNeon, ArmScalar, ArmSVE
+from isa import ArmNeon, ArmScalar, ArmSVE
 
 
 def detect(threads: int = 1) -> DetectedArchitecture:

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/architecture/config.py

@@ -18,8 +18,7 @@ from __future__ import annotations
 from pathlib import Path
 from typing import cast
 
-from error import UserError
-from units import Bytes
+from core import Bytes, UserError
 
 from .memory import SimpleMemoryTopology
 

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/architecture/detect.py

@@ -15,12 +15,11 @@ from dataclasses import dataclass
 from pathlib import Path
 from typing import TYPE_CHECKING, Any
 
-from error import UserError
+from core import Frequency, UserError
 from output_utils import debug, detail, warn
-from units import Frequency
 
 if TYPE_CHECKING:
-    from benchmark.generation import BaseISA
+    from isa import BaseISA
 
 from .memory import MemoryTopology
 

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/architecture/identity.py

@@ -11,6 +11,8 @@ machine yields the same name across runs.
 from __future__ import annotations
 
 import hashlib
+import json
+import os
 import platform
 import re
 from dataclasses import dataclass
@@ -22,6 +24,8 @@ from .memory import MemoryLevelInfo, MemoryTopology, MemoryTopologyLike
 if TYPE_CHECKING:
     from .architecture import Architecture
 
+_BYTES_PER_GIB = 1024**3
+
 
 @dataclass(frozen=True)
 class CpuInfo:
@@ -55,17 +59,52 @@ class MachineSignature:
     vendor: str
     memory_levels: tuple[MemoryLevelSignature, ...]
 
+    def _canonical_hash_string(self) -> str:
+        """Canonical string fed to SHA-256 for the config hash.
+
+        Format: ``arch=<arch>;vendor=<vendor>;levels=<levels>`` where
+        ``<levels>`` is a ``|``-separated list of
+        ``<name>:<size_bytes>:<instances>:<num_sharing_threads>``.
+        """
+        levels_str = "|".join(
+            f"{lvl.name}:{lvl.size_bytes}:{lvl.instances}:{lvl.num_sharing_threads}" for lvl in self.memory_levels
+        )
+        return f"arch={self.arch};vendor={self.vendor};levels={levels_str}"
+
     @property
     def config_hash(self) -> str:
         """Deterministic 8-char hex SHA256 of non-model-name fields.
 
         Hash inputs: arch, vendor, memory_levels (name, size, instances, sharing).
+
+        .. note::
+            DRAM ``size_bytes`` comes from ``/proc/zoneinfo`` ``present`` pages
+            (physical capacity, stable across reboots).  Falls back to a
+            rounded-``MemTotal`` value when zoneinfo is unavailable.
+            ``num_sharing_threads`` is set to 0 for DRAM (not a hardware
+            property; CPU online count may vary).  Cache-level fields are
+            used verbatim.
         """
-        levels_str = "|".join(
-            f"{lvl.name}:{lvl.size_bytes}:{lvl.instances}:{lvl.num_sharing_threads}" for lvl in self.memory_levels
-        )
-        canonical = f"arch={self.arch};vendor={self.vendor};levels={levels_str}"
-        return hashlib.sha256(canonical.encode("utf-8")).hexdigest()[:8]
+        return hashlib.sha256(self._canonical_hash_string().encode("utf-8")).hexdigest()[:8]
+
+    def to_dict(self) -> dict[str, object]:
+        """Serialize all fields for machine.json debugging output."""
+        return {
+            "model_name": self.model_name,
+            "arch": self.arch,
+            "vendor": self.vendor,
+            "config_hash": self.config_hash,
+            "hash_input": self._canonical_hash_string(),
+            "memory_levels": [
+                {
+                    "name": lvl.name,
+                    "size_bytes": lvl.size_bytes,
+                    "instances": lvl.instances,
+                    "num_sharing_threads": lvl.num_sharing_threads,
+                }
+                for lvl in self.memory_levels
+            ],
+        }
 
 
 def read_cpuinfo() -> CpuInfo:
@@ -102,21 +141,69 @@ def read_cpuinfo() -> CpuInfo:
     return CpuInfo(model_name=model_name, vendor=vendor)
 
 
+def _get_physical_ram_bytes() -> int | None:
+    """Total physical RAM (bytes) from ``/proc/zoneinfo``, or ``None``.
+
+    Sums the ``present`` field across all zones — this is the number of
+    physical pages present, derived from the firmware's e820/device-tree
+    memory map at boot.  It reflects hardware capacity and is stable across
+    reboots, unlike ``MemTotal`` which subtracts kernel runtime reservations.
+    """
+    try:
+        with open("/proc/zoneinfo") as f:
+            total_present = 0
+            for line in f:
+                parts = line.strip().split()
+                if len(parts) == 2 and parts[0] == "present":
+                    total_present += int(parts[1])
+        return total_present * os.sysconf("SC_PAGE_SIZE")
+    except (OSError, ValueError):
+        return None
+
+
 def _levels_from_topology(topology: MemoryTopologyLike | None) -> tuple[MemoryLevelSignature, ...]:
-    """Convert a memory topology to a tuple of deterministic level signatures."""
+    """Convert a memory topology to a tuple of deterministic level signatures.
+
+    DRAM levels use the ``present`` page count from ``/proc/zoneinfo`` (a
+    hardware-capacity value stable across reboots).  Falls back to rounding
+    the topology's ``MemTotal``-based size to the nearest GiB when zoneinfo
+    is unavailable (containers, odd kernels).
+
+    ``num_sharing_threads`` is set to 0 for DRAM (not a hardware property;
+    ``shared_cpu_list`` varies with CPU online count).
+
+    Cache levels (L1/L2/L3) are passed through unchanged.
+    """
+    # Read physical RAM once — stable firmware value
+    physical_ram = _get_physical_ram_bytes()
+
     if topology is None:
         return ()
     levels: list[MemoryLevelSignature] = []
     for lvl in topology:
         if isinstance(lvl, MemoryLevelInfo):
-            levels.append(
-                MemoryLevelSignature(
-                    name=lvl.name,
-                    size_bytes=int(lvl.size),
-                    instances=lvl.instances,
-                    num_sharing_threads=lvl.num_sharing_threads,
+            if lvl.name == "DRAM":
+                if physical_ram is not None:
+                    size_bytes = physical_ram
+                else:
+                    size_bytes = round(int(lvl.size) / _BYTES_PER_GIB) * _BYTES_PER_GIB
+                levels.append(
+                    MemoryLevelSignature(
+                        name=lvl.name,
+                        size_bytes=size_bytes,
+                        instances=lvl.instances,
+                        num_sharing_threads=0,
+                    )
+                )
+            else:
+                levels.append(
+                    MemoryLevelSignature(
+                        name=lvl.name,
+                        size_bytes=int(lvl.size),
+                        instances=lvl.instances,
+                        num_sharing_threads=lvl.num_sharing_threads,
+                    )
                 )
-            )
     return tuple(levels)
 
 
@@ -206,3 +293,18 @@ def _short_model_name(name: str) -> str:
 def generate_run_name(signature: MachineSignature) -> str:
     """Generate ``"<short_model>_<config_hash>"`` (e.g. ``"Ryzen-7-7735HS_59486dd1"``)."""
     return f"{_short_model_name(signature.model_name)}_{signature.config_hash}"
+
+
+def write_machine_json(signature: MachineSignature, directory: Path) -> None:
+    """Write machine.json to *directory* if it does not already exist.
+
+    The file contains the full MachineSignature serialized as JSON, including
+    all hash inputs and the computed hash, so future runs can debug why a
+    machine hash changed.
+    """
+    path = directory / "machine.json"
+    if path.exists():
+        return
+    directory.mkdir(parents=True, exist_ok=True)
+    with open(path, "x", encoding="utf-8") as f:
+        json.dump(signature.to_dict(), f, indent=2, sort_keys=True)

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/architecture/memory.py

@@ -9,9 +9,8 @@ from enum import Enum
 from pathlib import Path
 from typing import Protocol, runtime_checkable
 
-from error import UserError
+from core import Bytes, UserError
 from output_utils import debug, format_if_container
-from units import Bytes
 
 _CPU_ROOT = Path("/sys/devices/system/cpu")
 

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/architecture/riscv.py

@@ -3,8 +3,8 @@ from __future__ import annotations
 import tempfile
 from pathlib import Path
 
-from benchmark import generation as bench_gen
 from exec_interface import ExecutionInterface
+from isa import RISCV_RVV, RISCV_RVV_071, RISCVScalar
 
 from .detect import ROOT, DetectedArchitecture, TestContext, run_generic_tests
 
@@ -24,7 +24,7 @@ def detect(threads: int = 1) -> DetectedArchitecture:
     detected = run_generic_tests(ctx, threads=threads)
 
     # Build ISA list with scalar as base
-    isa_list = [bench_gen.RISCVScalar.name]
+    isa_list = [RISCVScalar.name]
 
     # Detect RVV version using RISC-V specific test
     exec_iface = _get_execution_interface()
@@ -33,9 +33,9 @@ def detect(threads: int = 1) -> DetectedArchitecture:
     if rvv_version_probe_path.exists():
         # Try compiling with RVV 1.0 flag first (most common)
         if _can_compile_rvv(exec_iface, rvv_version_probe_path, "RISCV_RVV"):
-            isa_list.append(bench_gen.RISCV_RVV.name)
+            isa_list.append(RISCV_RVV.name)
         elif _can_compile_rvv(exec_iface, rvv_version_probe_path, "RISCV_RVV_0_7_1"):
-            isa_list.append(bench_gen.RISCV_RVV_071.name)
+            isa_list.append(RISCV_RVV_071.name)
 
     detected.isa = isa_list
 

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/architecture/x86.py

@@ -1,7 +1,7 @@
 from __future__ import annotations
 
 from architecture.detect import ROOT, DetectedArchitecture, TestContext, run_generic_tests, run_test
-from units import Frequency
+from core import Frequency
 
 
 def detect(threads: int = 1) -> DetectedArchitecture:

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/benchmark/__init__.py

@@ -11,7 +11,6 @@ from .benchmark import (
     MixedBenchmarkResult,
 )
 from .benchmarking import Benchmarking, TestType
-from .generation import ALL_ISAS, BaseISA
 from .interface import generate_microbenchmarks, run_full_benchmark
 from .result import OutputFormat
 from .suites import (
@@ -23,13 +22,11 @@ from .suites import (
 )
 
 __all__ = [
-    "ALL_ISAS",
     "ArithmeticBenchmark",
     "ArithmeticBenchmarkResult",
     "ArithmeticBenchmarkSuite",
     "BaseBenchmark",
     "BaseBenchmarkResult",
-    "BaseISA",
     "Benchmarking",
     "ISABenchmarkSuite",
     "MemoryBenchmark",

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/benchmark/benchmark.py

@@ -8,9 +8,9 @@ from __future__ import annotations
 from abc import ABC, abstractmethod
 from dataclasses import dataclass, field
 
+from core import ArithmeticIntensity, Bandwidth, Bytes, Performance, Seconds
 from output_utils import debug
 from test_bench.builder import MicrobenchmarkFunctionSpec
-from units import ArithmeticIntensity, Bandwidth, Bytes, Performance, Seconds
 
 from .generation import ArithmeticBenchmarkParams, BenchmarkParams, MemoryBenchmarkParams
 

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/benchmark/benchmarking.py

@@ -10,11 +10,8 @@ from enum import Enum
 from typing import TypeVar
 
 from arguments import InsertsArguments, enum_action, positive_float, positive_int
-from benchmark.generation.code_gen.operation import ArithmeticOperation
+from core import ArithmeticOperation, Bytes, DataType, Operations
 from output_utils import warn
-from units import Bytes, Operations
-
-from .generation import DataType
 
 
 class TestType(Enum):

carm_roofline-1.0.3.dev1/benchmark/generation/__init__.py

@@ -0,0 +1,10 @@
+from __future__ import annotations
+
+from .parameters import ArithmeticBenchmarkParams, BenchmarkParams, MemoryBenchmarkParams, MemoryLayoutMode
+
+__all__ = [
+    "ArithmeticBenchmarkParams",
+    "BenchmarkParams",
+    "MemoryBenchmarkParams",
+    "MemoryLayoutMode",
+]

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/benchmark/generation/code_gen/__init__.py

@@ -1,17 +1,13 @@
 from __future__ import annotations
 
 from . import instruction
-from .data_type import DataType
 from .instruction import ControlInstructions, TypedInstructions, escape_for_inline_asm
-from .operation import Operation
 from .register import CyclicRegisterSet, HelperRegisterSet, TypedRegisterSets
 
 __all__ = [
     "ControlInstructions",
     "CyclicRegisterSet",
-    "DataType",
     "HelperRegisterSet",
-    "Operation",
     "TypedInstructions",
     "TypedRegisterSets",
     "escape_for_inline_asm",

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/benchmark/generation/code_gen/instruction.py

@@ -3,8 +3,8 @@ from __future__ import annotations
 from enum import Enum, auto
 from typing import Union, overload
 
-from .data_type import DataType
-from .operation import ArithmeticOperation, MemoryOperation, Operation
+from core import ArithmeticOperation, DataType, MemoryOperation, Operation
+
 from .register import CyclicRegisterSet
 
 # Type alias for objects that can be converted to string

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/benchmark/generation/code_gen/register.py

@@ -3,7 +3,7 @@ from __future__ import annotations
 from collections.abc import Iterable, Iterator
 from typing import Union
 
-from .data_type import DataType
+from core import DataType
 
 __all__ = [
     "CyclicRegisterSet",

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/benchmark/generation/parameters.py

@@ -4,14 +4,12 @@ from dataclasses import dataclass
 from enum import Enum
 from typing import TYPE_CHECKING
 
-import units
-from benchmark.generation.code_gen.operation import ArithmeticOperation
-from units import Bytes, Operations
+from core import ArithmeticOperation, Bytes, Operations
 
 if TYPE_CHECKING:
     from benchmark.benchmarking import LoadStoreRatio
 
-from .code_gen import DataType
+from core import DataType
 
 
 class BenchParamError(Exception):
@@ -52,14 +50,14 @@ class ArithmeticBenchmarkParams(BenchmarkParams):
         params = ArithmeticBenchmarkParams(
             data_type=DataType.f32,
             operation=ArithmeticOperation.fma,
-            num_ops=units.Operations(1000),
+            num_ops=Operations(1000),
             thread_affinity=[0, 1, 2, 3],
         )
         spec = isa.generate_arithmetic(params)
     """
 
     operation: ArithmeticOperation
-    num_ops: units.Operations
+    num_ops: Operations
 
     def __post_init__(self) -> None:
         super().__post_init__()

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/benchmark/output/arithmetic.py

@@ -8,8 +8,8 @@ from typing import TYPE_CHECKING, Any
 
 from rich.table import Table
 
+from core import Cycles
 from output_utils import error, get_console, warn
-from units import Cycles
 
 from .base import NON_ROOFLINE_CSV_ERROR_MSG, OutputHandler
 from .common import (
@@ -47,7 +47,7 @@ def _collect_gops_by_isa(isa_suites: dict[str, ISABenchmarkSuite]) -> dict[str,
 
 def _print_table(context: CARMContext, isa_suites: dict[str, ISABenchmarkSuite]) -> None:
     from benchmark.benchmark import ArithmeticBenchmarkResult
-    from benchmark.generation.isa import BaseISA
+    from isa import BaseISA
 
     print_extra = context.run_config.verbose >= 3
 

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/benchmark/output/common.py

@@ -11,7 +11,7 @@ from typing import TYPE_CHECKING, Any
 from output_utils import error, info, warn
 
 if TYPE_CHECKING:
-    from benchmark.generation.code_gen import DataType
+    from core import DataType
 
 
 def format_precision_label(data_type: DataType) -> str:

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/benchmark/output/jsonl.py

@@ -13,16 +13,16 @@ from datetime import datetime
 from pathlib import Path
 from typing import TYPE_CHECKING
 
+from core import Cycles
 from output_utils import info, warn
 from roofline_assembly import RecordType
-from units import Cycles
 
 if TYPE_CHECKING:
     from benchmark.benchmark import ArithmeticBenchmark, MemoryBenchmark
-    from benchmark.generation.isa import BaseISA
     from benchmark.suites.base import ISABenchmarkSuite
     from context import CARMContext
-    from units import Frequency
+    from core import Frequency
+    from isa import BaseISA
 
 
 def _serialize_arithmetic(

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/benchmark/output/memory.py

@@ -9,9 +9,9 @@ from typing import TYPE_CHECKING, Any
 from rich.table import Table
 
 from benchmark.benchmark import MemoryBenchmarkResult
-from benchmark.generation.isa import BaseISA
+from core import Cycles
+from isa import BaseISA
 from output_utils import error, warn
-from units import Cycles
 
 from .base import NON_ROOFLINE_CSV_ERROR_MSG, OutputHandler
 from .common import (

{carm_roofline-1.0.2.dev1 → carm_roofline-1.0.3.dev1}/benchmark/output/memory_sweep.py

@@ -9,10 +9,10 @@ from typing import TYPE_CHECKING, Any
 from rich.table import Table
 
 from benchmark.benchmark import MemoryBenchmarkResult
-from benchmark.generation.isa import BaseISA
 from benchmark.suites import MemorySweepBenchmarkSuite
+from core import Cycles
+from isa import BaseISA
 from output_utils import error, warn
-from units import Cycles
 
 from .base import NON_ROOFLINE_CSV_ERROR_MSG, OutputHandler
 from .common import safe_matplotlib_import, save_or_show_plot