archgraph-layout 2.0.1__tar.gz → 2.0.2__tar.gz

{archgraph_layout-2.0.1/archgraph_layout.egg-info → archgraph_layout-2.0.2}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: archgraph-layout
-Version: 2.0.1
+Version: 2.0.2
 Summary: Hierarchical architecture diagrams from XML with floorplanning and orthogonal routing
 Author: Ellie Hartung
 License-Expression: MIT

{archgraph_layout-2.0.1 → archgraph_layout-2.0.2}/archgraph/__init__.py

@@ -23,7 +23,7 @@ from .progress import report
 from .placement import engine as _engine  # noqa: E402
 from . import routing as _routing  # noqa: E402
 
-__version__ = "2.0.1"
+__version__ = "2.0.2"
 __all__ = ["load", "loads", "layout", "route", "build", "to_svg", "to_html", "to_json", "to_png", "save",
            "ArchGraphError", "Graph", "__version__"]
 

{archgraph_layout-2.0.1 → archgraph_layout-2.0.2}/archgraph/placement/engine.py

@@ -11,6 +11,7 @@ from . import sizing
 from .hierarchy import (HierarchicalPlacer, apply_keep_together, auto_cluster, build_layout_edges, lift_hints,
                         translate_element)
 from .ports import assign_ports, distribute_ports, slide_ports
+from .notes import compact_notes
 
 
 def unify_instances(g: Graph) -> int:
@@ -85,6 +86,9 @@ def finish_ports(g: Graph, placer):
     assign_ports(g, slide=False)
     if g.settings.align_edges:
         placer.topdown(g.root)
+    if compact_notes(g):
+        # A relocated annotation may now face a different side of its target.
+        assign_ports(g, slide=False)
     distribute_ports(g)
     slide_ports(g)
     normalize(g)

{archgraph_layout-2.0.1 → archgraph_layout-2.0.2}/archgraph/placement/hierarchy.py

@@ -92,6 +92,10 @@ def build_layout_edges(g: Graph) -> List[LEdge]:
         a, b = e.src.element, e.dst.element
         flow = e.constraint and e.directed and "__note__" not in e.classes
         w = e.weight * (1.0 + 0.15 * (e.multiplicity - 1))
+        if "__note__" in e.classes:
+            # Annotations should stay with their subject. They remain auxiliary
+            # edges so they impose no signal flow, crossings or hard alignment.
+            w *= 6.0
         le = LEdge(a, e.src.port, b, e.dst.port, w, flow, e.straight, e)
         le.aux = "__note__" in e.classes
         le.scope = g.edge_scope(a, b)

archgraph_layout-2.0.2/archgraph/placement/notes.py

@@ -0,0 +1,81 @@
+"""Move targeted annotations into nearby free space without moving circuit blocks."""
+from __future__ import annotations
+
+from ..geometry import Rect
+from ..model import Graph, Node, Subsystem
+from ..portlabels import port_label_geometry, port_text_size
+from .sizing import subsystem_padding
+
+
+def _distance(note: Rect, target: Rect):
+    dx = max(target.x0-note.x1, note.x0-target.x1, 0)
+    dy = max(target.y0-note.y1, note.y0-target.y1, 0)
+    # Prefer a short leader and alignment with the target, including when the
+    # target is a large subsystem with many equally close boundary positions.
+    return dx+dy+.08*(abs(note.cx-target.cx)+abs(note.cy-target.cy))
+
+
+def compact_notes(g: Graph) -> int:
+    """Improve note proximity within the existing parent frame and free gaps.
+
+    Detailed placement preserves sibling ordering. An annotation can instead
+    move around a sibling into a closer gap, provided it covers no other block
+    or external port name. Explicit hints and table layouts keep their positions.
+    """
+    pinned = {el for hint in g.hints for el in hint.elements}
+    links = [e for e in g.edges if "__note__" in e.classes and
+             isinstance(e.src.element, Node) and e.src.element.is_note]
+    moved = set()
+    for _ in range(2):
+        changed = False
+        for edge in links:
+            note, target = edge.src.element, edge.dst.element
+            parent = note.parent
+            if parent is None or note in pinned or parent.algorithm in ("row", "column", "grid", "layered"):
+                continue
+            spacing = parent.spacing if parent.spacing is not None else g.settings.node_spacing
+            gap = max(spacing, 2*g.settings.node_margin+g.settings.edge_spacing)
+            pad = 0 if parent is g.root else subsystem_padding(parent, g.settings)
+            frame = parent.rect
+            bounds = Rect(frame.x0+pad, frame.y0+pad+parent.header_h,
+                          frame.x1-pad, frame.y1-pad)
+            if bounds.w < note.w or bounds.h < note.h:
+                continue
+            obstacles = []
+            for sibling in parent.children:
+                if sibling is note:
+                    continue
+                obstacles.append(sibling.rect.inflate(gap))
+                if isinstance(sibling, Subsystem) and sibling.visible:
+                    for p in sibling.ports.values():
+                        if port_text_size(p, g.settings) != (0.0, 0.0):
+                            obstacles.append(port_label_geometry(p, g.settings, False)[3].inflate(8))
+            hw, hh = note.w/2, note.h/2
+            xs = {note.x, target.x, bounds.x0+hw, bounds.x1-hw,
+                  target.rect.x0-hw-gap, target.rect.x1+hw+gap}
+            ys = {note.y, target.y, bounds.y0+hh, bounds.y1-hh,
+                  target.rect.y0-hh-gap, target.rect.y1+hh+gap}
+            for ob in obstacles:
+                xs.update((ob.x0-hw, ob.x1+hw))
+                ys.update((ob.y0-hh, ob.y1+hh))
+            xs = [x for x in xs if bounds.x0+hw-1e-6 <= x <= bounds.x1-hw+1e-6]
+            ys = [y for y in ys if bounds.y0+hh-1e-6 <= y <= bounds.y1-hh+1e-6]
+            current = _distance(note.rect, target.rect)
+            candidates = []
+            for x in xs:
+                for y in ys:
+                    r = Rect.from_center(x, y, note.w, note.h)
+                    distance = _distance(r, target.rect)
+                    if distance < current-.5:
+                        candidates.append((distance, abs(x-note.x)+abs(y-note.y), x, y, r))
+            candidates.sort(key=lambda c: c[:4])
+            for _, _, x, y, r in candidates:
+                if any(r.overlaps(ob) for ob in obstacles):
+                    continue
+                note.x, note.y = x, y
+                moved.add(note)
+                changed = True
+                break
+        if not changed:
+            break
+    return len(moved)

{archgraph_layout-2.0.1 → archgraph_layout-2.0.2/archgraph_layout.egg-info}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: archgraph-layout
-Version: 2.0.1
+Version: 2.0.2
 Summary: Hierarchical architecture diagrams from XML with floorplanning and orthogonal routing
 Author: Ellie Hartung
 License-Expression: MIT

{archgraph_layout-2.0.1 → archgraph_layout-2.0.2}/archgraph_layout.egg-info/SOURCES.txt

@@ -22,6 +22,7 @@ archgraph/placement/floorplan.py
 archgraph/placement/graphalgo.py
 archgraph/placement/hierarchy.py
 archgraph/placement/layered.py
+archgraph/placement/notes.py
 archgraph/placement/ports.py
 archgraph/placement/sizing.py
 archgraph/placement/vpsc.py

{archgraph_layout-2.0.1 → archgraph_layout-2.0.2}/docs/xml-reference.md

@@ -509,6 +509,10 @@ A note without `target` is a free-standing annotation in its enclosing
 subsystem. A targeted note normally shares its target's parent; use
 `inside="true"` to place a note inside a target subsystem. `id`, `width`, `class`,
 `fill`, and `text` optionally customize the note.
+Targeted notes prefer nearby open space and can move around sibling blocks to
+shorten their dotted leader. They keep the configured spacing, stay inside their
+parent, and avoid external port labels. Explicit layout hints involving a note
+and table/row/column layouts retain their placement.
 
 `legend="auto"` uses classes with a `legend` attribute. Explicit `<legend><entry
 .../></legend>` entries switch the default auto mode to `always`. Set

{archgraph_layout-2.0.1 → archgraph_layout-2.0.2}/examples/halcyon7.xml

@@ -1,26 +1,5 @@
 <?xml version="1.0" encoding="UTF-8"?>
-<!--
-  ╔══════════════════════════════════════════════════════════════════════╗
-  ║  HALCYON-7 · agile X-band SAR constellation node ("dark-vessel hunter") ║
-  ╚══════════════════════════════════════════════════════════════════════╝
-  Mission: image the ocean through cloud and night with a 64-element digital-
-  beamforming SAR, focus the raw echoes on board, find ships with a CNN, match
-  them against AIS, and flag the ones running dark. Alerts reach peers over
-  10 Gbps laser crosslinks and reach the ground in minutes, not hours.
-
-  Architecture is real-world shaped (ESA-style regulated 28 V bus, GR740 OBC,
-  SpaceWire/SpaceFibre, CMG agility, Hall EP); the spacecraft is fictional.
-
-  Files (keep together, includes are relative):
-    halcyon7.xml          ← this file
-    halcyon7_lib.xml      ← templates; includes ↓
-    halcyon7_styles.xml   ← classes
-
-  Stress knobs: PANELS / TILES / TRMS scale the phased array (PANELS*TILES*TRMS
-  T/R modules, ~5 nodes and ~5 edges each). CMGS, HEADS, BMODS, RCS, WING_PANELS
-  scale the rest.
--->
-<archgraph title="HALCYON-7 · Dark-Vessel Hunter"
+<archgraph title="HALCYON-7"
            direction="LR" aspect="16:9" theme="blueprint" quality="high" seed="1337"
            author="archgraph stress test" revision="C2" date="2026-10-10">
   <subtitle>Agile X-band DBF-SAR · on-board AI · 10 Gbps laser crosslinks · SSO 520 km dawn-dusk</subtitle>