angr 9.2.129__tar.gz → 9.2.130__tar.gz

{angr-9.2.129/angr.egg-info → angr-9.2.130}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.1
 Name: angr
-Version: 9.2.129
+Version: 9.2.130
 Summary: A multi-architecture binary analysis toolkit, with the ability to perform dynamic symbolic execution and various static analyses on binaries
 Home-page: https://github.com/angr/angr
 License: BSD-2-Clause
@@ -16,13 +16,13 @@ Description-Content-Type: text/markdown
 License-File: LICENSE
 Requires-Dist: CppHeaderParser
 Requires-Dist: GitPython
-Requires-Dist: ailment==9.2.129
-Requires-Dist: archinfo==9.2.129
+Requires-Dist: ailment==9.2.130
+Requires-Dist: archinfo==9.2.130
 Requires-Dist: cachetools
 Requires-Dist: capstone==5.0.3
 Requires-Dist: cffi>=1.14.0
-Requires-Dist: claripy==9.2.129
-Requires-Dist: cle==9.2.129
+Requires-Dist: claripy==9.2.130
+Requires-Dist: cle==9.2.130
 Requires-Dist: itanium-demangler
 Requires-Dist: mulpyplexer
 Requires-Dist: nampa
@@ -31,7 +31,7 @@ Requires-Dist: protobuf>=5.28.2
 Requires-Dist: psutil
 Requires-Dist: pycparser>=2.18
 Requires-Dist: pyformlang
-Requires-Dist: pyvex==9.2.129
+Requires-Dist: pyvex==9.2.130
 Requires-Dist: rich>=13.1.0
 Requires-Dist: sortedcontainers
 Requires-Dist: sympy

{angr-9.2.129 → angr-9.2.130}/angr/__init__.py

@@ -2,7 +2,7 @@
 # pylint: disable=wrong-import-position
 from __future__ import annotations
 
-__version__ = "9.2.129"
+__version__ = "9.2.130"
 
 if bytes is str:
     raise Exception(

{angr-9.2.129 → angr-9.2.130}/angr/analyses/decompiler/ail_simplifier.py

@@ -1317,7 +1317,7 @@ class AILSimplifier(Analysis):
                             continue
                     uses = rd.get_vvar_uses(def_.atom)
 
-                elif def_.atom.was_reg or def_.atom.was_parameter:
+                elif def_.atom.was_tmp or def_.atom.was_reg or def_.atom.was_parameter:
                     uses = rd.get_vvar_uses(def_.atom)
 
                 else:

{angr-9.2.129 → angr-9.2.130}/angr/analyses/decompiler/region_identifier.py

@@ -220,7 +220,10 @@ class RegionIdentifier(Analysis):
                 type_ = data.get("type", None)
                 if type_ == "fake_return":
                     if len(list(graph.successors(src))) == 1 and len(list(graph.predecessors(dst))) == 1:
-                        self._merge_nodes(graph, src, dst, force_multinode=True)
+                        merged_node = self._merge_nodes(graph, src, dst, force_multinode=True)
+                        # update the entry_node if necessary
+                        if entry_node is not None and entry_node is src:
+                            entry_node = merged_node
                         break
                 elif type_ == "call":
                     graph.remove_node(dst)
@@ -1059,6 +1062,8 @@ class RegionIdentifier(Analysis):
         assert node_a not in graph
         assert node_b not in graph
 
+        return new_node
+
     def _absorb_node(
         self, graph: networkx.DiGraph, node_mommy, node_kiddie, force_multinode=False
     ):  # pylint:disable=no-self-use

{angr-9.2.129 → angr-9.2.130}/angr/analyses/decompiler/ssailification/rewriting_engine.py

@@ -160,12 +160,14 @@ class SimEngineSSARewriting(
 
     def _handle_Store(self, stmt: Store) -> Store | Assignment | None:
         new_data = self._expr(stmt.data)
-        vvar = self._replace_def_store(self.block.addr, self.block.idx, self.stmt_idx, stmt)
-        if vvar is not None:
-            return Assignment(stmt.idx, vvar, stmt.data if new_data is None else new_data, **stmt.tags)
+        if stmt.guard is None:
+            vvar = self._replace_def_store(self.block.addr, self.block.idx, self.stmt_idx, stmt)
+            if vvar is not None:
+                return Assignment(stmt.idx, vvar, stmt.data if new_data is None else new_data, **stmt.tags)
 
         # fall back to Store
         new_addr = self._expr(stmt.addr)
+        new_guard = self._expr(stmt.guard) if stmt.guard is not None else None
 
         if new_addr is not None or new_data is not None:
             return Store(
@@ -174,7 +176,7 @@ class SimEngineSSARewriting(
                 stmt.data if new_data is None else new_data,
                 stmt.size,
                 stmt.endness,
-                guard=stmt.guard,
+                guard=new_guard,
                 **stmt.tags,
             )
 

{angr-9.2.129 → angr-9.2.130}/angr/analyses/decompiler/ssailification/traversal_engine.py

@@ -60,6 +60,8 @@ class SimEngineSSATraversal(
     def _handle_Store(self, stmt: Store):
         self._expr(stmt.addr)
         self._expr(stmt.data)
+        if stmt.guard is not None:
+            self._expr(stmt.guard)
 
         if self.stackvars and isinstance(stmt.addr, StackBaseOffset) and isinstance(stmt.addr.offset, int):
             codeloc = self._codeloc()

{angr-9.2.129 → angr-9.2.130}/angr/analyses/decompiler/structuring/phoenix.py

@@ -20,6 +20,7 @@ from angr.utils.graph import dominates, to_acyclic_graph, dfs_back_edges
 from angr.analyses.decompiler.sequence_walker import SequenceWalker
 from angr.analyses.decompiler.utils import (
     remove_last_statement,
+    remove_last_statements,
     extract_jump_targets,
     switch_extract_cmp_bounds,
     is_empty_or_label_only_node,
@@ -1538,7 +1539,7 @@ class PhoenixStructurer(StructurerBase):
 
         if node_a is not None:
             # remove the last statement in node_a
-            remove_last_statement(node_a)
+            remove_last_statements(node_a)
 
         return True
 
@@ -2308,7 +2309,7 @@ class PhoenixStructurer(StructurerBase):
             if new_src is not None:
                 self.replace_nodes(full_graph, src, new_src)
         if remove_src_last_stmt:
-            remove_last_statement(src)
+            remove_last_statements(src)
 
     def _should_use_multistmtexprs(self, node: Block | BaseNode) -> bool:
         """

{angr-9.2.129 → angr-9.2.130}/angr/analyses/decompiler/utils.py

@@ -45,6 +45,33 @@ def remove_last_statement(node):
     return stmt
 
 
+def remove_last_statements(node) -> bool:
+    if type(node) is CodeNode:
+        return remove_last_statements(node.node)
+    if type(node) is ailment.Block:
+        if not node.statements:
+            return False
+        node.statements = node.statements[:-1]
+        return True
+    if type(node) is MultiNode or type(node) is SequenceNode:
+        if node.nodes:
+            remove_last_statements(node.nodes[-1])
+            if BaseNode.test_empty_node(node.nodes[-1]):
+                node.nodes = node.nodes[:-1]
+            return True
+        return False
+    if type(node) is ConditionNode:
+        r = False
+        if node.true_node is None and node.false_node is not None:
+            r |= remove_last_statements(node.false_node)
+        if node.true_node is not None and node.false_node is None:
+            r |= remove_last_statements(node.true_node)
+        return r
+    if type(node) is LoopNode:
+        return remove_last_statements(node.sequence_node)
+    raise NotImplementedError
+
+
 def append_statement(node, stmt):
     if type(node) is CodeNode:
         append_statement(node.node, stmt)

{angr-9.2.129 → angr-9.2.130}/angr/analyses/variable_recovery/engine_vex.py

@@ -214,8 +214,23 @@ class SimEngineVRVEX(
         for target_func in self.call_info.get(current_addr, []):
             self._handle_function_concrete(target_func)
 
-        # handles return statements
-        if self.block.vex.jumpkind == "Ijk_Ret":
+        if self.block.vex.jumpkind == "Ijk_Call":
+            # emulates return values from calls
+            cc = None
+            for target_func in self.call_info.get(self.state.block_addr, []):
+                if target_func.calling_convention is not None:
+                    cc = target_func.calling_convention
+                    break
+            if cc is None:
+                cc = default_cc(self.arch.name, platform=self.project.simos.name)(self.arch)
+            if isinstance(cc.RETURN_VAL, SimRegArg):
+                reg_offset, reg_size = self.arch.registers[cc.RETURN_VAL.reg_name]
+                data = self._top(reg_size * self.arch.byte_width)
+                self._assign_to_register(reg_offset, data, reg_size, create_variable=False)
+
+        elif self.block.vex.jumpkind == "Ijk_Ret":
+            # handles return statements
+
             # determine the size of the return register
             # TODO: Handle multiple return registers
             cc = self.state.function.calling_convention

{angr-9.2.129 → angr-9.2.130}/angr/engines/light/engine.py

@@ -1272,19 +1272,21 @@ class SimEngineLightAILMixin(SimEngineLightMixin):
         if expr_1 is None:
             expr_1 = arg1
 
-        try:
-            return expr_0 * expr_1
-        except TypeError:
-            return ailment.Expr.BinaryOp(
-                expr.idx,
-                "Mull",
-                [expr_0, expr_1],
-                expr.signed,
-                bits=expr.bits,
-                floating_point=expr.floating_point,
-                rounding_mode=expr.rounding_mode,
-                **expr.tags,
-            )
+        if isinstance(expr_0, claripy.ast.Bits) and isinstance(expr_1, claripy.ast.Bits):
+            expr0_ext = claripy.ZeroExt(expr_0.size(), expr_0)
+            expr1_ext = claripy.ZeroExt(expr_1.size(), expr_1)
+            return expr0_ext * expr1_ext
+
+        return ailment.Expr.BinaryOp(
+            expr.idx,
+            "Mull",
+            [expr_0, expr_1],
+            expr.signed,
+            bits=expr.bits * 2,
+            floating_point=expr.floating_point,
+            rounding_mode=expr.rounding_mode,
+            **expr.tags,
+        )
 
     def _ail_handle_And(self, expr):
         arg0, arg1 = expr.operands

{angr-9.2.129 → angr-9.2.130/angr.egg-info}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.1
 Name: angr
-Version: 9.2.129
+Version: 9.2.130
 Summary: A multi-architecture binary analysis toolkit, with the ability to perform dynamic symbolic execution and various static analyses on binaries
 Home-page: https://github.com/angr/angr
 License: BSD-2-Clause
@@ -16,13 +16,13 @@ Description-Content-Type: text/markdown
 License-File: LICENSE
 Requires-Dist: CppHeaderParser
 Requires-Dist: GitPython
-Requires-Dist: ailment==9.2.129
-Requires-Dist: archinfo==9.2.129
+Requires-Dist: ailment==9.2.130
+Requires-Dist: archinfo==9.2.130
 Requires-Dist: cachetools
 Requires-Dist: capstone==5.0.3
 Requires-Dist: cffi>=1.14.0
-Requires-Dist: claripy==9.2.129
-Requires-Dist: cle==9.2.129
+Requires-Dist: claripy==9.2.130
+Requires-Dist: cle==9.2.130
 Requires-Dist: itanium-demangler
 Requires-Dist: mulpyplexer
 Requires-Dist: nampa
@@ -31,7 +31,7 @@ Requires-Dist: protobuf>=5.28.2
 Requires-Dist: psutil
 Requires-Dist: pycparser>=2.18
 Requires-Dist: pyformlang
-Requires-Dist: pyvex==9.2.129
+Requires-Dist: pyvex==9.2.130
 Requires-Dist: rich>=13.1.0
 Requires-Dist: sortedcontainers
 Requires-Dist: sympy

{angr-9.2.129 → angr-9.2.130}/angr.egg-info/requires.txt

@@ -1,12 +1,12 @@
 CppHeaderParser
 GitPython
-ailment==9.2.129
-archinfo==9.2.129
+ailment==9.2.130
+archinfo==9.2.130
 cachetools
 capstone==5.0.3
 cffi>=1.14.0
-claripy==9.2.129
-cle==9.2.129
+claripy==9.2.130
+cle==9.2.130
 itanium-demangler
 mulpyplexer
 nampa
@@ -15,7 +15,7 @@ protobuf>=5.28.2
 psutil
 pycparser>=2.18
 pyformlang
-pyvex==9.2.129
+pyvex==9.2.130
 rich>=13.1.0
 sortedcontainers
 sympy

{angr-9.2.129 → angr-9.2.130}/pyproject.toml

@@ -1,5 +1,5 @@
 [build-system]
-requires = ["setuptools>=59", "wheel", "pyvex==9.2.129", "unicorn==2.0.1.post1"]
+requires = ["setuptools>=59", "wheel", "pyvex==9.2.130", "unicorn==2.0.1.post1"]
 build-backend = "setuptools.build_meta"
 
 [tool.black]

{angr-9.2.129 → angr-9.2.130}/setup.cfg

@@ -21,13 +21,13 @@ packages = find:
 install_requires = 
 	CppHeaderParser
 	GitPython
-	ailment==9.2.129
-	archinfo==9.2.129
+	ailment==9.2.130
+	archinfo==9.2.130
 	cachetools
 	capstone==5.0.3
 	cffi>=1.14.0
-	claripy==9.2.129
-	cle==9.2.129
+	claripy==9.2.130
+	cle==9.2.130
 	itanium-demangler
 	mulpyplexer
 	nampa
@@ -36,7 +36,7 @@ install_requires =
 	psutil
 	pycparser>=2.18
 	pyformlang
-	pyvex==9.2.129
+	pyvex==9.2.130
 	rich>=13.1.0
 	sortedcontainers
 	sympy