SimplHDL 0.5.5__tar.gz → 0.5.7__tar.gz

{simplhdl-0.5.5 → simplhdl-0.5.7}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: SimplHDL
-Version: 0.5.5
+Version: 0.5.7
 Summary: A framework for simulating and implementing HDL designs
 Author-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>
 Maintainer-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>

{simplhdl-0.5.5 → simplhdl-0.5.7}/src/SimplHDL.egg-info/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: SimplHDL
-Version: 0.5.5
+Version: 0.5.7
 Summary: A framework for simulating and implementing HDL designs
 Author-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>
 Maintainer-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>

simplhdl-0.5.7/src/simplhdl/__init__.py

@@ -0,0 +1 @@
+__version__ = "0.5.7"

{simplhdl-0.5.5 → simplhdl-0.5.7}/src/simplhdl/cocotb.py

@@ -102,8 +102,10 @@ class Cocotb:
                                     logger.info(f"Cocotb dut '{self.dut}' is Verilog")
                                     return VerilogSourceFile
                                 else:
-                                    logger.warning(f"Found HDL module {name} in ",
-                                                   f"library '{file.Library.Name}' expected '{lib}'")
+                                    logger.warning(
+                                        f"Found HDL module {name} in "
+                                        f"library '{file.Library.Name}' expected '{lib}'"
+                                    )
                 else:
                     continue
         except UnicodeDecodeError:

{simplhdl-0.5.5 → simplhdl-0.5.7}/src/simplhdl/flows/encrypt/encryptflow.py

@@ -5,11 +5,13 @@ from typing import List
 from argparse import Namespace
 from pathlib import Path
 
+from simplhdl.info import Info
 from simplhdl.flow import FlowFactory, FlowTools, FlowError
 from simplhdl.flows.implementationflow import ImplementationFlow
 from simplhdl.utils import sh
 from simplhdl.pyedaa.project import Project
 from simplhdl.pyedaa import SystemVerilogSourceFile, VerilogSourceFile, VHDLSourceFile, VerilogIncludeFile
+from simplhdl.pyedaa.attributes import Encrypt
 
 logger = logging.getLogger(__name__)
 
@@ -47,6 +49,11 @@ class EncryptFlow(ImplementationFlow):
             action='store',
             help='Output directory'
         )
+        parser.add_argument(
+            '--info',
+            action='store_true',
+            help="Print project"
+        )
 
     def __init__(self, name, args: Namespace, project: Project, builddir: Path):
         super().__init__(name, args, project, builddir)
@@ -62,6 +69,12 @@ class EncryptFlow(ImplementationFlow):
         self.is_tool_setup()
 
     def execute(self):
+        if self.args.info:
+            args = Namespace(files=False, filesets=False, libraries=False, hooks=False)
+            info = Info(self.name, args, self.project, self.builddir)
+            info.run()
+            return
+
         outputdir = self.args.outdir or self.builddir
         outputdir.mkdir(parents=True, exist_ok=True)
 
@@ -87,7 +100,7 @@ class EncryptFlow(ImplementationFlow):
             else:
                 vendors = VENDORS
 
-            if self.args.no_encrypt:
+            if self.args.no_encrypt or not file[Encrypt]:
                 shutil.copyfile(file.Path.absolute(), destFile.absolute())
             else:
                 encrypt(file.Path, destFile, language, vendors)

{simplhdl-0.5.5 → simplhdl-0.5.7}/src/simplhdl/generators/spd.py

@@ -5,7 +5,7 @@ from typing import List, Generator, Optional
 from pathlib import Path
 from xml.etree.ElementTree import Element, parse
 from zipfile import ZipFile
-from shutil import copy, copytree, rmtree
+from shutil import copy, copytree, rmtree, ignore_patterns
 
 from simplhdl.pyedaa import (
     File,
@@ -72,6 +72,7 @@ class Spd:
             sh(command, cwd=filename.parent)
             if not spdfile.exists():
                 raise FileNotFoundError(f"{spdfile}: doesn't exits")
+        logger.debug(f"Parse {spdfile}")
         self.tree = parse(spdfile)
         self.root = self.tree.getroot()
         self.location = spdfile.parent.absolute()
@@ -222,7 +223,7 @@ class QuartusIP(GeneratorBase):
             seen[fileid] = file
 
 
-def parse_qsys(filename: QuartusQSYSSpecificationFile) -> List[File]:
+def get_list_of_ipfiles(filename: QuartusQSYSSpecificationFile) -> List[File]:
     """
     Search for IP files in a QSYS file and return a list of QuartusIPSpecificationFile objects.
     """
@@ -234,6 +235,15 @@ def parse_qsys(filename: QuartusQSYSSpecificationFile) -> List[File]:
             if m:
                 ipfile = filename.Path.parent.joinpath(m.group(1))
                 if ipfile.exists():
+                    logger.debug(f"Found {ipfile} in {filename.Path}")
+                    files.append(QuartusIPSpecificationFile(ipfile))
+                else:
+                    logger.warning(f"File {ipfile} not found")
+            m = re.search(r'<parameter name="logicalView">(.*\.ip)</parameter>', line)
+            if m:
+                ipfile = filename.Path.parent.joinpath(m.group(1))
+                if ipfile.exists():
+                    logger.debug(f"Found {ipfile} in {filename.Path}")
                     files.append(QuartusIPSpecificationFile(ipfile))
                 else:
                     logger.warning(f"File {ipfile} not found")
@@ -244,10 +254,10 @@ def qsys_to_fileset(file: QuartusQSYSSpecificationFile, flow: FlowBase, library)
     """
     Parse a QSYS file and return a FileSet object.
     """
-    ipfiles = parse_qsys(file)
+    ipfiles = get_list_of_ipfiles(file)
     if flow.category == FlowCategory.SIMULATION:
         parent = file.FileSet
-        for ipfile in ipfiles + [file]:
+        for ipfile in [file] + ipfiles:
             spd = Spd(ipfile.Path, flow, file.Path.parent.absolute())
             for fileset in reversed(spd.filesets):
                 # Add fileset to parent, then set parent to fileset to make a chain
@@ -311,10 +321,18 @@ def copy_qsysfile(file: QuartusQSYSSpecificationFile, dest: Path) -> QuartusQSYS
     Copy QSYS files to a directory and return a new QuartusQSYSSpecificationFile object with the new path.
     """
     md5file = dest.joinpath(file.Path.name).with_suffix('.md5')
-    qsysdir = dest.joinpath(file.Path.name)
+    qsysdir = dest.joinpath(file.Path.name).with_suffix('')
+
     src = file.Path.parent
     if not md5file.exists() or not md5check(src, filename=md5file):
-        copytree(str(src), str(qsysdir), dirs_exist_ok=True)
+        logger.debug(f"Copy {file.Path} to {qsysdir}")
+        # If destination is a subdirectory of source the copytree will have
+        # to ignore this subdirectory
+        if qsysdir.absolute().is_relative_to(src.absolute()):
+            ignoredir = qsysdir.absolute().relative_to(src.absolute()).parents[-2]
+            copytree(str(src), str(qsysdir), dirs_exist_ok=True, ignore=ignore_patterns(ignoredir))
+        else:
+            copytree(str(src), str(qsysdir), dirs_exist_ok=True)
         md5write(src, filename=md5file)
     file._fileType = QuartusQSYSSpecificationFile
     file._path = qsysdir.joinpath(file.Path.name).with_suffix('.qsys').resolve()
@@ -355,7 +373,7 @@ def unpack(file: Path, dest: Path) -> None:
     """
     Unpack a file to a directory and return the new path.
     """
-    md5file = dest.joinpath(file.name).with_suffix('.md5')
+    md5file = dest.parent.joinpath(file.name).with_suffix('.md5')
     if not md5file.exists() or not md5check(file, filename=md5file):
         logger.info(f"Unpack {file} to {dest}")
         with ZipFile(file, 'r') as zip:

{simplhdl-0.5.5 → simplhdl-0.5.7}/src/simplhdl/pyedaa/__init__.py

@@ -3,10 +3,7 @@ import pyEDAA.ProjectModel as pm
 from pathlib import Path
 from typing import Optional
 from pyTooling.MetaClasses import ExtendedType
-from .attributes import UsedIn
-
-SIMULATION = "simulation"
-IMPLEMENTATION = "implementation"
+from .attributes import Encrypt, UsedIn, SIMULATION, IMPLEMENTATION
 
 
 class FileMixIn(metaclass=ExtendedType, mixin=True):
@@ -31,7 +28,9 @@ class HDLLibrary(pm.VHDLLibrary):
 
 
 class HDLIncludeFile(SourceFile):
-    pass
+    def _registerAttributes(self):
+        super()._registerAttributes()
+        self[UsedIn] = {SIMULATION, IMPLEMENTATION}
 
 
 class HDLSearchPath(HDLIncludeFile):
@@ -51,6 +50,8 @@ class HDLSourceFile(pm.HDLSourceFile, FileMixIn):
     def _registerAttributes(self):
         super()._registerAttributes()
         FileMixIn._registerAttributes(self)
+        self[UsedIn] = {SIMULATION, IMPLEMENTATION}
+        self[Encrypt] = True
 
     @property
     def Library(self) -> HDLLibrary:
@@ -84,6 +85,30 @@ class VHDLSourceFile(HDLSourceFile, pm.HumanReadableContent):
     pass
 
 
+class VerilogIncludeEncryptedFile(VerilogIncludeFile):
+    def _registerAttributes(self):
+        super()._registerAttributes()
+        self[Encrypt] = False
+
+
+class VerilogEncryptedSourceFile(VerilogSourceFile):
+    def _registerAttributes(self):
+        super()._registerAttributes()
+        self[Encrypt] = False
+
+
+class SystemVerilogEncryptedSourceFile(SystemVerilogSourceFile):
+    def _registerAttributes(self):
+        super()._registerAttributes()
+        self[Encrypt] = False
+
+
+class VHDLEncryptedSourceFile(VHDLSourceFile):
+    def _registerAttributes(self):
+        super()._registerAttributes()
+        self[Encrypt] = False
+
+
 class PythonSourceFile(pm.PythonSourceFile):
     pass
 

simplhdl-0.5.7/src/simplhdl/pyedaa/attributes.py

@@ -0,0 +1,16 @@
+import pyEDAA.ProjectModel as pm
+
+from typing import Set
+
+SIMULATION = "simulation"
+IMPLEMENTATION = "implementation"
+
+
+class UsedIn(pm.Attribute):
+    NAME: 'UsedIn'
+    VALUE_TYPE: Set[str]
+
+
+class Encrypt(pm.Attribute):
+    NAME: 'Encrypt'
+    VALUE_TYPE: bool

simplhdl-0.5.5/src/simplhdl/__init__.py

@@ -1 +0,0 @@
-__version__ = "0.5.5"

simplhdl-0.5.5/src/simplhdl/pyedaa/attributes.py

@@ -1,8 +0,0 @@
-import pyEDAA.ProjectModel as pm
-
-from typing import Set
-
-
-class UsedIn(pm.Attribute):
-    NAME: 'UsedIn'
-    VALUE_TYPE: Set[str]