SimplHDL 0.5.3__tar.gz → 0.5.5__tar.gz

{simplhdl-0.5.3 → simplhdl-0.5.5}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: SimplHDL
-Version: 0.5.3
+Version: 0.5.5
 Summary: A framework for simulating and implementing HDL designs
 Author-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>
 Maintainer-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>

{simplhdl-0.5.3 → simplhdl-0.5.5}/src/SimplHDL.egg-info/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: SimplHDL
-Version: 0.5.3
+Version: 0.5.5
 Summary: A framework for simulating and implementing HDL designs
 Author-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>
 Maintainer-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>

simplhdl-0.5.5/src/simplhdl/__init__.py

@@ -0,0 +1 @@
+__version__ = "0.5.5"

{simplhdl-0.5.3 → simplhdl-0.5.5}/src/simplhdl/__main__.py

@@ -5,8 +5,9 @@ import logging
 import traceback
 
 from typing import Sequence
-
 from pathlib import Path
+from rich.logging import RichHandler
+
 from . import __version__
 from .simplhdl import Simplhdl
 from .plugins import load_plugins
@@ -67,7 +68,18 @@ def main():
         args = parse_arguments()
         levels = [logging.INFO, logging.DEBUG, logging.NOTSET]
         level = levels[min(args.verbose, len(levels)-1)]
-        logging.basicConfig(level=level)
+        if level < logging.INFO:
+            show_path = True
+        else:
+            show_path = False
+
+        FORMAT = "[simplhdl.%(module)s] - %(message)s"
+        console = RichHandler(level=level, show_time=False, rich_tracebacks=True, show_path=show_path)
+        logging.basicConfig(
+            level=5,
+            format=FORMAT,
+            handlers=[console]
+        )
         simpl = Simplhdl(args)
         simpl.run()
     except (NotImplementedError, FileNotFoundError, CalledShError,

{simplhdl-0.5.3 → simplhdl-0.5.5}/src/simplhdl/cocotb.py

@@ -41,7 +41,7 @@ class Cocotb:
             return None
         set_ = set()
         try:
-            modules = self.project.DefaultDesign._topLevel.split()
+            modules = self.project.DefaultDesign.TopLevel.split()
         except AttributeError:
             raise FlowError("No top levels found")
 
@@ -58,14 +58,14 @@ class Cocotb:
 
     def hdltoplevels(self) -> str:
         tops = []
-        for t in self.project.DefaultDesign._topLevel.split():
+        for t in self.project.DefaultDesign.TopLevel.split():
             if t != self.top:
                 tops.append(t)
         return ' '.join(tops)
 
     def get_dut(self) -> str:
         try:
-            for top in self.project.DefaultDesign._topLevel.split():
+            for top in self.project.DefaultDesign.TopLevel.split():
                 if top != self.top:
                     return top
         except AttributeError:
@@ -97,7 +97,7 @@ class Cocotb:
                     with open(file.Path, 'r', errors='replace') as f:
                         lines = f.readlines()
                         for line in lines:
-                            if re.search(rf'^\s*module\s+{name}(\s+|\(|;|$)', line):
+                            if re.search(rf'^\s*module\s+{name}(\s+|#\(|\(|;|$)', line):
                                 if file.Library.Name == lib:
                                     logger.info(f"Cocotb dut '{self.dut}' is Verilog")
                                     return VerilogSourceFile

{simplhdl-0.5.3 → simplhdl-0.5.5}/src/simplhdl/flow.py

@@ -1,3 +1,5 @@
+import logging
+
 from argparse import Namespace
 from pathlib import Path
 from typing import Callable, Dict, Set
@@ -16,6 +18,11 @@ class FlowBase(metaclass=ABCMeta):
         self.builddir: Path = builddir
         self.category: FlowCategory = FlowCategory.DEFAULT
         self.tools: Set = set()
+        self.builddir.mkdir(parents=True, exist_ok=True)
+        file = logging.FileHandler(self.builddir.joinpath('simplhdl.log'), mode='w')
+        file.setLevel(logging.NOTSET)
+        file.setFormatter(logging.Formatter('%(asctime)s - %(levelname)s:%(filename)s:%(lineno)d - %(message)s'))
+        logging.getLogger().addHandler(file)
 
     @classmethod
     @abstractmethod

{simplhdl-0.5.3 → simplhdl-0.5.5}/src/simplhdl/flows/flake8/flake8flow.py

@@ -49,7 +49,7 @@ class Flake8Flow(FlowBase):
             self.files = [f.Path for f in self.project.DefaultDesign.DefaultFileSet.Files(PythonSourceFile)]
 
     def generate(self):
-        config = os.getenv('SIMPLHDL_FLAKE8_RULES')
+        config = os.getenv('SIMPLHDL_FLAKE8_CONFIG')
         if config:
             shutil.copy(config, self.builddir.joinpath('setup.cfg'))
         else:

{simplhdl-0.5.3 → simplhdl-0.5.5}/src/simplhdl/flows/modelsim/modelsimflow.py

@@ -6,6 +6,7 @@ from pathlib import Path
 from typing import Any, List, Dict, Optional
 from argparse import Namespace
 from jinja2 import Template
+from simplhdl.pyedaa import ModelsimIniFile
 from simplhdl.pyedaa.project import Project
 from simplhdl.pyedaa.fileset import FileSet
 from simplhdl.utils import sh, escape
@@ -225,6 +226,22 @@ class ModelSimFlow(SimulationFlow):
             library = ''
         return library
 
+    def generate(self):
+        super().generate()
+        self.copy_modelsim_ini()
+
+    def copy_modelsim_ini(self):
+        files = list(self.project.DefaultDesign.Files(ModelsimIniFile))
+        if len(files) > 1:
+            logger.warning("Multiple modelsim.ini files found in project. Only the first file will be used.")
+        for i, file in enumerate(reversed(files)):
+            if i > 0:
+                logger.warning(f"ignore {file.Path}")
+            else:
+                logger.debug(f"Copy {file.Path} to {self.builddir}")
+                logger.info(f"Use {file.Path}")
+                shutil.copy(file.Path.absolute(), self.builddir.absolute())
+
     def execute(self, step: str) -> None:
         self.run_hooks('pre')
 

{simplhdl-0.5.3 → simplhdl-0.5.5}/src/simplhdl/flows/quartusexport/quartusexportflow.py

@@ -108,7 +108,7 @@ class QuartusExportFlow(ImplementationFlow):
             shutil.rmtree(self.builddir.joinpath('dni'))
             shutil.rmtree(self.builddir.joinpath('qdb'))
             os.remove(self.builddir.joinpath('project.tcl'))
-        except FileNotFoundError as e:
+        except FileNotFoundError:
             pass
 
     def archive_project(self) -> None:

{simplhdl-0.5.3 → simplhdl-0.5.5}/src/simplhdl/flows/questasim/questasimflow.py

@@ -14,6 +14,7 @@ from typing import Any, List, Dict, Optional
 from argparse import Namespace
 from jinja2 import Template
 from simplhdl.pyedaa.project import Project
+from simplhdl.pyedaa import ModelsimIniFile
 from simplhdl.utils import sh, escape
 from simplhdl.flow import FlowFactory, FlowTools
 from simplhdl.info import Info
@@ -348,6 +349,18 @@ class QuestaSimFlow(SimulationFlow):
                 logger.warning("Visualizer is not setup correctly")
         return False
 
+    def copy_modelsim_ini(self):
+        files = list(self.project.DefaultDesign.Files(ModelsimIniFile))
+        if len(files) > 1:
+            logger.warning("Multiple modelsim.ini files found in project. Only the first file will be used.")
+        for i, file in enumerate(reversed(files)):
+            if i > 0:
+                logger.warning(f"ignore {file.Path}")
+            else:
+                logger.debug(f"Copy {file.Path} to {self.builddir}")
+                logger.info(f"Use {file.Path}")
+                shutil.copy(file.Path.absolute(), self.builddir.absolute())
+
     def generate(self):
         templatedir = resources_files(self.templates)
         env = Environment(
@@ -362,6 +375,7 @@ class QuestaSimFlow(SimulationFlow):
         for template in templates:
             generate_from_template(template, self.builddir, self.get_globals())
         self.copy_memory_files()
+        self.copy_modelsim_ini()
 
     def get_qrun_version(self) -> float:
         output = sh(['qrun', '-version'], self.builddir)

{simplhdl-0.5.3 → simplhdl-0.5.5}/src/simplhdl/flows/verible/veribleflow.py

@@ -8,7 +8,7 @@ from argparse import Namespace
 from pathlib import Path
 from jinja2 import Environment, FileSystemLoader
 
-from simplhdl.flow import FlowFactory, FlowBase
+from simplhdl.flow import FlowFactory, FlowBase, FlowError
 from simplhdl.resources.templates import verible as templates
 from simplhdl.utils import sh, CalledShError, generate_from_template
 from simplhdl.pyedaa import VerilogIncludeFile, VerilogSourceFile, SystemVerilogSourceFile
@@ -51,8 +51,11 @@ class VeribleFlow(FlowBase):
     def generate(self):
         if self.args.rules:
             self.rules = self.args.rules
-        elif os.getenv('SIMPLHDL_VERIBLE_RULES'):
-            self.rules = self.args.rules
+        elif os.getenv('SIMPLHDL_VERIBLE_CONFIG'):
+            rules = os.getenv('SIMPLHDL_VERIBLE_CONFIG')
+            if not Path(rules).exists():
+                raise FlowError(f"Rules file {rules} does not exist")
+            self.rules = rules
         else:
             templatedir = resources_files(self.templates)
             environment = Environment(
@@ -67,7 +70,7 @@ class VeribleFlow(FlowBase):
         command = [
             "verible-verilog-lint",
             "--check_syntax=false",
-            "--ruleset=all",
+            "--ruleset=none",
             "--rules_config", self.rules
         ]
 

{simplhdl-0.5.3 → simplhdl-0.5.5}/src/simplhdl/flows/vsg/vsgflow.py

@@ -74,8 +74,11 @@ class VsgFlow(FlowBase):
                                UsedIn=UsedIn)
         if self.args.rules:
             self.rules = self.args.rules
-        elif os.getenv('SIMPLHDL_VSG_RULES'):
-            self.rules = self.args.rules
+        elif os.getenv('SIMPLHDL_VSG_CONFIG'):
+            rules = os.getenv('SIMPLHDL_VSG_CONFIG')
+            if not Path(rules).exists():
+                raise FlowError(f"Rules file {rules} does not exist")
+            self.rules = rules
         else:
             template = environment.get_template('rules.yml.j2')
             generate_from_template(template, self.builddir)

{simplhdl-0.5.3 → simplhdl-0.5.5}/src/simplhdl/generators/ipxact.py

@@ -10,7 +10,9 @@ from zipfile import ZipFile
 from ..generator import GeneratorFactory, GeneratorBase
 from ..utils import md5write, md5check
 from ..flow import FlowBase, FlowCategory
+from ..pyedaa import SIMULATION
 from ..pyedaa.fileset import FileSet
+from ..pyedaa.attributes import UsedIn
 from ..pyedaa.vhdllibrary import VHDLLibrary
 from ..pyedaa import (
     File, SystemVerilogSourceFile, TCLSourceFile, ConstraintFile, HDLSourceFile,
@@ -198,7 +200,10 @@ class VivadoIP(GeneratorBase):
     def run(self, flow: FlowBase):
         if flow.category == FlowCategory.SIMULATION:
             os.makedirs(self.builddir, exist_ok=True)
-            for ipfile in self.project.DefaultDesign.DefaultFileSet.Files(fileType=VivadoIPSpecificationFile):
+            ipfiles = list(self.project.DefaultDesign.DefaultFileSet.Files(fileType=VivadoIPSpecificationFile))
+            ipfiles = [f for f in ipfiles if SIMULATION in f[UsedIn]]
+
+            for ipfile in ipfiles:
                 newipfile = self.unpack_ip(ipfile)
                 files = self.get_files(newipfile.Path)
                 last_lib = ''

{simplhdl-0.5.3 → simplhdl-0.5.5}/src/simplhdl/generators/spd.py

@@ -23,6 +23,7 @@ from simplhdl.pyedaa import (
     QuartusQSYSCompressedSpecificationFile,
     QuartusQIPSpecificationFile
 )
+from simplhdl.pyedaa import SIMULATION, IMPLEMENTATION
 from simplhdl.pyedaa.fileset import FileSet
 from simplhdl.pyedaa.attributes import UsedIn
 from simplhdl.flow import FlowBase, FlowCategory, FlowTools
@@ -183,34 +184,42 @@ class QuartusIP(GeneratorBase):
             filename._path = dest.with_suffix('.ip').absolute()
         return filename
 
-    def run(self, flow: FlowBase) -> None:
+    def run(self, flow: FlowBase) -> None:  # noqa: C901
         seen = dict()
         self.flow = flow
         ip_dir = self.builddir.joinpath('ips')
         qsys_dir = self.builddir.joinpath('qsys')
-        files = list(self.project.DefaultDesign.DefaultFileSet.Files(fileType=QuartusIPSpecificationFile))
-        # files = filter_duplicated_files(files)
-        if not flow.category == FlowCategory.DEFAULT:
-            for file in files:
-                # The second time we see a file it is already proccessed and we just
-                # Update the file path
-                fileid = str(file.Path.resolve())
-                if fileid in seen:
-                    file._path = seen.get(fileid)._path
-                    continue
-                if file.FileType == QuartusQIPSpecificationFile:
-                    continue
-                elif file.FileType == QuartusIPCompressedSpecificationFile:
-                    file = unpack_ipfile(file, ip_dir)
-                elif file.FileType == QuartusIPSpecificationFile:
-                    file = copy_ipfile(file, ip_dir)
-                elif file.FileType == QuartusQSYSCompressedSpecificationFile:
-                    file = unpack_qsysfile(file, qsys_dir)
-                elif file.FileType == QuartusQSYSSpecificationFile:
-                    file = copy_qsysfile(file, qsys_dir)
-                parse_file(file, flow, self.project.DefaultDesign.DefaultFileSet.VHDLLibrary)
-                # register the file as seen
-                seen[fileid] = file
+        all_files = list(self.project.DefaultDesign.DefaultFileSet.Files(fileType=QuartusIPSpecificationFile))
+
+        if flow.category == FlowCategory.SIMULATION:
+            files = [f for f in all_files if SIMULATION in f[UsedIn]]
+        elif flow.category == FlowCategory.IMPLEMENTATION:
+            files = [f for f in all_files if IMPLEMENTATION in f[UsedIn]]
+        elif flow.category == FlowCategory.DEFAULT:
+            return
+        else:
+            files = all_files
+
+        for file in files:
+            # The second time we see a file it is already proccessed and we just
+            # Update the file path
+            fileid = str(file.Path.resolve())
+            if fileid in seen:
+                file._path = seen.get(fileid)._path
+                continue
+            if file.FileType == QuartusQIPSpecificationFile:
+                continue
+            elif file.FileType == QuartusIPCompressedSpecificationFile:
+                file = unpack_ipfile(file, ip_dir)
+            elif file.FileType == QuartusIPSpecificationFile:
+                file = copy_ipfile(file, ip_dir)
+            elif file.FileType == QuartusQSYSCompressedSpecificationFile:
+                file = unpack_qsysfile(file, qsys_dir)
+            elif file.FileType == QuartusQSYSSpecificationFile:
+                file = copy_qsysfile(file, qsys_dir)
+            parse_file(file, flow, self.project.DefaultDesign.DefaultFileSet.VHDLLibrary)
+            # register the file as seen
+            seen[fileid] = file
 
 
 def parse_qsys(filename: QuartusQSYSSpecificationFile) -> List[File]:
@@ -281,14 +290,14 @@ def copy_ipfile(file: QuartusIPSpecificationFile, dest: Path) -> QuartusIPSpecif
     destfile = dest.joinpath(file.Path.name)
     if srcdir.exists():
         if not md5file.exists() or not md5check(file.Path, srcdir, filename=md5file):
-            logger.info(f"Copy {file.Path} to {destfile}")
-            logger.info(f"Copy {srcdir} to {destdir}")
+            logger.debug(f"Copy {file.Path} to {destfile}")
+            logger.debug(f"Copy {srcdir} to {destdir}")
             copy(str(file.Path), str(destfile))
             copytree(str(srcdir), str(destdir), dirs_exist_ok=True)
             md5write(file.Path, srcdir, filename=md5file)
     else:
         if not md5file.exists() or not md5check(file.Path, filename=md5file):
-            logger.info(f"Copy {file.Path} to {destfile}")
+            logger.debug(f"Copy {file.Path} to {destfile}")
             rmtree(destdir, ignore_errors=True)
             copy(str(file.Path), str(destfile))
             md5write(file.Path, filename=md5file)

{simplhdl-0.5.3 → simplhdl-0.5.5}/src/simplhdl/pyedaa/__init__.py

@@ -102,7 +102,9 @@ class TCLSourceFile(pm.TCLSourceFile):
 
 
 class IPSpecificationFile(File, pm.XMLContent):
-    pass
+    def _registerAttributes(self):
+        super()._registerAttributes()
+        FileMixIn._registerAttributes(self)
 
 
 class NetlistFile(pm.NetlistFile, FileMixIn):
@@ -204,3 +206,10 @@ class MemoryInitFile(File):
     def _registerAttributes(self):
         super()._registerAttributes()
         FileMixIn._registerAttributes(self)
+
+
+class ModelsimIniFile(File):
+    def _registerAttributes(self):
+        super()._registerAttributes()
+        FileMixIn._registerAttributes(self)
+        self[UsedIn] = {SIMULATION}

{simplhdl-0.5.3 → simplhdl-0.5.5}/src/simplhdl/pyedaa/design.py

@@ -39,15 +39,16 @@ class Design(pm.Design):
     @property
     def TopLevel(self) -> str:
         """Property setting or returning the fileset's toplevel."""
-        top = set()
+        top = list()
         if self._topLevel is not None:
             for t in self._topLevel.split():
-                top.add(t)
+                top.append(t)
         for fileset in self._fileSets.values():
             if fileset.TopLevel is not None:
                 for t in fileset.TopLevel.split():
-                    top.add(t)
-        return ' '.join(top)
+                    top.append(t)
+        # remove duplicates without changing the order
+        return ' '.join(list(dict.fromkeys(top)))
 
     @TopLevel.setter
     def TopLevel(self, value: str) -> None:

{simplhdl-0.5.3 → simplhdl-0.5.5}/src/simplhdl/utils.py

@@ -17,7 +17,7 @@ class CalledShError(Exception):
     pass
 
 
-def sh(command: List[str], cwd: Optional[Path] = None, output=False, shell=False, env=None):
+def sh(command: List[str], cwd: Optional[Path] = None, output=False, shell=False, env=None, indent=2):
     if os.name == 'nt':
         shell = True
 
@@ -26,7 +26,7 @@ def sh(command: List[str], cwd: Optional[Path] = None, output=False, shell=False
         if output:
             stdout: str = ''
             for line in p.stdout:
-                sys.stdout.buffer.write(line)
+                sys.stdout.buffer.write(b' '*indent + line)
                 sys.stdout.buffer.flush()
                 stdout += line.decode()
             _, stderr = p.communicate()

simplhdl-0.5.3/src/simplhdl/__init__.py

@@ -1 +0,0 @@
-__version__ = "0.5.3"