SimplHDL 0.5.3__tar.gz → 0.5.4__tar.gz

{simplhdl-0.5.3 → simplhdl-0.5.4}/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: SimplHDL
-Version: 0.5.3
+Version: 0.5.4
 Summary: A framework for simulating and implementing HDL designs
 Author-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>
 Maintainer-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>

{simplhdl-0.5.3 → simplhdl-0.5.4}/src/SimplHDL.egg-info/PKG-INFO

@@ -1,6 +1,6 @@
 Metadata-Version: 2.4
 Name: SimplHDL
-Version: 0.5.3
+Version: 0.5.4
 Summary: A framework for simulating and implementing HDL designs
 Author-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>
 Maintainer-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>

simplhdl-0.5.4/src/simplhdl/__init__.py

@@ -0,0 +1 @@
+__version__ = "0.5.4"

{simplhdl-0.5.3 → simplhdl-0.5.4}/src/simplhdl/flows/modelsim/modelsimflow.py

@@ -6,6 +6,7 @@ from pathlib import Path
 from typing import Any, List, Dict, Optional
 from argparse import Namespace
 from jinja2 import Template
+from simplhdl.pyedaa import ModelsimIniFile
 from simplhdl.pyedaa.project import Project
 from simplhdl.pyedaa.fileset import FileSet
 from simplhdl.utils import sh, escape
@@ -225,6 +226,22 @@ class ModelSimFlow(SimulationFlow):
             library = ''
         return library
 
+    def generate(self):
+        super().generate()
+        self.copy_modelsim_ini()
+
+    def copy_modelsim_ini(self):
+        files = list(self.project.DefaultDesign.Files(ModelsimIniFile))
+        if len(files) > 1:
+            logger.warning("Multiple modelsim.ini files found in project. Only the first file will be used.")
+        for i, file in enumerate(reversed(files)):
+            if i > 0:
+                logger.warning(f"ignore {file.Path}")
+            else:
+                logger.debug(f"Copy {file.Path} to {self.builddir}")
+                logger.info(f"Use {file.Path}")
+                shutil.copy(file.Path.absolute(), self.builddir.absolute())
+
     def execute(self, step: str) -> None:
         self.run_hooks('pre')
 

{simplhdl-0.5.3 → simplhdl-0.5.4}/src/simplhdl/flows/quartusexport/quartusexportflow.py

@@ -108,7 +108,7 @@ class QuartusExportFlow(ImplementationFlow):
             shutil.rmtree(self.builddir.joinpath('dni'))
             shutil.rmtree(self.builddir.joinpath('qdb'))
             os.remove(self.builddir.joinpath('project.tcl'))
-        except FileNotFoundError as e:
+        except FileNotFoundError:
             pass
 
     def archive_project(self) -> None:

{simplhdl-0.5.3 → simplhdl-0.5.4}/src/simplhdl/flows/questasim/questasimflow.py

@@ -14,6 +14,7 @@ from typing import Any, List, Dict, Optional
 from argparse import Namespace
 from jinja2 import Template
 from simplhdl.pyedaa.project import Project
+from simplhdl.pyedaa import ModelsimIniFile
 from simplhdl.utils import sh, escape
 from simplhdl.flow import FlowFactory, FlowTools
 from simplhdl.info import Info
@@ -348,6 +349,18 @@ class QuestaSimFlow(SimulationFlow):
                 logger.warning("Visualizer is not setup correctly")
         return False
 
+    def copy_modelsim_ini(self):
+        files = list(self.project.DefaultDesign.Files(ModelsimIniFile))
+        if len(files) > 1:
+            logger.warning("Multiple modelsim.ini files found in project. Only the first file will be used.")
+        for i, file in enumerate(reversed(files)):
+            if i > 0:
+                logger.warning(f"ignore {file.Path}")
+            else:
+                logger.debug(f"Copy {file.Path} to {self.builddir}")
+                logger.info(f"Use {file.Path}")
+                shutil.copy(file.Path.absolute(), self.builddir.absolute())
+
     def generate(self):
         templatedir = resources_files(self.templates)
         env = Environment(
@@ -362,6 +375,7 @@ class QuestaSimFlow(SimulationFlow):
         for template in templates:
             generate_from_template(template, self.builddir, self.get_globals())
         self.copy_memory_files()
+        self.copy_modelsim_ini()
 
     def get_qrun_version(self) -> float:
         output = sh(['qrun', '-version'], self.builddir)

{simplhdl-0.5.3 → simplhdl-0.5.4}/src/simplhdl/generators/ipxact.py

@@ -10,7 +10,9 @@ from zipfile import ZipFile
 from ..generator import GeneratorFactory, GeneratorBase
 from ..utils import md5write, md5check
 from ..flow import FlowBase, FlowCategory
+from ..pyedaa import SIMULATION
 from ..pyedaa.fileset import FileSet
+from ..pyedaa.attributes import UsedIn
 from ..pyedaa.vhdllibrary import VHDLLibrary
 from ..pyedaa import (
     File, SystemVerilogSourceFile, TCLSourceFile, ConstraintFile, HDLSourceFile,
@@ -198,7 +200,10 @@ class VivadoIP(GeneratorBase):
     def run(self, flow: FlowBase):
         if flow.category == FlowCategory.SIMULATION:
             os.makedirs(self.builddir, exist_ok=True)
-            for ipfile in self.project.DefaultDesign.DefaultFileSet.Files(fileType=VivadoIPSpecificationFile):
+            ipfiles = list(self.project.DefaultDesign.DefaultFileSet.Files(fileType=VivadoIPSpecificationFile))
+            ipfiles = [f for f in ipfiles if SIMULATION in f[UsedIn]]
+
+            for ipfile in ipfiles:
                 newipfile = self.unpack_ip(ipfile)
                 files = self.get_files(newipfile.Path)
                 last_lib = ''

{simplhdl-0.5.3 → simplhdl-0.5.4}/src/simplhdl/generators/spd.py

@@ -23,6 +23,7 @@ from simplhdl.pyedaa import (
     QuartusQSYSCompressedSpecificationFile,
     QuartusQIPSpecificationFile
 )
+from simplhdl.pyedaa import SIMULATION, IMPLEMENTATION
 from simplhdl.pyedaa.fileset import FileSet
 from simplhdl.pyedaa.attributes import UsedIn
 from simplhdl.flow import FlowBase, FlowCategory, FlowTools
@@ -183,34 +184,42 @@ class QuartusIP(GeneratorBase):
             filename._path = dest.with_suffix('.ip').absolute()
         return filename
 
-    def run(self, flow: FlowBase) -> None:
+    def run(self, flow: FlowBase) -> None:  # noqa: C901
         seen = dict()
         self.flow = flow
         ip_dir = self.builddir.joinpath('ips')
         qsys_dir = self.builddir.joinpath('qsys')
-        files = list(self.project.DefaultDesign.DefaultFileSet.Files(fileType=QuartusIPSpecificationFile))
-        # files = filter_duplicated_files(files)
-        if not flow.category == FlowCategory.DEFAULT:
-            for file in files:
-                # The second time we see a file it is already proccessed and we just
-                # Update the file path
-                fileid = str(file.Path.resolve())
-                if fileid in seen:
-                    file._path = seen.get(fileid)._path
-                    continue
-                if file.FileType == QuartusQIPSpecificationFile:
-                    continue
-                elif file.FileType == QuartusIPCompressedSpecificationFile:
-                    file = unpack_ipfile(file, ip_dir)
-                elif file.FileType == QuartusIPSpecificationFile:
-                    file = copy_ipfile(file, ip_dir)
-                elif file.FileType == QuartusQSYSCompressedSpecificationFile:
-                    file = unpack_qsysfile(file, qsys_dir)
-                elif file.FileType == QuartusQSYSSpecificationFile:
-                    file = copy_qsysfile(file, qsys_dir)
-                parse_file(file, flow, self.project.DefaultDesign.DefaultFileSet.VHDLLibrary)
-                # register the file as seen
-                seen[fileid] = file
+        all_files = list(self.project.DefaultDesign.DefaultFileSet.Files(fileType=QuartusIPSpecificationFile))
+
+        if flow.category == FlowCategory.SIMULATION:
+            files = [f for f in all_files if SIMULATION in f[UsedIn]]
+        elif flow.category == FlowCategory.IMPLEMENTATION:
+            files = [f for f in all_files if IMPLEMENTATION in f[UsedIn]]
+        elif flow.category == FlowCategory.DEFAULT:
+            return
+        else:
+            files = all_files
+
+        for file in files:
+            # The second time we see a file it is already proccessed and we just
+            # Update the file path
+            fileid = str(file.Path.resolve())
+            if fileid in seen:
+                file._path = seen.get(fileid)._path
+                continue
+            if file.FileType == QuartusQIPSpecificationFile:
+                continue
+            elif file.FileType == QuartusIPCompressedSpecificationFile:
+                file = unpack_ipfile(file, ip_dir)
+            elif file.FileType == QuartusIPSpecificationFile:
+                file = copy_ipfile(file, ip_dir)
+            elif file.FileType == QuartusQSYSCompressedSpecificationFile:
+                file = unpack_qsysfile(file, qsys_dir)
+            elif file.FileType == QuartusQSYSSpecificationFile:
+                file = copy_qsysfile(file, qsys_dir)
+            parse_file(file, flow, self.project.DefaultDesign.DefaultFileSet.VHDLLibrary)
+            # register the file as seen
+            seen[fileid] = file
 
 
 def parse_qsys(filename: QuartusQSYSSpecificationFile) -> List[File]:

{simplhdl-0.5.3 → simplhdl-0.5.4}/src/simplhdl/pyedaa/__init__.py

@@ -102,7 +102,9 @@ class TCLSourceFile(pm.TCLSourceFile):
 
 
 class IPSpecificationFile(File, pm.XMLContent):
-    pass
+    def _registerAttributes(self):
+        super()._registerAttributes()
+        FileMixIn._registerAttributes(self)
 
 
 class NetlistFile(pm.NetlistFile, FileMixIn):
@@ -204,3 +206,10 @@ class MemoryInitFile(File):
     def _registerAttributes(self):
         super()._registerAttributes()
         FileMixIn._registerAttributes(self)
+
+
+class ModelsimIniFile(File):
+    def _registerAttributes(self):
+        super()._registerAttributes()
+        FileMixIn._registerAttributes(self)
+        self[UsedIn] = {SIMULATION}

simplhdl-0.5.3/src/simplhdl/__init__.py

@@ -1 +0,0 @@
-__version__ = "0.5.3"