SimplHDL 0.5.0__tar.gz → 0.5.2__tar.gz
This diff represents the content of publicly available package versions that have been released to one of the supported registries. The information contained in this diff is provided for informational purposes only and reflects changes between package versions as they appear in their respective public registries.
- {simplhdl-0.5.0 → simplhdl-0.5.2}/PKG-INFO +3 -2
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/SimplHDL.egg-info/PKG-INFO +3 -2
- simplhdl-0.5.2/src/simplhdl/__init__.py +1 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/__main__.py +1 -1
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/quartusexport/quartusexportflow.py +30 -11
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/quartusflow.py +20 -5
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/questasim/questasimflow.py +12 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/generators/spd.py +6 -1
- simplhdl-0.5.0/src/simplhdl/__init__.py +0 -1
- {simplhdl-0.5.0 → simplhdl-0.5.2}/.github/workflows/publish.yml +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/.gitignore +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/.readthedocs.yaml +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/LICENSE +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/README.md +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/docs/_static/simplhdl_dark.png +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/docs/_static/simplhdl_light.png +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/docs/_static/simplhdl_light_1.png +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/docs/conf.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/docs/drawing.svg +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/docs/flows/ghdl.rst +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/docs/flows/icarus.rst +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/docs/flows/quartus.rst +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/docs/flows/questasim.rst +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/docs/flows/vcs.rst +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/docs/flows/vivado.rst +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/docs/flows/xsim.rst +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/docs/flows.rst +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/docs/index.rst +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/docs/intel-ips.md +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/docs/introduction.rst +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/docs/plugins.rst +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/docs/requirements.txt +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/adder/adder.yml +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/adder/hdl/adder.sv +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/adder/sim/testbench.sv +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/adder/sim/testbench.yml +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/adder/syn/build.yml +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/adder/syn/placement.xdc +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/adder/syn/timing.xdc +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/adder/syn/top.sv +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/alu.yml +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/hdl/add.sv +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/hdl/alu.sv +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/hdl/mul.sv +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/hdl/sub.sv +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/pyuvm/alu_vip/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/pyuvm/alu_vip/agent.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/pyuvm/alu_vip/aluif.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/pyuvm/alu_vip/driver.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/pyuvm/alu_vip/monitor.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/pyuvm/alu_vip/sequenceitem.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/pyuvm/alu_vip/sequencer.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/pyuvm/clock_vip/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/pyuvm/clock_vip/agent.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/pyuvm/clock_vip/clockif.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/pyuvm/pyuvm.yml +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/pyuvm/test/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/pyuvm/test/env.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/pyuvm/test/seq_lib.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/pyuvm/test/test.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/pyuvm/testbench.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/uvm/alu_vip/agent.svh +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/uvm/alu_vip/alu_vip.sv +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/uvm/alu_vip/alu_vip.yml +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/uvm/alu_vip/driver.svh +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/uvm/alu_vip/env.svh +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/uvm/alu_vip/monitor.svh +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/uvm/alu_vip/sequence_item.svh +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/uvm/tb_env/seq_lib/add_seq.svh +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/uvm/tb_env/seq_lib/base_seq.svh +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/uvm/tb_env/tb_env.sv +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/uvm/tb_env/tb_env.yml +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/uvm/tb_env/test/base_test.svh +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/uvm/tb_env/test/test_add.svh +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/uvm/testbench/alu_if.sv +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/uvm/testbench/testbench.sv +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/uvm/testbench/testbench.yml +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/sim/uvm/testcases/test_add/test_add.yml +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/syn/build.yml +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/syn/placement.xdc +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/alu/syn/timing.xdc +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/hello/build.sbt +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/hello/hello.yml +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/hello/src/main/scala/Hello.scala +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/hdl/hello/syn/build.yml +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/plugins/simple_parser/setup.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/plugins/simple_parser/src/simple_parser/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/examples/plugins/simple_parser/src/simple_parser/simple_parser.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/pyproject.toml +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/setup.cfg +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/SimplHDL.egg-info/SOURCES.txt +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/SimplHDL.egg-info/dependency_links.txt +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/SimplHDL.egg-info/entry_points.txt +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/SimplHDL.egg-info/requires.txt +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/SimplHDL.egg-info/top_level.txt +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/cocotb.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flow.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/encrypt/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/encrypt/encryptflow.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/flake8/flake8flow.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/implementationflow.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/lint/lintflow.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/modelsim/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/modelsim/modelsimflow.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/quartusdse/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/quartusdse/quartusdseflow.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/quartusexport/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/questasim/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/rivierapro/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/rivierapro/rivieraproflow.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/simulationflow.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/vcs/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/vcs/vcsflow.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/verible/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/verible/veribleflow.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/vivadoflow.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/vsg/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/vsg/vsgflow.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/xsim/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/flows/xsim/xsimflow.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/generator.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/generators/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/generators/chisel.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/generators/ipxact.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/generators/systemrdl.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/info.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/parser.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/parsers/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/parsers/fusesocparser.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/parsers/simplhdlparser.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/plugins.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/pyedaa/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/pyedaa/attributes.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/pyedaa/design.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/pyedaa/fileset.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/pyedaa/filetypes.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/pyedaa/project.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/pyedaa/target.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/pyedaa/vhdllibrary.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/repo.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/flake8/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/flake8/setup.cfg.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/modelsim/Makefile.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/modelsim/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/modelsim/cocotb.mk.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/modelsim/dependencies.mk.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/modelsim/files.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/modelsim/fileset.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/modelsim/modelsim.tcl.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/modelsim/project.mk.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/modelsim/run.do.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/quartus/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/quartus/project.tcl.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/quartus/run.tcl.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/questasim/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/questasim/modelsim.tcl.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/questasim/project.qrun.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/questasim/visualizer.tcl.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/questasim/vsim-run.do.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/rivierapro/Makefile.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/rivierapro/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/rivierapro/cocotb.mk.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/rivierapro/dependencies.mk.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/rivierapro/files.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/rivierapro/fileset.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/rivierapro/project.mk.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/vcs/Makefile.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/vcs/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/vcs/cocotb.mk.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/vcs/dependencies.mk.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/vcs/files.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/vcs/fileset.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/vcs/pli.tab.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/vcs/project.mk.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/vcs/synopsys_sim.setup.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/vcs/vcs.parameters.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/verible/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/verible/rules.cfg.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/vivado/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/vivado/launch_run.sh.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/vivado/project.tcl.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/vivado/run.tcl.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/vivado/steps.tcl.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/vsg/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/vsg/files.json.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/vsg/rules.yml.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/xsim/Makefile.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/xsim/__init__.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/xsim/cocotb.mk.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/xsim/dependencies.mk.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/xsim/files.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/xsim/fileset.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/xsim/project.mk.j2 +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/run.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/simplhdl.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/tools.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/utils.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/tests/test_dummy.py +0 -0
- {simplhdl-0.5.0 → simplhdl-0.5.2}/tox.ini +0 -0
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Metadata-Version: 2.
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Metadata-Version: 2.4
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Name: SimplHDL
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Version: 0.5.
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Version: 0.5.2
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Summary: A framework for simulating and implementing HDL designs
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Author-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>
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Maintainer-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>
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Dynamic: license-file
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## Introduction
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Name: SimplHDL
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Version: 0.5.
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Version: 0.5.2
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Summary: A framework for simulating and implementing HDL designs
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Author-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>
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Maintainer-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>
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Dynamic: license-file
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## Introduction
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__version__ = "0.5.2"
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try:
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load_plugins()
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args = parse_arguments()
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levels = [logging.
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levels = [logging.INFO, logging.DEBUG, logging.NOTSET]
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level = levels[min(args.verbose, len(levels)-1)]
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logging.basicConfig(level=level)
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simpl = Simplhdl(args)
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import shutil
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import logging
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import zipfile
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import os
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from argparse import Namespace
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from pathlib import Path
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@@ -56,38 +57,45 @@ class QuartusExportFlow(ImplementationFlow):
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self.vendors = ['mentor', 'synopsys']
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self.templates = templates
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self.tools.add(FlowTools.QUARTUS)
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self.rootdir = self.directory_root()
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def directory_root(self):
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files = list()
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for file in [f for f in self.project.DefaultDesign.Files() if 'implementation' in f[UsedIn]]:
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if isinstance(file, SettingFile):
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continue
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elif isinstance(file, (ConstraintFile, QuartusQIPSpecificationFile)):
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pass
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elif isinstance(file, (HDLSearchPath, QuartusIPSpecificationFile)):
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continue
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files.append(file.Path.absolute())
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return Path(os.path.commonpath(files))
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def copy_files(self):
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seen = dict()
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files = [f for f in self.project.DefaultDesign.Files() if 'implementation' in f[UsedIn]]
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for file in files:
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fileid = str(file.Path.resolve())
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+
dest = self.builddir.joinpath('src', file.Path.relative_to(self.rootdir))
|
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80
|
if fileid in seen:
|
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81
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file._path = seen.get(fileid)._path
|
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continue
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83
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elif isinstance(file, SettingFile):
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continue
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elif isinstance(file, (ConstraintFile, QuartusQIPSpecificationFile)):
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-
dest = self.builddir.joinpath('constraints', file.Path.name)
|
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86
|
dest.parent.mkdir(parents=True, exist_ok=True)
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shutil.copyfile(file.Path, dest)
|
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88
|
elif isinstance(file, (HDLSearchPath, QuartusIPSpecificationFile)):
|
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89
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dest = file.Path
|
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|
elif isinstance(file, (HDLSourceFile, HDLIncludeFile)):
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|
-
if isinstance(file, HDLSourceFile):
|
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|
-
dest = self.builddir.joinpath('rtl', file.Path.name)
|
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-
else:
|
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|
-
dest = self.builddir.joinpath('rtl', 'include', file.Path.name)
|
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91
|
dest.parent.mkdir(parents=True, exist_ok=True)
|
|
82
92
|
if self.args.encrypt:
|
|
83
93
|
encrypt(file.Path, dest, language=get_language(file), vendors=self.vendors)
|
|
84
94
|
else:
|
|
85
95
|
shutil.copyfile(file.Path, dest)
|
|
86
96
|
else:
|
|
87
|
-
dest = self.builddir.joinpath('misc', file.Path.name)
|
|
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97
|
dest.parent.mkdir(parents=True, exist_ok=True)
|
|
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98
|
shutil.copyfile(file.Path, dest)
|
|
90
|
-
file._path = dest.absolute().relative_to(self.builddir.absolute())
|
|
91
99
|
# Convert to relative path
|
|
92
100
|
file._path = dest.absolute().relative_to(self.builddir.absolute())
|
|
93
101
|
seen[fileid] = file
|
|
@@ -96,14 +104,25 @@ class QuartusExportFlow(ImplementationFlow):
|
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|
96
104
|
args = Namespace(step='project', archive=False, gui=False)
|
|
97
105
|
quartus = QuartusFlow('quartus', args, self.project, self.builddir)
|
|
98
106
|
quartus.run()
|
|
107
|
+
try:
|
|
108
|
+
shutil.rmtree(self.builddir.joinpath('dni'))
|
|
109
|
+
shutil.rmtree(self.builddir.joinpath('qdb'))
|
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|
+
os.remove(self.builddir.joinpath('project.tcl'))
|
|
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|
+
except FileNotFoundError as e:
|
|
112
|
+
pass
|
|
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113
|
|
|
100
114
|
def archive_project(self) -> None:
|
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115
|
+
tmp = output = self.builddir.parent.joinpath(self.project.Name).with_suffix('.zip')
|
|
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|
if self.args.archivefile:
|
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|
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|
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tmp = output = self.builddir.parent.joinpath(self.args.archivefile.stem).with_suffix('.zip')
|
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output = self.args.archivefile
|
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else:
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output = self.builddir.
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tmp = output = self.builddir.parent.joinpath(self.project.Name).with_suffix('.zip')
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output = self.builddir.joinpath(tmp.name)
|
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|
+
archive(self.builddir, tmp)
|
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if output.exists():
|
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os.remove(output)
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shutil.move(tmp, output)
|
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|
def run(self) -> None:
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|
self.copy_files()
|
|
@@ -14,11 +14,25 @@ from ..flow import FlowFactory, FlowTools
|
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14
14
|
from .implementationflow import ImplementationFlow
|
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15
15
|
from ..resources.templates import quartus as templates
|
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from ..utils import sh, generate_from_template
|
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from ..pyedaa import (
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from ..pyedaa import (
|
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VerilogIncludeFile,
|
|
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|
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VerilogSourceFile,
|
|
20
|
+
SystemVerilogSourceFile,
|
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|
+
VHDLSourceFile,
|
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22
|
+
ConstraintFile,
|
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|
+
EDIFNetlistFile,
|
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|
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NetlistFile,
|
|
25
|
+
SettingFile,
|
|
26
|
+
HDLSearchPath,
|
|
27
|
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VerilogIncludeSearchPath,
|
|
28
|
+
MemoryInitFile,
|
|
29
|
+
QuartusSignalTapFile,
|
|
30
|
+
QuartusIniFile,
|
|
31
|
+
QuartusQIPSpecificationFile,
|
|
32
|
+
QuartusQSYSSpecificationFile,
|
|
33
|
+
QuartusIPSpecificationFile,
|
|
34
|
+
QuartusSourceTCLFile
|
|
35
|
+
)
|
|
22
36
|
from ..pyedaa.project import Project
|
|
23
37
|
from ..pyedaa.attributes import UsedIn
|
|
24
38
|
|
|
@@ -112,6 +126,7 @@ class QuartusFlow(ImplementationFlow):
|
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|
112
126
|
QuartusSignalTapFile=QuartusSignalTapFile,
|
|
113
127
|
QuartusQIPSpecificationFile=QuartusQIPSpecificationFile,
|
|
114
128
|
QuartusQSYSSpecificationFile=QuartusQSYSSpecificationFile,
|
|
129
|
+
QuartusSourceTCLFile=QuartusSourceTCLFile,
|
|
115
130
|
QuartusIniFile=QuartusIniFile,
|
|
116
131
|
MemoryInitFile=MemoryInitFile,
|
|
117
132
|
project=self.project,
|
|
@@ -16,6 +16,7 @@ from jinja2 import Template
|
|
|
16
16
|
from simplhdl.pyedaa.project import Project
|
|
17
17
|
from simplhdl.utils import sh, escape
|
|
18
18
|
from simplhdl.flow import FlowFactory, FlowTools
|
|
19
|
+
from simplhdl.info import Info
|
|
19
20
|
from simplhdl.resources.templates import questasim as questasimtemplates
|
|
20
21
|
from simplhdl.flows.simulationflow import SimulationFlow, FileSetWalker
|
|
21
22
|
from simplhdl.utils import generate_from_template
|
|
@@ -45,6 +46,11 @@ class QuestaSimFlow(SimulationFlow):
|
|
|
45
46
|
default='',
|
|
46
47
|
help="flow step to run"
|
|
47
48
|
)
|
|
49
|
+
parser.add_argument(
|
|
50
|
+
'--info',
|
|
51
|
+
action='store_true',
|
|
52
|
+
help="Print project"
|
|
53
|
+
)
|
|
48
54
|
parser.add_argument(
|
|
49
55
|
'-w',
|
|
50
56
|
'--wavedump',
|
|
@@ -225,6 +231,12 @@ class QuestaSimFlow(SimulationFlow):
|
|
|
225
231
|
sh(['qrun', '-clean'], cwd=self.builddir, output=True)
|
|
226
232
|
return
|
|
227
233
|
|
|
234
|
+
if self.args.info:
|
|
235
|
+
args = Namespace(files=False, filesets=False, libraries=False, hooks=False)
|
|
236
|
+
info = Info(self.name, args, self.project, self.builddir)
|
|
237
|
+
info.run()
|
|
238
|
+
return
|
|
239
|
+
|
|
228
240
|
self.run_hooks('pre')
|
|
229
241
|
|
|
230
242
|
if step == 'generate':
|
|
@@ -258,7 +258,12 @@ def parse_file(file: File, flow: FlowBase, library) -> FileSet:
|
|
|
258
258
|
return qsys_to_fileset(file, flow, library)
|
|
259
259
|
elif file.FileType == QuartusIPSpecificationFile:
|
|
260
260
|
if flow.category == FlowCategory.SIMULATION:
|
|
261
|
-
|
|
261
|
+
spd = Spd(file.Path, flow)
|
|
262
|
+
parent = file.FileSet
|
|
263
|
+
for fileset in reversed(spd.filesets):
|
|
264
|
+
# Add fileset to parent, then set parent to fileset to make a chain
|
|
265
|
+
parent._fileSets[fileset.Name] = fileset
|
|
266
|
+
parent = fileset
|
|
262
267
|
else:
|
|
263
268
|
return file
|
|
264
269
|
else:
|
|
@@ -1 +0,0 @@
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{simplhdl-0.5.0 → simplhdl-0.5.2}/examples/plugins/simple_parser/src/simple_parser/__init__.py
RENAMED
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{simplhdl-0.5.0 → simplhdl-0.5.2}/examples/plugins/simple_parser/src/simple_parser/simple_parser.py
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{simplhdl-0.5.0 → simplhdl-0.5.2}/src/simplhdl/resources/templates/questasim/visualizer.tcl.j2
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