SimplHDL 0.0.6__tar.gz → 0.0.7__tar.gz

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Files changed (189) hide show
  1. {simplhdl-0.0.6 → simplhdl-0.0.7}/PKG-INFO +3 -1
  2. {simplhdl-0.0.6 → simplhdl-0.0.7}/pyproject.toml +2 -0
  3. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/SimplHDL.egg-info/PKG-INFO +3 -1
  4. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/SimplHDL.egg-info/SOURCES.txt +4 -0
  5. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/SimplHDL.egg-info/requires.txt +2 -0
  6. simplhdl-0.0.7/src/simplhdl/__init__.py +1 -0
  7. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/cocotb.py +0 -1
  8. simplhdl-0.0.7/src/simplhdl/flows/flake8/flake8flow.py +83 -0
  9. simplhdl-0.0.7/src/simplhdl/flows/lint/lintflow.py +72 -0
  10. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/simulationflow.py +20 -3
  11. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/verible/veribleflow.py +24 -23
  12. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/vsg/vsgflow.py +29 -14
  13. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/parser.py +17 -1
  14. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/plugins.py +2 -0
  15. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/pyedaa/__init__.py +5 -1
  16. simplhdl-0.0.7/src/simplhdl/resources/templates/flake8/setup.cfg.j2 +10 -0
  17. {simplhdl-0.0.6/src/simplhdl/resources/templates/rivierapro → simplhdl-0.0.7/src/simplhdl/resources/templates/questasim}/files.j2 +1 -0
  18. {simplhdl-0.0.6/src/simplhdl/resources/templates/vcs → simplhdl-0.0.7/src/simplhdl/resources/templates/rivierapro}/files.j2 +1 -0
  19. {simplhdl-0.0.6/src/simplhdl/resources/templates/xsim → simplhdl-0.0.7/src/simplhdl/resources/templates/vcs}/files.j2 +1 -0
  20. simplhdl-0.0.7/src/simplhdl/resources/templates/verible/rules.cfg.j2 +58 -0
  21. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/utils.py +3 -2
  22. {simplhdl-0.0.6 → simplhdl-0.0.7}/tox.ini +1 -0
  23. simplhdl-0.0.6/src/simplhdl/__init__.py +0 -1
  24. {simplhdl-0.0.6 → simplhdl-0.0.7}/.github/workflows/publish.yml +0 -0
  25. {simplhdl-0.0.6 → simplhdl-0.0.7}/.gitignore +0 -0
  26. {simplhdl-0.0.6 → simplhdl-0.0.7}/.readthedocs.yaml +0 -0
  27. {simplhdl-0.0.6 → simplhdl-0.0.7}/LICENSE +0 -0
  28. {simplhdl-0.0.6 → simplhdl-0.0.7}/README.md +0 -0
  29. {simplhdl-0.0.6 → simplhdl-0.0.7}/docs/_static/simplhdl_dark.png +0 -0
  30. {simplhdl-0.0.6 → simplhdl-0.0.7}/docs/_static/simplhdl_light.png +0 -0
  31. {simplhdl-0.0.6 → simplhdl-0.0.7}/docs/_static/simplhdl_light_1.png +0 -0
  32. {simplhdl-0.0.6 → simplhdl-0.0.7}/docs/conf.py +0 -0
  33. {simplhdl-0.0.6 → simplhdl-0.0.7}/docs/drawing.svg +0 -0
  34. {simplhdl-0.0.6 → simplhdl-0.0.7}/docs/flows/ghdl.rst +0 -0
  35. {simplhdl-0.0.6 → simplhdl-0.0.7}/docs/flows/icarus.rst +0 -0
  36. {simplhdl-0.0.6 → simplhdl-0.0.7}/docs/flows/quartus.rst +0 -0
  37. {simplhdl-0.0.6 → simplhdl-0.0.7}/docs/flows/questasim.rst +0 -0
  38. {simplhdl-0.0.6 → simplhdl-0.0.7}/docs/flows/vcs.rst +0 -0
  39. {simplhdl-0.0.6 → simplhdl-0.0.7}/docs/flows/vivado.rst +0 -0
  40. {simplhdl-0.0.6 → simplhdl-0.0.7}/docs/flows/xsim.rst +0 -0
  41. {simplhdl-0.0.6 → simplhdl-0.0.7}/docs/flows.rst +0 -0
  42. {simplhdl-0.0.6 → simplhdl-0.0.7}/docs/index.rst +0 -0
  43. {simplhdl-0.0.6 → simplhdl-0.0.7}/docs/intel-ips.md +0 -0
  44. {simplhdl-0.0.6 → simplhdl-0.0.7}/docs/introduction.rst +0 -0
  45. {simplhdl-0.0.6 → simplhdl-0.0.7}/docs/plugins.rst +0 -0
  46. {simplhdl-0.0.6 → simplhdl-0.0.7}/docs/requirements.txt +0 -0
  47. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/adder/adder.yml +0 -0
  48. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/adder/hdl/adder.sv +0 -0
  49. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/adder/sim/testbench.sv +0 -0
  50. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/adder/sim/testbench.yml +0 -0
  51. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/adder/syn/build.yml +0 -0
  52. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/adder/syn/placement.xdc +0 -0
  53. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/adder/syn/timing.xdc +0 -0
  54. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/adder/syn/top.sv +0 -0
  55. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/alu.yml +0 -0
  56. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/hdl/add.sv +0 -0
  57. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/hdl/alu.sv +0 -0
  58. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/hdl/mul.sv +0 -0
  59. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/hdl/sub.sv +0 -0
  60. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/pyuvm/alu_vip/__init__.py +0 -0
  61. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/pyuvm/alu_vip/agent.py +0 -0
  62. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/pyuvm/alu_vip/aluif.py +0 -0
  63. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/pyuvm/alu_vip/driver.py +0 -0
  64. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/pyuvm/alu_vip/monitor.py +0 -0
  65. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/pyuvm/alu_vip/sequenceitem.py +0 -0
  66. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/pyuvm/alu_vip/sequencer.py +0 -0
  67. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/pyuvm/clock_vip/__init__.py +0 -0
  68. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/pyuvm/clock_vip/agent.py +0 -0
  69. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/pyuvm/clock_vip/clockif.py +0 -0
  70. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/pyuvm/pyuvm.yml +0 -0
  71. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/pyuvm/test/__init__.py +0 -0
  72. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/pyuvm/test/env.py +0 -0
  73. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/pyuvm/test/seq_lib.py +0 -0
  74. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/pyuvm/test/test.py +0 -0
  75. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/pyuvm/testbench.py +0 -0
  76. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/uvm/alu_vip/agent.svh +0 -0
  77. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/uvm/alu_vip/alu_vip.sv +0 -0
  78. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/uvm/alu_vip/alu_vip.yml +0 -0
  79. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/uvm/alu_vip/driver.svh +0 -0
  80. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/uvm/alu_vip/env.svh +0 -0
  81. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/uvm/alu_vip/monitor.svh +0 -0
  82. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/uvm/alu_vip/sequence_item.svh +0 -0
  83. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/uvm/tb_env/seq_lib/add_seq.svh +0 -0
  84. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/uvm/tb_env/seq_lib/base_seq.svh +0 -0
  85. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/uvm/tb_env/tb_env.sv +0 -0
  86. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/uvm/tb_env/tb_env.yml +0 -0
  87. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/uvm/tb_env/test/base_test.svh +0 -0
  88. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/uvm/tb_env/test/test_add.svh +0 -0
  89. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/uvm/testbench/alu_if.sv +0 -0
  90. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/uvm/testbench/testbench.sv +0 -0
  91. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/uvm/testbench/testbench.yml +0 -0
  92. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/sim/uvm/testcases/test_add/test_add.yml +0 -0
  93. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/syn/build.yml +0 -0
  94. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/syn/placement.xdc +0 -0
  95. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/alu/syn/timing.xdc +0 -0
  96. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/hello/build.sbt +0 -0
  97. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/hello/hello.yml +0 -0
  98. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/hello/src/main/scala/Hello.scala +0 -0
  99. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/hdl/hello/syn/build.yml +0 -0
  100. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/plugins/simple_parser/setup.py +0 -0
  101. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/plugins/simple_parser/src/simple_parser/__init__.py +0 -0
  102. {simplhdl-0.0.6 → simplhdl-0.0.7}/examples/plugins/simple_parser/src/simple_parser/simple_parser.py +0 -0
  103. {simplhdl-0.0.6 → simplhdl-0.0.7}/setup.cfg +0 -0
  104. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/SimplHDL.egg-info/dependency_links.txt +0 -0
  105. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/SimplHDL.egg-info/entry_points.txt +0 -0
  106. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/SimplHDL.egg-info/top_level.txt +0 -0
  107. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/__main__.py +0 -0
  108. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flow.py +0 -0
  109. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/__init__.py +0 -0
  110. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/implementationflow.py +0 -0
  111. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/modelsimflow.py +0 -0
  112. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/quartusdse/__init__.py +0 -0
  113. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/quartusdse/quartusdseflow.py +0 -0
  114. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/quartusflow.py +0 -0
  115. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/questasim/__init__.py +0 -0
  116. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/questasim/questasimflow.py +0 -0
  117. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/rivierapro/__init__.py +0 -0
  118. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/rivierapro/rivieraproflow.py +0 -0
  119. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/vcs/__init__.py +0 -0
  120. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/vcs/vcsflow.py +0 -0
  121. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/verible/__init__.py +0 -0
  122. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/vivadoflow.py +0 -0
  123. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/vsg/__init__.py +0 -0
  124. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/xsim/__init__.py +0 -0
  125. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/flows/xsim/xsimflow.py +0 -0
  126. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/generator.py +0 -0
  127. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/generators/__init__.py +0 -0
  128. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/generators/chisel.py +0 -0
  129. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/generators/ipxact.py +0 -0
  130. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/generators/spd.py +0 -0
  131. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/generators/systemrdl.py +0 -0
  132. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/info.py +0 -0
  133. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/parsers/__init__.py +0 -0
  134. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/parsers/fusesocparser.py +0 -0
  135. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/parsers/simplhdlparser.py +0 -0
  136. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/pyedaa/attributes.py +0 -0
  137. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/pyedaa/design.py +0 -0
  138. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/pyedaa/fileset.py +0 -0
  139. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/pyedaa/filetypes.py +0 -0
  140. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/pyedaa/project.py +0 -0
  141. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/pyedaa/vhdllibrary.py +0 -0
  142. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/repo.py +0 -0
  143. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/__init__.py +0 -0
  144. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/__init__.py +0 -0
  145. {simplhdl-0.0.6/src/simplhdl/resources/templates/quartus → simplhdl-0.0.7/src/simplhdl/resources/templates/flake8}/__init__.py +0 -0
  146. {simplhdl-0.0.6/src/simplhdl/resources/templates/questasim → simplhdl-0.0.7/src/simplhdl/resources/templates/quartus}/__init__.py +0 -0
  147. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/quartus/project.tcl.j2 +0 -0
  148. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/quartus/run.tcl.j2 +0 -0
  149. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/questasim/Makefile.j2 +0 -0
  150. {simplhdl-0.0.6/src/simplhdl/resources/templates/rivierapro → simplhdl-0.0.7/src/simplhdl/resources/templates/questasim}/__init__.py +0 -0
  151. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/questasim/cocotb.mk.j2 +0 -0
  152. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/questasim/dependencies.mk.j2 +0 -0
  153. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/questasim/fileset.j2 +0 -0
  154. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/questasim/gui.do.j2 +0 -0
  155. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/questasim/project.mk.j2 +0 -0
  156. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/rivierapro/Makefile.j2 +0 -0
  157. {simplhdl-0.0.6/src/simplhdl/resources/templates/vcs → simplhdl-0.0.7/src/simplhdl/resources/templates/rivierapro}/__init__.py +0 -0
  158. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/rivierapro/cocotb.mk.j2 +0 -0
  159. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/rivierapro/dependencies.mk.j2 +0 -0
  160. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/rivierapro/fileset.j2 +0 -0
  161. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/rivierapro/project.mk.j2 +0 -0
  162. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/vcs/Makefile.j2 +0 -0
  163. {simplhdl-0.0.6/src/simplhdl/resources/templates/verible → simplhdl-0.0.7/src/simplhdl/resources/templates/vcs}/__init__.py +0 -0
  164. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/vcs/cocotb.mk.j2 +0 -0
  165. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/vcs/dependencies.mk.j2 +0 -0
  166. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/vcs/fileset.j2 +0 -0
  167. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/vcs/pli.tab.j2 +0 -0
  168. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/vcs/project.mk.j2 +0 -0
  169. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/vcs/synopsys_sim.setup.j2 +0 -0
  170. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/vcs/vcs.parameters.j2 +0 -0
  171. {simplhdl-0.0.6/src/simplhdl/resources/templates/vivado → simplhdl-0.0.7/src/simplhdl/resources/templates/verible}/__init__.py +0 -0
  172. {simplhdl-0.0.6/src/simplhdl/resources/templates/vsg → simplhdl-0.0.7/src/simplhdl/resources/templates/vivado}/__init__.py +0 -0
  173. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/vivado/launch_run.sh.j2 +0 -0
  174. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/vivado/project.tcl.j2 +0 -0
  175. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/vivado/run.tcl.j2 +0 -0
  176. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/vivado/steps.tcl.j2 +0 -0
  177. {simplhdl-0.0.6/src/simplhdl/resources/templates/xsim → simplhdl-0.0.7/src/simplhdl/resources/templates/vsg}/__init__.py +0 -0
  178. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/vsg/files.json.j2 +0 -0
  179. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/vsg/rules.yml.j2 +0 -0
  180. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/xsim/Makefile.j2 +0 -0
  181. /simplhdl-0.0.6/src/simplhdl/resources/templates/verible/rules.cfg.j2 → /simplhdl-0.0.7/src/simplhdl/resources/templates/xsim/__init__.py +0 -0
  182. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/xsim/cocotb.mk.j2 +0 -0
  183. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/xsim/dependencies.mk.j2 +0 -0
  184. {simplhdl-0.0.6/src/simplhdl/resources/templates/questasim → simplhdl-0.0.7/src/simplhdl/resources/templates/xsim}/files.j2 +0 -0
  185. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/xsim/fileset.j2 +0 -0
  186. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/resources/templates/xsim/project.mk.j2 +0 -0
  187. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/simplhdl.py +0 -0
  188. {simplhdl-0.0.6 → simplhdl-0.0.7}/src/simplhdl/tools.py +0 -0
  189. {simplhdl-0.0.6 → simplhdl-0.0.7}/tests/test_dummy.py +0 -0
@@ -1,6 +1,6 @@
1
1
  Metadata-Version: 2.1
2
2
  Name: SimplHDL
3
- Version: 0.0.6
3
+ Version: 0.0.7
4
4
  Summary: A framework for simulating and implementing HDL designs
5
5
  Author-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>
6
6
  Maintainer-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>
@@ -53,6 +53,8 @@ Requires-Dist: jinja2
53
53
  Requires-Dist: GitPython
54
54
  Requires-Dist: rich
55
55
  Requires-Dist: vsg
56
+ Requires-Dist: flake8
57
+ Requires-Dist: black
56
58
 
57
59
  ## Introduction
58
60
 
@@ -22,6 +22,8 @@ dependencies = [
22
22
  "GitPython",
23
23
  "rich",
24
24
  "vsg",
25
+ "flake8",
26
+ "black",
25
27
  ]
26
28
  requires-python = ">=3.8"
27
29
  authors = [
@@ -1,6 +1,6 @@
1
1
  Metadata-Version: 2.1
2
2
  Name: SimplHDL
3
- Version: 0.0.6
3
+ Version: 0.0.7
4
4
  Summary: A framework for simulating and implementing HDL designs
5
5
  Author-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>
6
6
  Maintainer-email: Rasmus Grøndahl Olsen <simplhdl@gmail.com>
@@ -53,6 +53,8 @@ Requires-Dist: jinja2
53
53
  Requires-Dist: GitPython
54
54
  Requires-Dist: rich
55
55
  Requires-Dist: vsg
56
+ Requires-Dist: flake8
57
+ Requires-Dist: black
56
58
 
57
59
  ## Introduction
58
60
 
@@ -103,6 +103,8 @@ src/simplhdl/flows/modelsimflow.py
103
103
  src/simplhdl/flows/quartusflow.py
104
104
  src/simplhdl/flows/simulationflow.py
105
105
  src/simplhdl/flows/vivadoflow.py
106
+ src/simplhdl/flows/flake8/flake8flow.py
107
+ src/simplhdl/flows/lint/lintflow.py
106
108
  src/simplhdl/flows/quartusdse/__init__.py
107
109
  src/simplhdl/flows/quartusdse/quartusdseflow.py
108
110
  src/simplhdl/flows/questasim/__init__.py
@@ -134,6 +136,8 @@ src/simplhdl/pyedaa/project.py
134
136
  src/simplhdl/pyedaa/vhdllibrary.py
135
137
  src/simplhdl/resources/__init__.py
136
138
  src/simplhdl/resources/templates/__init__.py
139
+ src/simplhdl/resources/templates/flake8/__init__.py
140
+ src/simplhdl/resources/templates/flake8/setup.cfg.j2
137
141
  src/simplhdl/resources/templates/quartus/__init__.py
138
142
  src/simplhdl/resources/templates/quartus/project.tcl.j2
139
143
  src/simplhdl/resources/templates/quartus/run.tcl.j2
@@ -7,6 +7,8 @@ jinja2
7
7
  GitPython
8
8
  rich
9
9
  vsg
10
+ flake8
11
+ black
10
12
 
11
13
  [:python_version < "3.9"]
12
14
  importlib-resources
@@ -0,0 +1 @@
1
+ __version__ = "0.0.7"
@@ -85,7 +85,6 @@ class Cocotb:
85
85
  lines = f.readlines()
86
86
  for line in lines:
87
87
  if re.search(rf'^\s*module\s+{name}(\s+|\(|;|$)', line):
88
- print(file.Path)
89
88
  if file.Library.Name == lib:
90
89
  logger.info(f"Cocotb dut '{self.dut}' is Verilog")
91
90
  return VerilogSourceFile
@@ -0,0 +1,83 @@
1
+ try:
2
+ from importlib.resources import files as resources_files
3
+ except ImportError:
4
+ from importlib_resources import files as resources_files
5
+ import os
6
+ import shutil
7
+ import logging
8
+ from argparse import Namespace
9
+ from pathlib import Path
10
+ from jinja2 import Environment, FileSystemLoader
11
+
12
+ from simplhdl.resources.templates import flake8 as templates
13
+ from simplhdl.utils import sh, CalledShError, generate_from_template
14
+ from simplhdl.flow import FlowFactory, FlowBase
15
+ from simplhdl.pyedaa.project import Project
16
+ from simplhdl.pyedaa import PythonSourceFile
17
+
18
+ logger = logging.getLogger(__name__)
19
+
20
+
21
+ @FlowFactory.register('flake8')
22
+ class Flake8Flow(FlowBase):
23
+
24
+ @classmethod
25
+ def parse_args(self, subparsers) -> None:
26
+ parser = subparsers.add_parser('flake8', help='Lint Flow for Python code')
27
+ parser.add_argument(
28
+ '--fix',
29
+ action='store_true',
30
+ help="Fix style formatting (Note: this modifies the source)"
31
+ )
32
+ parser.add_argument(
33
+ '-f', '--files',
34
+ type=lambda p: Path(p).absolute(),
35
+ nargs='+',
36
+ default=[],
37
+ help="Manually specify file list"
38
+ )
39
+
40
+ def __init__(self, name, args: Namespace, project: Project, builddir: Path):
41
+ super().__init__(name, args, project, builddir)
42
+ self.templates = templates
43
+
44
+ def setup(self):
45
+ os.makedirs(self.builddir, exist_ok=True)
46
+ if self.args.files:
47
+ self.files = [Path(f) for f in self.args.files if Path(f).suffix == '.py']
48
+ else:
49
+ self.files = [f.Path for f in self.project.DefaultDesign.DefaultFileSet.Files(PythonSourceFile)]
50
+
51
+ def generate(self):
52
+ config = os.getenv('SIMPLHDL_FLAKE8_RULES')
53
+ if config:
54
+ shutil.copy(config, self.builddir.joinpath('setup.cfg'))
55
+ else:
56
+ templatedir = resources_files(self.templates)
57
+ environment = Environment(
58
+ loader=FileSystemLoader(templatedir),
59
+ trim_blocks=True)
60
+ template = environment.get_template('setup.cfg.j2')
61
+ generate_from_template(template, self.builddir)
62
+
63
+ def execute(self):
64
+ if self.args.fix:
65
+ for file in self.files:
66
+ sh(['black', str(file.absolute())])
67
+ else:
68
+ command = ['flake8'] + [str(f.absolute()) for f in self.files]
69
+ try:
70
+ sh(command, cwd=self.builddir, output=True)
71
+ except CalledShError as e:
72
+ print(e)
73
+ raise SystemError
74
+
75
+ # flake = flake8.get_style_guide()
76
+ # report = flake.check_files(self.files)
77
+ # if report.get_statistics('E'):
78
+ # raise SystemError
79
+
80
+ def run(self) -> None:
81
+ self.setup()
82
+ self.generate()
83
+ self.execute()
@@ -0,0 +1,72 @@
1
+ import os
2
+ import logging
3
+ from argparse import Namespace
4
+ from pathlib import Path
5
+
6
+ from simplhdl.flow import FlowFactory, FlowBase
7
+ from simplhdl.pyedaa.project import Project
8
+ from simplhdl.flows.verible.veribleflow import VeribleFlow
9
+ from simplhdl.flows.vsg.vsgflow import VsgFlow
10
+ from simplhdl.flows.flake8.flake8flow import Flake8Flow
11
+
12
+ logger = logging.getLogger(__name__)
13
+
14
+
15
+ @FlowFactory.register('lint')
16
+ class LintFlow(FlowBase):
17
+
18
+ @classmethod
19
+ def parse_args(self, subparsers) -> None:
20
+ parser = subparsers.add_parser('lint', help='Lint Flow for Design and Verification code')
21
+ parser.add_argument(
22
+ '--fix',
23
+ action='store_true',
24
+ help="Fix style formatting (Note: this modifies the source)"
25
+ )
26
+ parser.add_argument(
27
+ '-f', '--files',
28
+ type=lambda p: Path(p).absolute(),
29
+ nargs='+',
30
+ default=[],
31
+ help="Manually specify file list"
32
+ )
33
+
34
+ def __init__(self, name, args: Namespace, project: Project, builddir: Path):
35
+ super().__init__(name, args, project, builddir)
36
+
37
+ def setup(self):
38
+ os.makedirs(self.builddir, exist_ok=True)
39
+
40
+ def generate(self):
41
+ pass
42
+
43
+ def execute(self):
44
+ verible_args = Namespace(rules=None, files=self.args.files, fix=self.args.fix)
45
+ verible = VeribleFlow('verible', verible_args, self.project, self.builddir)
46
+ vsg_args = Namespace(rules=None, files=self.args.files, fix=self.args.fix, output_format='syntastic')
47
+ vsg = VsgFlow('vsg', vsg_args, self.project, self.builddir)
48
+ flake_args = Namespace(files=self.args.files, fix=self.args.fix)
49
+ flake = Flake8Flow('flake8', flake_args, self.project, self.builddir)
50
+ system_error = False
51
+ try:
52
+ verible.run()
53
+ except SystemError:
54
+ system_error = True
55
+
56
+ try:
57
+ vsg.run()
58
+ except SystemError:
59
+ system_error = True
60
+
61
+ try:
62
+ flake.run()
63
+ except SystemError:
64
+ system_error = True
65
+
66
+ if system_error:
67
+ raise SystemError
68
+
69
+ def run(self) -> None:
70
+ self.setup()
71
+ self.generate()
72
+ self.execute()
@@ -17,7 +17,7 @@ from simplhdl.cocotb import Cocotb
17
17
  from simplhdl.pyedaa.fileset import FileSet
18
18
  from simplhdl.pyedaa import (File, VerilogSourceFile, VerilogIncludeFile,
19
19
  SystemVerilogSourceFile, VHDLSourceFile)
20
- from simplhdl.utils import generate_from_template, md5sum, append_suffix
20
+ from simplhdl.utils import generate_from_template, md5sum, md5check, md5write, append_suffix
21
21
 
22
22
  logger = logging.getLogger(__name__)
23
23
 
@@ -28,10 +28,11 @@ class SimulationFlow(FlowBase):
28
28
  super().__init__(name, args, project, builddir)
29
29
  self.category = FlowCategory.SIMULATION
30
30
  self.hdl_language = None
31
- self.cocotb = Cocotb(project)
32
31
  self.templates = None
32
+ self.hashfile = self.builddir.joinpath('filesets.hash')
33
33
 
34
34
  def run(self) -> None:
35
+ self.cocotb = Cocotb(self.project)
35
36
  self.validate()
36
37
  self.configure()
37
38
  self.generate()
@@ -74,6 +75,7 @@ class SimulationFlow(FlowBase):
74
75
  for template in self.get_project_templates(env) + self.get_cocotb_templates(env):
75
76
  generate_from_template(template, self.builddir, self.get_globals())
76
77
  self.generate_make_rules(env)
78
+ self.is_filesets_changed()
77
79
 
78
80
  def generate_make_rules(self, environment):
79
81
  walker = FileSetWalker()
@@ -126,7 +128,8 @@ class SimulationFlow(FlowBase):
126
128
  template,
127
129
  base.with_suffix('.files'),
128
130
  target=base.with_suffix('.fileset').name,
129
- files=[f.Path.absolute() for f in files])
131
+ files=[f.Path.absolute() for f in files],
132
+ hashfile=self.hashfile.name)
130
133
  template = environment.get_template('fileset.j2')
131
134
  output = base.with_suffix('.fileset')
132
135
  includes = {f.Path.parent.absolute() for f in files if isinstance(f, VerilogIncludeFile)}
@@ -159,6 +162,20 @@ class SimulationFlow(FlowBase):
159
162
  libraries.update(self.project.DefaultDesign.ExternalVHDLLibraries)
160
163
  return libraries
161
164
 
165
+ def is_filesets_changed(self) -> bool:
166
+ """
167
+ Check if there are any changes in filesets since last run.
168
+ """
169
+ filesets = []
170
+ walker = FileSetWalker()
171
+ for fileset in walker.walk(self.project.DefaultDesign.DefaultFileSet):
172
+ filesets += [Path(f.Name) for f in FileSetWalker().walk(fileset) if Path(f.Name).is_file()]
173
+ if self.hashfile.is_file() and md5check(*filesets, filename=self.hashfile):
174
+ return True
175
+ else:
176
+ md5write(*filesets, filename=self.hashfile)
177
+ return False
178
+
162
179
 
163
180
  class FileSetWalker:
164
181
 
@@ -23,11 +23,11 @@ class VeribleFlow(FlowBase):
23
23
  @classmethod
24
24
  def parse_args(self, subparsers) -> None:
25
25
  parser = subparsers.add_parser('verible-verilog-lint', help='Verible Lint Flow')
26
- # parser.add_argument(
27
- # '--fix',
28
- # action='store_true',
29
- # help="Fix style formatting (Note: this modifies the source)"
30
- # )
26
+ parser.add_argument(
27
+ '--fix',
28
+ action='store_true',
29
+ help="Fix style formatting (Note: this modifies the source)"
30
+ )
31
31
  parser.add_argument(
32
32
  '-r', '--rules',
33
33
  action='store',
@@ -49,29 +49,30 @@ class VeribleFlow(FlowBase):
49
49
  os.makedirs(self.builddir, exist_ok=True)
50
50
 
51
51
  def generate(self):
52
- templatedir = resources_files(self.templates)
53
- environment = Environment(
54
- loader=FileSystemLoader(templatedir),
55
- trim_blocks=True)
56
- template = environment.get_template('rules.cfg.j2')
57
- generate_from_template(template, self.builddir)
58
-
59
- def execute(self):
60
- errors = False
61
- command = ["verible-verilog-lint"]
62
52
  if self.args.rules:
63
- rules = self.args.rules
53
+ self.rules = self.args.rules
64
54
  elif os.getenv('SIMPLHDL_VERIBLE_RULES'):
65
- rules = self.args.rules
55
+ self.rules = self.args.rules
66
56
  else:
67
- rules = 'rules.cfg'
57
+ templatedir = resources_files(self.templates)
58
+ environment = Environment(
59
+ loader=FileSystemLoader(templatedir),
60
+ trim_blocks=True)
61
+ template = environment.get_template('rules.cfg.j2')
62
+ generate_from_template(template, self.builddir)
63
+ self.rules = 'rules.cfg'
68
64
 
69
- command += f"--check_syntax=false --rules_config {rules}".split()
65
+ def execute(self):
66
+ errors = False
67
+ command = [
68
+ "verible-verilog-lint",
69
+ "--check_syntax=false",
70
+ "--ruleset=all",
71
+ "--rules_config", self.rules
72
+ ]
70
73
 
71
- # if self.args.fix:
72
- # command.append("--fix")
73
- # else:
74
- # command += f"-ap -of {self.args.output_format}".split()
74
+ if self.args.fix:
75
+ command += ["--autofix=inplace"]
75
76
 
76
77
  file_types = [VerilogIncludeFile, VerilogSourceFile, SystemVerilogSourceFile]
77
78
  files = [f for f in self.project.DefaultDesign.Files() if f.FileType in file_types]
@@ -8,13 +8,14 @@ from argparse import Namespace
8
8
  from pathlib import Path
9
9
  from jinja2 import Environment, FileSystemLoader
10
10
 
11
- from simplhdl.flow import FlowFactory, FlowBase
11
+ from simplhdl.flow import FlowFactory, FlowBase, FlowError
12
12
  from simplhdl.resources.templates import vsg as templates
13
13
  from simplhdl.utils import sh, CalledShError, generate_from_template
14
14
  from simplhdl.pyedaa import VHDLSourceFile
15
15
  from simplhdl.pyedaa.project import Project
16
16
  from simplhdl.pyedaa.attributes import UsedIn
17
17
 
18
+
18
19
  logger = logging.getLogger(__name__)
19
20
 
20
21
 
@@ -31,7 +32,7 @@ class VsgFlow(FlowBase):
31
32
  'syntastic',
32
33
  'summary'
33
34
  ],
34
- default='vsg',
35
+ default=None,
35
36
  help="Display output format"
36
37
  )
37
38
  parser.add_argument(
@@ -55,6 +56,8 @@ class VsgFlow(FlowBase):
55
56
  def __init__(self, name, args: Namespace, project: Project, builddir: Path):
56
57
  super().__init__(name, args, project, builddir)
57
58
  self.templates = templates
59
+ # file limit to change output for to summary
60
+ self.file_limit: int = 5
58
61
 
59
62
  def setup(self):
60
63
  os.makedirs(self.builddir, exist_ok=True)
@@ -69,29 +72,41 @@ class VsgFlow(FlowBase):
69
72
  VHDLSourceFile=VHDLSourceFile,
70
73
  project=self.project,
71
74
  UsedIn=UsedIn)
72
- template = environment.get_template('rules.yml.j2')
73
- generate_from_template(template, self.builddir)
74
-
75
- def execute(self):
76
- command = ["vsg"]
77
75
  if self.args.rules:
78
- rules = self.args.rules
76
+ self.rules = self.args.rules
79
77
  elif os.getenv('SIMPLHDL_VSG_RULES'):
80
- rules = self.args.rules
78
+ self.rules = self.args.rules
81
79
  else:
82
- rules = 'rules.yml'
80
+ template = environment.get_template('rules.yml.j2')
81
+ generate_from_template(template, self.builddir)
82
+ self.rules = 'rules.yml'
83
+
84
+ def execute(self):
85
+ command = ["vsg"]
86
+ user_files = len(self.args.files)
87
+ project_files = len(list(self.project.DefaultDesign.DefaultFileSet.Files(VHDLSourceFile)))
83
88
 
84
89
  if self.args.fix:
85
90
  command.append("--fix")
91
+ elif self.args.output_format is None:
92
+ if user_files > self.file_limit:
93
+ format = "summary"
94
+ elif project_files > self.file_limit and not user_files:
95
+ format = "summary"
96
+ else:
97
+ format = "vsg"
98
+ command += f"-ap -of {format}".split()
86
99
  else:
87
100
  command += f"-ap -of {self.args.output_format}".split()
88
101
 
89
- if self.args.files:
90
- if rules:
91
- command += f"-c {rules}".split()
102
+ if user_files:
103
+ if self.rules:
104
+ command += f"-c {self.rules}".split()
92
105
  command += ['-f'] + self.args.files
106
+ elif project_files:
107
+ command += f"-c {self.rules} files.json".split()
93
108
  else:
94
- command += f"-c {rules} files.json".split()
109
+ raise FlowError("No VHDL files")
95
110
 
96
111
  try:
97
112
  logger.debug(command)
@@ -1,3 +1,5 @@
1
+ import logging
2
+
1
3
  from pathlib import Path
2
4
  from typing import Callable
3
5
  from abc import ABCMeta, abstractmethod
@@ -6,6 +8,8 @@ from argparse import Namespace
6
8
  from .pyedaa.fileset import FileSet
7
9
  from .pyedaa.project import Project
8
10
 
11
+ logger = logging.getLogger(__name__)
12
+
9
13
 
10
14
  class ParserBase(metaclass=ABCMeta):
11
15
 
@@ -21,6 +25,17 @@ class ParserBase(metaclass=ABCMeta):
21
25
  pass
22
26
 
23
27
 
28
+ class NoParser(ParserBase):
29
+ """
30
+ This parser always returns an empty fileset
31
+ """
32
+ def is_valid_format(self, filename: Path) -> bool:
33
+ return True
34
+
35
+ def parse(self, filename: Path, project: Project, args: Namespace) -> 'FileSet':
36
+ return FileSet('Empty')
37
+
38
+
24
39
  class ParserFactory:
25
40
  """
26
41
  Factory for creating parsers
@@ -47,7 +62,8 @@ class ParserFactory:
47
62
  if parser.is_valid_format(filename):
48
63
  return parser
49
64
  if filename is None:
50
- raise ParserError("Couldn't find Parser for parsing, try using the --projectspec <filename>")
65
+ logger.info("No project specification found, continue with empty project")
66
+ return NoParser()
51
67
  else:
52
68
  raise ParserError(f"Couldn't find Parser for parsing '{filename}'")
53
69
 
@@ -30,6 +30,8 @@ def load_builtin_plugins() -> None:
30
30
  import_module('simplhdl.flows.quartusdse.quartusdseflow')
31
31
  import_module('simplhdl.flows.vsg.vsgflow')
32
32
  import_module('simplhdl.flows.verible.veribleflow')
33
+ import_module('simplhdl.flows.lint.lintflow')
34
+ import_module('simplhdl.flows.flake8.flake8flow')
33
35
  packages = chain(
34
36
  iter_namespace(simplhdl.parsers),
35
37
  iter_namespace(simplhdl.flows),
@@ -73,7 +73,11 @@ class VHDLSourceFile(HDLSourceFile, pm.HumanReadableContent):
73
73
  pass
74
74
 
75
75
 
76
- class CocotbPythonFile(pm.CocotbPythonFile, FileMixIn):
76
+ class PythonSourceFile(pm.PythonSourceFile):
77
+ pass
78
+
79
+
80
+ class CocotbPythonFile(PythonSourceFile, FileMixIn):
77
81
  def _registerAttributes(self):
78
82
  super()._registerAttributes()
79
83
  FileMixIn._registerAttributes(self)
@@ -0,0 +1,10 @@
1
+ [flake8]
2
+ exclude =
3
+ .hg,
4
+ .git,
5
+ __pycache__,
6
+ _*
7
+ per-file-ignores =
8
+ # imported but unused
9
+ __init__.py: F401
10
+ max-line-length = 100
@@ -1,4 +1,5 @@
1
1
  {{target}}.com: \
2
+ {{hashfile}} \
2
3
  {% for file in files %}
3
4
  {{file}} {{ '\\' if not loop.last else '' }}
4
5
  {% endfor %}
@@ -1,4 +1,5 @@
1
1
  {{target}}.com: \
2
+ {{hashfile}} \
2
3
  {% for file in files %}
3
4
  {{file}} {{ '\\' if not loop.last else '' }}
4
5
  {% endfor %}
@@ -1,4 +1,5 @@
1
1
  {{target}}.com: \
2
+ {{hashfile}} \
2
3
  {% for file in files %}
3
4
  {{file}} {{ '\\' if not loop.last else '' }}
4
5
  {% endfor %}
@@ -0,0 +1,58 @@
1
+ +always-comb
2
+ +always-comb-blocking
3
+ +always-ff-non-blocking
4
+ +banned-declared-name-patterns
5
+ +case-missing-default
6
+ +constraint-name-style
7
+ +create-object-name-match
8
+ +disable-statement
9
+ +endif-comment
10
+ +enum-name-style
11
+ +explicit-function-lifetime
12
+ +explicit-function-task-parameter-type
13
+ +explicit-parameter-storage-type
14
+ +explicit-task-lifetime
15
+ +forbid-consecutive-null-statements
16
+ +forbid-defparam
17
+ +forbid-line-continuations
18
+ +forbid-negative-array-dim
19
+ +forbidden-macro
20
+ +generate-label
21
+ +generate-label-prefix
22
+ +interface-name-style
23
+ +invalid-system-task-function
24
+ +legacy-generate-region
25
+ +legacy-genvar-declaration
26
+ +line-length
27
+ +macro-name-style
28
+ +macro-string-concatenation
29
+ +mismatched-labels
30
+ +module-begin-block
31
+ +module-filename
32
+ +module-parameter
33
+ +module-port
34
+ +no-tabs
35
+ +no-trailing-spaces
36
+ +numeric-format-string-style
37
+ +one-module-per-file
38
+ +package-filename
39
+ +packed-dimensions-range-ordering
40
+ +parameter-name-style="localparam_style:ALL_CAPS;parameter_style:ALL_CAPS"
41
+ -parameter-type-name-style
42
+ +plusarg-assignment
43
+ +port-name-suffix
44
+ +positive-meaning-parameter-name
45
+ +posix-eof
46
+ -proper-parameter-declaration
47
+ -signal-name-style
48
+ +struct-union-name-style
49
+ +suggest-parentheses
50
+ -suspicious-semicolon
51
+ +truncated-numeric-literal
52
+ +typedef-enums
53
+ +typedef-structs-unions
54
+ +undersized-binary-literal
55
+ +unpacked-dimensions-range-ordering
56
+ -uvm-macro-semicolon
57
+ +v2001-generate-begin
58
+ +void-cast
@@ -2,7 +2,7 @@ import os
2
2
  import sys
3
3
  import logging
4
4
 
5
- from typing import Dict, List, Optional, Union
5
+ from typing import Dict, List, Optional, Union, Generator
6
6
  from pathlib import Path
7
7
  from contextlib import contextmanager
8
8
  from time import sleep
@@ -21,6 +21,7 @@ def sh(command: List[str], cwd: Optional[Path] = None, output=False, shell=False
21
21
  if os.name == 'nt':
22
22
  shell = True
23
23
 
24
+ logger.debug(' '.join(command))
24
25
  with Popen(command, stdout=PIPE, stderr=PIPE, cwd=cwd, shell=shell) as p:
25
26
  if output:
26
27
  stdout: str = ''
@@ -132,7 +133,7 @@ def escape(a: str) -> str:
132
133
 
133
134
 
134
135
  @contextmanager
135
- def lock(directory: Path) -> Path:
136
+ def lock(directory: Path) -> Generator[Path, None, None]:
136
137
  while not mkdir(directory):
137
138
  sleep(1)
138
139
  try:
@@ -20,6 +20,7 @@ deps =
20
20
  flake8
21
21
  flake8-formatter-junit-xml
22
22
  commands =
23
+ flake8 {posargs:src tests}
23
24
  flake8 --format junit-xml --output-file {toxworkdir}/junit.{envname}.xml {posargs:src tests}
24
25
 
25
26
 
@@ -1 +0,0 @@
1
- __version__ = "0.0.6"
File without changes
File without changes
File without changes
File without changes