@zigc/lib 0.17.0-dev.27 → 0.17.0-dev.296

package/std/Target/sparc.zig

@@ -5,6 +5,7 @@ const CpuFeature = std.Target.Cpu.Feature;
 const CpuModel = std.Target.Cpu.Model;
 
 pub const Feature = enum {
+    @"64bit",
     crypto,
     deprecated_v8,
     detectroundchange,
@@ -23,6 +24,7 @@ pub const Feature = enum {
     leonpwrpsr,
     no_fmuls,
     no_fsmuld,
+    no_predictor,
     osa2011,
     popc,
     reserve_g1,
@@ -73,6 +75,13 @@ pub const all_features = blk: {
     const len = @typeInfo(Feature).@"enum".fields.len;
     std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
     var result: [len]CpuFeature = undefined;
+    result[@intFromEnum(Feature.@"64bit")] = .{
+        .llvm_name = "64bit",
+        .description = "Enable 64-bit mode",
+        .dependencies = featureSet(&[_]Feature{
+            .v9,
+        }),
+    };
     result[@intFromEnum(Feature.crypto)] = .{
         .llvm_name = "crypto",
         .description = "Enable cryptographic extensions",
@@ -165,6 +174,11 @@ pub const all_features = blk: {
         .description = "Disable the fsmuld instruction.",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@intFromEnum(Feature.no_predictor)] = .{
+        .llvm_name = "no-predictor",
+        .description = "Processor has no branch predictor, branches stall execution",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@intFromEnum(Feature.osa2011)] = .{
         .llvm_name = "osa2011",
         .description = "Enable Oracle SPARC Architecture 2011 extensions",
@@ -586,6 +600,7 @@ pub const cpu = struct {
         .llvm_name = "niagara",
         .features = featureSet(&[_]Feature{
             .deprecated_v8,
+            .no_predictor,
             .ua2005,
         }),
     };
@@ -594,6 +609,7 @@ pub const cpu = struct {
         .llvm_name = "niagara2",
         .features = featureSet(&[_]Feature{
             .deprecated_v8,
+            .no_predictor,
             .popc,
             .ua2005,
         }),
@@ -603,6 +619,7 @@ pub const cpu = struct {
         .llvm_name = "niagara3",
         .features = featureSet(&[_]Feature{
             .deprecated_v8,
+            .no_predictor,
             .popc,
             .ua2005,
             .ua2007,

package/std/Target/wasm.zig

@@ -12,6 +12,7 @@ pub const Feature = enum {
     exception_handling,
     extended_const,
     fp16,
+    gc,
     multimemory,
     multivalue,
     mutable_globals,
@@ -71,6 +72,11 @@ pub const all_features = blk: {
         .description = "Enable FP16 instructions",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@intFromEnum(Feature.gc)] = .{
+        .llvm_name = "gc",
+        .description = "Enable wasm gc",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@intFromEnum(Feature.multimemory)] = .{
         .llvm_name = "multimemory",
         .description = "Enable multiple memories",
@@ -148,6 +154,7 @@ pub const cpu = struct {
             .exception_handling,
             .extended_const,
             .fp16,
+            .gc,
             .multimemory,
             .multivalue,
             .mutable_globals,

package/std/Target/x86.zig

@@ -22,7 +22,6 @@ pub const Feature = enum {
     amx_movrs,
     amx_tf32,
     amx_tile,
-    amx_transpose,
     avx,
     avx10_1,
     avx10_2,
@@ -67,7 +66,6 @@ pub const Feature = enum {
     egpr,
     enqcmd,
     ermsb,
-    evex512,
     f16c,
     false_deps_getmant,
     false_deps_lzcnt_tzcnt,
@@ -136,6 +134,7 @@ pub const Feature = enum {
     ppx,
     prefer_128_bit,
     prefer_256_bit,
+    prefer_legacy_setcc,
     prefer_mask_registers,
     prefer_movmsk_over_vtest,
     prefer_no_gather,
@@ -168,6 +167,7 @@ pub const Feature = enum {
     slow_lea,
     slow_pmaddwd,
     slow_pmulld,
+    slow_pmullq,
     slow_shld,
     slow_two_mem_ops,
     slow_unaligned_mem_16,
@@ -199,6 +199,7 @@ pub const Feature = enum {
     waitpkg,
     wbnoinvd,
     widekl,
+    x32,
     x87,
     xop,
     xsave,
@@ -324,13 +325,6 @@ pub const all_features = blk: {
         .description = "Support AMX-TILE instructions",
         .dependencies = featureSet(&[_]Feature{}),
     };
-    result[@intFromEnum(Feature.amx_transpose)] = .{
-        .llvm_name = "amx-transpose",
-        .description = "Support AMX amx-transpose instructions",
-        .dependencies = featureSet(&[_]Feature{
-            .amx_tile,
-        }),
-    };
     result[@intFromEnum(Feature.avx)] = .{
         .llvm_name = "avx",
         .description = "Enable AVX instructions",
@@ -339,8 +333,8 @@ pub const all_features = blk: {
         }),
     };
     result[@intFromEnum(Feature.avx10_1)] = .{
-        .llvm_name = "avx10.1-512",
-        .description = "Support AVX10.1 up to 512-bit instruction",
+        .llvm_name = "avx10.1",
+        .description = "Support AVX10.1 instruction",
         .dependencies = featureSet(&[_]Feature{
             .avx512bf16,
             .avx512bitalg,
@@ -356,8 +350,8 @@ pub const all_features = blk: {
         }),
     };
     result[@intFromEnum(Feature.avx10_2)] = .{
-        .llvm_name = "avx10.2-512",
-        .description = "Support AVX10.2 up to 512-bit instruction",
+        .llvm_name = "avx10.2",
+        .description = "Support AVX10.2 instruction",
         .dependencies = featureSet(&[_]Feature{
             .avx10_1,
         }),
@@ -416,7 +410,6 @@ pub const all_features = blk: {
         .description = "Enable AVX-512 instructions",
         .dependencies = featureSet(&[_]Feature{
             .avx2,
-            .evex512,
             .f16c,
             .fma,
         }),
@@ -616,11 +609,6 @@ pub const all_features = blk: {
         .description = "REP MOVS/STOS are fast",
         .dependencies = featureSet(&[_]Feature{}),
     };
-    result[@intFromEnum(Feature.evex512)] = .{
-        .llvm_name = "evex512",
-        .description = "Support ZMM and 64-bit mask instructions",
-        .dependencies = featureSet(&[_]Feature{}),
-    };
     result[@intFromEnum(Feature.f16c)] = .{
         .llvm_name = "f16c",
         .description = "Support 16-bit floating point conversion instructions",
@@ -974,6 +962,11 @@ pub const all_features = blk: {
         .description = "Prefer 256-bit AVX instructions",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@intFromEnum(Feature.prefer_legacy_setcc)] = .{
+        .llvm_name = "prefer-legacy-setcc",
+        .description = "Prefer to emit legacy SetCC.",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@intFromEnum(Feature.prefer_mask_registers)] = .{
         .llvm_name = "prefer-mask-registers",
         .description = "Prefer AVX512 mask registers over PTEST/MOVMSK",
@@ -1145,6 +1138,11 @@ pub const all_features = blk: {
         .description = "PMULLD instruction is slow (compared to PMULLW/PMULHW and PMULUDQ)",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@intFromEnum(Feature.slow_pmullq)] = .{
+        .llvm_name = "slow-pmullq",
+        .description = "PMULLQ instruction is slow",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@intFromEnum(Feature.slow_shld)] = .{
         .llvm_name = "slow-shld",
         .description = "SHLD instruction is slow",
@@ -1325,6 +1323,11 @@ pub const all_features = blk: {
             .kl,
         }),
     };
+    result[@intFromEnum(Feature.x32)] = .{
+        .llvm_name = "x32",
+        .description = "64-bit with ILP32 programming model (e.g. x32 ABI)",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@intFromEnum(Feature.x87)] = .{
         .llvm_name = "x87",
         .description = "Enable X87 float instructions",
@@ -1393,7 +1396,6 @@ pub const cpu = struct {
             .cx16,
             .f16c,
             .false_deps_perm,
-            .false_deps_popcnt,
             .fast_15bytenop,
             .fast_gather,
             .fast_scalar_fsqrt,
@@ -1432,6 +1434,7 @@ pub const cpu = struct {
             .sha,
             .shstk,
             .slow_3ops_lea,
+            .slow_pmullq,
             .smap,
             .smep,
             .tuning_fast_imm_vector_shift,
@@ -1490,7 +1493,6 @@ pub const cpu = struct {
             .enqcmd,
             .f16c,
             .false_deps_perm,
-            .false_deps_popcnt,
             .fast_15bytenop,
             .fast_gather,
             .fast_scalar_fsqrt,
@@ -1529,6 +1531,7 @@ pub const cpu = struct {
             .sha,
             .shstk,
             .slow_3ops_lea,
+            .slow_pmullq,
             .smap,
             .smep,
             .tuning_fast_imm_vector_shift,
@@ -1566,7 +1569,6 @@ pub const cpu = struct {
             .enqcmd,
             .f16c,
             .false_deps_perm,
-            .false_deps_popcnt,
             .fast_15bytenop,
             .fast_gather,
             .fast_scalar_fsqrt,
@@ -1606,6 +1608,7 @@ pub const cpu = struct {
             .sha512,
             .shstk,
             .slow_3ops_lea,
+            .slow_pmullq,
             .sm3,
             .sm4,
             .smap,
@@ -2204,6 +2207,7 @@ pub const cpu = struct {
             .sahf,
             .sha,
             .slow_3ops_lea,
+            .slow_pmullq,
             .smap,
             .smep,
             .tuning_fast_imm_vector_shift,
@@ -2297,7 +2301,6 @@ pub const cpu = struct {
             .enqcmd,
             .f16c,
             .false_deps_perm,
-            .false_deps_popcnt,
             .fast_15bytenop,
             .fast_gather,
             .fast_scalar_fsqrt,
@@ -2338,6 +2341,7 @@ pub const cpu = struct {
             .sha512,
             .shstk,
             .slow_3ops_lea,
+            .slow_pmullq,
             .sm3,
             .sm4,
             .tuning_fast_imm_vector_shift,
@@ -2464,7 +2468,6 @@ pub const cpu = struct {
             .amx_int8,
             .amx_movrs,
             .amx_tf32,
-            .amx_transpose,
             .avx10_2,
             .avxifma,
             .avxneconvert,
@@ -2475,7 +2478,6 @@ pub const cpu = struct {
             .bmi2,
             .branch_hint,
             .ccmp,
-            .cf,
             .cldemote,
             .clflushopt,
             .clwb,
@@ -2533,12 +2535,12 @@ pub const cpu = struct {
             .sha,
             .sha512,
             .shstk,
+            .slow_pmullq,
             .sm3,
             .sm4,
             .tsxldtrk,
             .tuning_fast_imm_vector_shift,
             .uintr,
-            .usermsr,
             .vaes,
             .vpclmulqdq,
             .vzeroupper,
@@ -2622,6 +2624,7 @@ pub const cpu = struct {
             .serialize,
             .sha,
             .shstk,
+            .slow_pmullq,
             .smap,
             .smep,
             .tsxldtrk,
@@ -2935,6 +2938,7 @@ pub const cpu = struct {
             .serialize,
             .sha,
             .shstk,
+            .slow_pmullq,
             .tsxldtrk,
             .tuning_fast_imm_vector_shift,
             .uintr,
@@ -3024,6 +3028,7 @@ pub const cpu = struct {
             .serialize,
             .sha,
             .shstk,
+            .slow_pmullq,
             .tsxldtrk,
             .tuning_fast_imm_vector_shift,
             .uintr,
@@ -3181,6 +3186,7 @@ pub const cpu = struct {
             .rdseed,
             .sahf,
             .sha,
+            .slow_pmullq,
             .tuning_fast_imm_vector_shift,
             .vaes,
             .vpclmulqdq,
@@ -3245,6 +3251,7 @@ pub const cpu = struct {
             .rdseed,
             .sahf,
             .sha,
+            .slow_pmullq,
             .tuning_fast_imm_vector_shift,
             .vaes,
             .vpclmulqdq,
@@ -3475,7 +3482,6 @@ pub const cpu = struct {
             .enqcmd,
             .f16c,
             .false_deps_perm,
-            .false_deps_popcnt,
             .fast_15bytenop,
             .fast_gather,
             .fast_scalar_fsqrt,
@@ -3515,6 +3521,7 @@ pub const cpu = struct {
             .sha512,
             .shstk,
             .slow_3ops_lea,
+            .slow_pmullq,
             .sm3,
             .sm4,
             .tuning_fast_imm_vector_shift,
@@ -3546,7 +3553,6 @@ pub const cpu = struct {
             .cx16,
             .f16c,
             .false_deps_perm,
-            .false_deps_popcnt,
             .fast_15bytenop,
             .fast_gather,
             .fast_scalar_fsqrt,
@@ -3585,6 +3591,7 @@ pub const cpu = struct {
             .sha,
             .shstk,
             .slow_3ops_lea,
+            .slow_pmullq,
             .smap,
             .smep,
             .tuning_fast_imm_vector_shift,
@@ -3635,6 +3642,90 @@ pub const cpu = struct {
             .x87,
         }),
     };
+    pub const novalake: CpuModel = .{
+        .name = "novalake",
+        .llvm_name = "novalake",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .adx,
+            .allow_light_256_bit,
+            .avx10_2,
+            .avxifma,
+            .avxneconvert,
+            .avxvnni,
+            .avxvnniint16,
+            .avxvnniint8,
+            .bmi,
+            .bmi2,
+            .ccmp,
+            .clflushopt,
+            .clwb,
+            .cmov,
+            .cmpccxadd,
+            .cx16,
+            .egpr,
+            .enqcmd,
+            .false_deps_perm,
+            .fast_15bytenop,
+            .fast_gather,
+            .fast_scalar_fsqrt,
+            .fast_shld_rotate,
+            .fast_variable_crosslane_shuffle,
+            .fast_variable_perlane_shuffle,
+            .fast_vector_fsqrt,
+            .fsgsbase,
+            .fxsr,
+            .gfni,
+            .hreset,
+            .idivq_to_divl,
+            .invpcid,
+            .lzcnt,
+            .macrofusion,
+            .mmx,
+            .movbe,
+            .movdir64b,
+            .movdiri,
+            .movrs,
+            .ndd,
+            .nf,
+            .no_bypass_delay_blend,
+            .no_bypass_delay_mov,
+            .no_bypass_delay_shuffle,
+            .nopl,
+            .pconfig,
+            .pku,
+            .popcnt,
+            .ppx,
+            .prefer_movmsk_over_vtest,
+            .prefetchi,
+            .prfchw,
+            .ptwrite,
+            .push2pop2,
+            .rdpid,
+            .rdrnd,
+            .rdseed,
+            .sahf,
+            .serialize,
+            .sha,
+            .sha512,
+            .shstk,
+            .slow_3ops_lea,
+            .slow_pmullq,
+            .sm3,
+            .sm4,
+            .tuning_fast_imm_vector_shift,
+            .uintr,
+            .vaes,
+            .vpclmulqdq,
+            .vzeroupper,
+            .waitpkg,
+            .x87,
+            .xsavec,
+            .xsaveopt,
+            .xsaves,
+            .zu,
+        }),
+    };
     pub const opteron: CpuModel = .{
         .name = "opteron",
         .llvm_name = "opteron",
@@ -3697,7 +3788,6 @@ pub const cpu = struct {
             .enqcmd,
             .f16c,
             .false_deps_perm,
-            .false_deps_popcnt,
             .fast_15bytenop,
             .fast_gather,
             .fast_scalar_fsqrt,
@@ -3726,7 +3816,6 @@ pub const cpu = struct {
             .pku,
             .popcnt,
             .prefer_movmsk_over_vtest,
-            .prefetchi,
             .prfchw,
             .ptwrite,
             .rdpid,
@@ -3738,6 +3827,7 @@ pub const cpu = struct {
             .sha512,
             .shstk,
             .slow_3ops_lea,
+            .slow_pmullq,
             .sm3,
             .sm4,
             .tuning_fast_imm_vector_shift,
@@ -3908,7 +3998,6 @@ pub const cpu = struct {
             .cx16,
             .f16c,
             .false_deps_perm,
-            .false_deps_popcnt,
             .fast_15bytenop,
             .fast_gather,
             .fast_scalar_fsqrt,
@@ -3947,6 +4036,7 @@ pub const cpu = struct {
             .sha,
             .shstk,
             .slow_3ops_lea,
+            .slow_pmullq,
             .smap,
             .smep,
             .tuning_fast_imm_vector_shift,
@@ -4013,6 +4103,7 @@ pub const cpu = struct {
             .rdseed,
             .sahf,
             .sha,
+            .slow_pmullq,
             .smap,
             .smep,
             .tuning_fast_imm_vector_shift,
@@ -4124,6 +4215,7 @@ pub const cpu = struct {
             .serialize,
             .sha,
             .shstk,
+            .slow_pmullq,
             .smap,
             .smep,
             .tsxldtrk,
@@ -4494,6 +4586,7 @@ pub const cpu = struct {
             .sahf,
             .sha,
             .shstk,
+            .slow_pmullq,
             .smap,
             .smep,
             .tuning_fast_imm_vector_shift,
@@ -4567,6 +4660,82 @@ pub const cpu = struct {
             .x87,
         }),
     };
+    pub const wildcatlake: CpuModel = .{
+        .name = "wildcatlake",
+        .llvm_name = "wildcatlake",
+        .features = featureSet(&[_]Feature{
+            .@"64bit",
+            .adx,
+            .allow_light_256_bit,
+            .avxifma,
+            .avxneconvert,
+            .avxvnni,
+            .avxvnniint16,
+            .avxvnniint8,
+            .bmi,
+            .bmi2,
+            .clflushopt,
+            .clwb,
+            .cmov,
+            .cmpccxadd,
+            .cx16,
+            .enqcmd,
+            .f16c,
+            .false_deps_perm,
+            .fast_15bytenop,
+            .fast_gather,
+            .fast_scalar_fsqrt,
+            .fast_shld_rotate,
+            .fast_variable_crosslane_shuffle,
+            .fast_variable_perlane_shuffle,
+            .fast_vector_fsqrt,
+            .fma,
+            .fsgsbase,
+            .fxsr,
+            .gfni,
+            .hreset,
+            .idivq_to_divl,
+            .invpcid,
+            .lzcnt,
+            .macrofusion,
+            .mmx,
+            .movbe,
+            .movdir64b,
+            .movdiri,
+            .no_bypass_delay_blend,
+            .no_bypass_delay_mov,
+            .no_bypass_delay_shuffle,
+            .nopl,
+            .pconfig,
+            .pku,
+            .popcnt,
+            .prefer_movmsk_over_vtest,
+            .prfchw,
+            .ptwrite,
+            .rdpid,
+            .rdrnd,
+            .rdseed,
+            .sahf,
+            .serialize,
+            .sha,
+            .sha512,
+            .shstk,
+            .slow_3ops_lea,
+            .slow_pmullq,
+            .sm3,
+            .sm4,
+            .tuning_fast_imm_vector_shift,
+            .uintr,
+            .vaes,
+            .vpclmulqdq,
+            .vzeroupper,
+            .waitpkg,
+            .x87,
+            .xsavec,
+            .xsaveopt,
+            .xsaves,
+        }),
+    };
     pub const winchip2: CpuModel = .{
         .name = "winchip2",
         .llvm_name = "winchip2",

package/std/Target/xtensa.zig

@@ -15,6 +15,7 @@ pub const Feature = enum {
     div32,
     exception,
     extendedl32r,
+    forced_atomics,
     fp,
     highpriinterrupts,
     highpriinterrupts_level3,
@@ -34,6 +35,7 @@ pub const Feature = enum {
     prid,
     regprotect,
     rvector,
+    s32c1i,
     sext,
     threadptr,
     timers1,
@@ -101,6 +103,11 @@ pub const all_features = blk: {
         .description = "Enable Xtensa Extended L32R option",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@intFromEnum(Feature.forced_atomics)] = .{
+        .llvm_name = "forced-atomics",
+        .description = "Assume that lock-free native-width atomics are available",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@intFromEnum(Feature.fp)] = .{
         .llvm_name = "fp",
         .description = "Enable Xtensa Single FP instructions",
@@ -206,6 +213,11 @@ pub const all_features = blk: {
         .description = "Enable Xtensa Relocatable Vector option",
         .dependencies = featureSet(&[_]Feature{}),
     };
+    result[@intFromEnum(Feature.s32c1i)] = .{
+        .llvm_name = "s32c1i",
+        .description = "Enable Xtensa S32C1I option",
+        .dependencies = featureSet(&[_]Feature{}),
+    };
     result[@intFromEnum(Feature.sext)] = .{
         .llvm_name = "sext",
         .description = "Enable Xtensa Sign Extend option",
@@ -245,6 +257,59 @@ pub const all_features = blk: {
 };
 
 pub const cpu = struct {
+    pub const esp32: CpuModel = .{
+        .name = "esp32",
+        .llvm_name = "esp32",
+        .features = featureSet(&[_]Feature{
+            .bool,
+            .clamps,
+            .coprocessor,
+            .dcache,
+            .debug,
+            .density,
+            .dfpaccel,
+            .div32,
+            .exception,
+            .fp,
+            .highpriinterrupts_level7,
+            .interrupt,
+            .loop,
+            .mac16,
+            .minmax,
+            .miscsr,
+            .mul16,
+            .mul32,
+            .mul32high,
+            .nsa,
+            .prid,
+            .regprotect,
+            .rvector,
+            .s32c1i,
+            .sext,
+            .threadptr,
+            .timers3,
+            .windowed,
+        }),
+    };
+    pub const esp8266: CpuModel = .{
+        .name = "esp8266",
+        .llvm_name = "esp8266",
+        .features = featureSet(&[_]Feature{
+            .debug,
+            .density,
+            .exception,
+            .extendedl32r,
+            .highpriinterrupts_level3,
+            .interrupt,
+            .mul16,
+            .mul32,
+            .nsa,
+            .prid,
+            .regprotect,
+            .rvector,
+            .timers1,
+        }),
+    };
     pub const generic: CpuModel = .{
         .name = "generic",
         .llvm_name = "generic",