verilog_rename 0.0.1 → 0.0.2

data/README.md

@@ -0,0 +1,22 @@
+verilog_rename
+==============
+
+Helpers to rename a verilog module and update refferences to it
+
+Example (from the rename-verilog executable)
+
+    require 'rubygems'
+    require 'verilog_rename'
+
+    this_dir = Dir.pwd
+     
+    path_files = Verilog::PathFiles.new( this_dir )
+    path_files.read_all
+
+    rename = Verilog::Rename.new('OLD_NAME', 'NEW_NAME', path_files)
+    rename.rename_module
+
+TODO
+----
+
+In the future the rename executable will have options for prefix which can operate on whole directories.

data/lib/verilog/rename.rb

@@ -1,4 +1,4 @@
-require 'FileUtils'
+require 'fileutils'
 
 module Verilog
 

data/lib/verilog_rename.rb

@@ -1,6 +1,9 @@
 
+libdir = File.dirname(__FILE__)
+$LOAD_PATH.unshift(libdir) unless $LOAD_PATH.include?(libdir)
+
 module VerilogRename
-  VERSION = '0.0.1'
+  VERSION = '0.0.2'
 end
 
 require 'verilog'

data/spec/scratch/fixtures/{TEST_ONE.v → TEST_TWO.v}

@@ -1,4 +1,4 @@
-module TEST_ONE(
+module TEST_TWO(
   input rx,
   output tx
 );

data/spec/scratch/fixtures/test_four.vh

@@ -1,3 +1,3 @@
 
-`include 'TEST_ONE.v'
+`include 'TEST_TWO.v'
 `include 'test_three.v'

data/spec/scratch/fixtures/test_three.v

@@ -4,12 +4,12 @@ module TEST_THREE(
 );
 
 
-TEST_ONE test_one_i0(
+TEST_TWO test_one_i0(
   .rx  (rx),
   .tx  (tx)
 );
 
-TEST_ONE test_two_i0;
+TEST_TWO test_two_i0;
 
 TEST_FOUR test_four_i0();
 

metadata

@@ -1,13 +1,13 @@
 --- !ruby/object:Gem::Specification 
 name: verilog_rename
 version: !ruby/object:Gem::Version 
-  hash: 29
+  hash: 27
   prerelease: 
   segments: 
   - 0
   - 0
-  - 1
-  version: 0.0.1
+  - 2
+  version: 0.0.2
 platform: ruby
 authors: 
 - Morgan Prior
@@ -15,7 +15,8 @@ autorequire:
 bindir: bin
 cert_chain: []
 
-date: 2011-07-03 00:00:00 Z
+date: 2011-10-24 00:00:00 +01:00
+default_executable: 
 dependencies: 
 - !ruby/object:Gem::Dependency 
   name: verilog
@@ -43,12 +44,11 @@ extra_rdoc_files: []
 
 files: 
 - LICENSE.rtf
+- README.md
 - Rakefile
 - bin/rename-verilog
 - lib/verilog/path_files.rb
 - lib/verilog/prefix.rb
-- lib/verilog/rename-backup.rb
-- lib/verilog/rename-oldf.rb
 - lib/verilog/rename.rb
 - lib/verilog_rename.rb
 - spec/example1/beta.v
@@ -64,8 +64,8 @@ files:
 - spec/run_examples1.sh
 - spec/run_examples2.sh
 - spec/scratch/fixtures/test_four.vh
-- spec/scratch/fixtures/TEST_ONE.v
 - spec/scratch/fixtures/test_three.v
+- spec/scratch/fixtures/TEST_TWO.v
 - spec/spec_helper.rb
 - spec/temp/BETA_R4.v
 - spec/temp/BETA_R4_TH.v
@@ -73,6 +73,7 @@ files:
 - spec/temp/BETA_R4_TH_pkg.v
 - spec/temp/BETA_TH_sim.do
 - spec/verilog_rename_spec.rb
+has_rdoc: true
 homepage: http://amaras-tech.co.uk/software/verilog_rename
 licenses: []
 
@@ -102,7 +103,7 @@ required_rubygems_version: !ruby/object:Gem::Requirement
 requirements: []
 
 rubyforge_project: 
-rubygems_version: 1.8.5
+rubygems_version: 1.6.2
 signing_key: 
 specification_version: 3
 summary: Extension to the verilog gem for renaming verilog files

data/lib/verilog/rename-backup.rb

@@ -1,130 +0,0 @@
-require 'FileUtils'
-
-module Verilog
-
-  class Rename
-    attr_reader :path_files
-    attr_reader :old_name, :new_name
-    attr_reader :old_file, :new_file
-
-
-    def initialize(old_name, new_name, path_files) 
-      @old_name   = old_name
-      @new_name   = new_name
-      @path_files = path_files
-    end
-
-    def rename
-      #@old_file, @new_file = find_rename_verilog_file
-
-      #Analyse file and rename module
-      rename_module
-
-      #update_refferences
-    end
-
-    def update_refferences
-      files = Dir.glob('*.*')
-      #puts "File list searching for insatances of #{@old_name}"
-      files.each do |file|
-        next if File.directory?( file )
-        contents = Verilog::FileReader.get_file_as_string( file )
-
-        #Update Instatiations
-        updated_instance_b = contents.gsub!(
-          /(^\s*)#{@old_name}(\s\w+\s*\()/i, "\\1#{@new_name}\\2")
-          if updated_instance_b  
-            puts "Updating instantiation of #{@old_name} to #{@new_name} in #{file.to_s}"
-          end
-
-          #Update inculde
-          ## want filename of file being moved
-          updated_include_b = contents.gsub!(/(^\s*`include [\'\"])#{@old_file}([\'\"])/i, "\\1#{@new_file}\\2")
-          if updated_include_b  
-            puts "Updating include of #{@old_file} to #{@new_file} in #{file.to_s}"
-          end
-
-
-          #Update lines in *.do runscripts
-          updated_run_b = contents.gsub!(/(\s+)#{@old_file}(\s+)/, "\\1#{@new_file}\\2")
-          if updated_instance_b  
-            puts "Updating call to #{@old_file} to #{@new_file} in #{file.to_s}"
-          end
-
-          #Update File
-          if updated_instance_b or updated_include_b or updated_run_b
-            write_file_to_string( file, contents )
-          end
-
-
-      end
-
-    end
-
-    def rename_module
-
-      #find the correct file first
-      puts @old_name
-
-      file_to_rename = @path_files.find_by_module( @old_name )
-
-      file_to_rename.contents.gsub!(/(^\s*module )#{@old_name}(\s+|;|\()/i, "\\1#{@new_name}\\2")
-      
-      extension = ::File.extname( file_to_rename.filename )
-      
-      #Need to change file name but keep extension
-      file_to_rename.filename = @new_name + extension
-
-      pp file_to_rename
-
-                             #Save file, will use new name.
-
-                             #Delete Old file
-
-                             #Update other files refferencing it.
-
-
-      #file_contents = Verilog::FileReader.get_file_as_string( new_file )
-
-      #file_contents
-
-      # if updated_b 
-      #   Verilog::FileReader.write_file_to_string( new_file, file_contents )
-      # end
-    end
-
-    def find_rename_verilog_file
-      old_file, ext = find_module_file( @old_name )
-
-      if old_file 
-        new_file = @new_name + ext
-        puts "Moving #{old_file} to #{new_file}"
-        FileUtils.move( old_file, new_file ) 
-      else
-        #Old_filename does not exists
-        # This could be second tim running script.
-        # Look for newfile incase already moved.
-        new_file, ext = find_module_file( @new_name )
-      end
-
-      return [old_file, new_file]
-    end
-
-  end
-
-
-end
-
-if $0 == __FILE__
-  #puts "Running Verilog Rename"
-  #operate on current directory (future parse testbench.f)
-  this_dir = Dir.pwd
-
-  #Parameter 1 old_name
-  old_name = ARGV[0]
-  #Parameter 2 new_name
-  new_name = ARGV[1]
-
-  a = Verilog::Rename::File.new(this_dir, old_name, new_name)
-  a.rename
-end

data/lib/verilog/rename-oldf.rb

@@ -1,195 +0,0 @@
-require 'FileUtils'
-require 'pp'
-
-module Verilog
-
-  EXTENSIONS = [".v", ".bh.v", ".sv"]
-
-   class File
-      attr_reader :path
-      attr_reader :file_name
-      attr_reader :ext
-
-      def initialise( path, file_name="", ext="" )
-        #TODO if path is a file then create file_name and ext
-        @path      = path
-        @file_name = file_name
-        #TODO check ext starts with .
-        @ext       = ext
-      end
-
-      def absolute_path
-        File.join( File.expand_path( path ), file_name ext )
-      end
-
-      def read
-        if File.exist?( absolute_path )
-          data = ''
-          f = File.open(absolute_path, "r") 
-          f.each_line do |line|
-            data += line
-          end
-          f.close
-          return data
-        else
-          #TODO raise correct exception here
-          puts "ERROR File Not Found #{absolute_path}"
-        end
-
-      end
-
-      def save( contents )
-        f = File.open(absolute_path, "w")
-        f.write(contents)
-        f.close
-      end
-
-
-    end
-
-    class PathFiles
-      attr_reader :files
-
-      def initalize( path="" )
-        @files = []
-        load_path( path )
-      end
-
-      def load_path( paths )
-        #path is single string or array of strings
-        paths.each do |path|
-          files = Dir.glob('*.*')
-          files.each do |file|
-             #Skip if Directory got passed *.* Filter
-              next if File.directory?( file )
-             
-             file_extension = File.extname(file)
-             name = File.basename(file,file_extension)  
-             @files << Verilog::File.new(path, name, file_extension)
-
-          end
-        end
-      end
-
-      def <<( item ) 
-        @files
-      end
-
-      def find_module( name )
-          result = @files.select { |file| file.file_name == name }
-
-          if result.size == 1
-            return result
-          else
-            #TODO Fall back to scanning all files for module declarations 
-            return false
-          end
-      end
-
-
-    end
-
-
-
-  module Rename
-    class Rename
-      attr_reader :dir, :old_name, :new_name
-      attr_reader :old_file, :new_file
-
-
-      def initialize(this_dir, old_name, new_name) 
-        @dir      = this_dir
-        @old_name = old_name
-        @new_name = new_name
-      end
-
-      def rename
-        @old_file, @new_file = find_rename_verilog_file
-
-        #Analyse file and rename module
-        rename_module( @new_file )
-
-        update_refferences
-      end
-
-      def update_refferences
-        files = Dir.glob('*.*')
-        #puts "File list searching for insatances of #{@old_name}"
-        files.each do |file|
-          next if File.directory?( file )
-          contents = Verilog::FileReader.get_file_as_string( file )
-
-          #Update Instatiations
-          updated_instance_b = contents.gsub!(/(^\s*)#{@old_name}(\s\w+\s*\()/i, "\\1#{@new_name}\\2")
-          if updated_instance_b  
-            puts "Updating instantiation of #{@old_name} to #{@new_name} in #{file.to_s}"
-          end
-
-          #Update inculde
-          ## want filename of file being moved
-          updated_include_b = contents.gsub!(/(^\s*`include [\'\"])#{@old_file}([\'\"])/i, "\\1#{@new_file}\\2")
-          if updated_include_b  
-            puts "Updating include of #{@old_file} to #{@new_file} in #{file.to_s}"
-          end
-
-
-          #Update lines in *.do runscripts
-          updated_run_b = contents.gsub!(/(\s+)#{@old_file}(\s+)/, "\\1#{@new_file}\\2")
-          if updated_instance_b  
-            puts "Updating call to #{@old_file} to #{@new_file} in #{file.to_s}"
-          end
-
-          #Update File
-          if updated_instance_b or updated_include_b or updated_run_b
-            write_file_to_string( file, contents )
-          end
-
-
-        end
-
-      end
-
-      def rename_module( new_file )
-        file_contents = Verilog::FileReader.get_file_as_string( new_file )
-
-        updated_b = file_contents.gsub!(/(^\s*module )#{@old_name}(\s+|;|\()/i, "\\1#{@new_name}\\2")
-
-        if updated_b 
-          Verilog::FileReader.write_file_to_string( new_file, file_contents )
-        end
-      end
-
-      def find_rename_verilog_file
-        old_file, ext = find_module_file( @old_name )
-
-        if old_file 
-          new_file = @new_name + ext
-          puts "Moving #{old_file} to #{new_file}"
-            FileUtils.move( old_file, new_file ) 
-        else
-          #Old_filename does not exists
-          # This could be second tim running script.
-          # Look for newfile incase already moved.
-          new_file, ext = find_module_file( @new_name )
-        end
-
-        return [old_file, new_file]
-      end
-
-    end
-  end
-end
-
-if $0 == __FILE__
-  #puts "Running Verilog Rename"
-  #operate on current directory (future parse testbench.f)
-  this_dir = Dir.pwd
-
-  #Parameter 1 old_name
-  old_name = ARGV[0]
-  #Parameter 2 new_name
-  new_name = ARGV[1]
-
-  a = Verilog::Rename::File.new(this_dir, old_name, new_name)
-  a.rename
-end