rpicsim 0.4.0 → 1.0.0
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- checksums.yaml +4 -4
- data/.yardopts +3 -1
- data/Introduction.md +1 -3
- data/README.md +1 -3
- data/docs/ChangeLog.md +13 -0
- data/docs/KnownIssues.md +2 -2
- data/docs/Manual.md +0 -1
- data/docs/RSpecIntegration.md +24 -1
- data/docs/SupportedMPLABXVersions.md +2 -0
- data/lib/rpicsim.rb +6 -1
- data/lib/rpicsim/composite_memory.rb +3 -0
- data/lib/rpicsim/flaws.rb +28 -4
- data/lib/rpicsim/label.rb +7 -0
- data/lib/rpicsim/memory.rb +4 -0
- data/lib/rpicsim/memory_watcher.rb +11 -4
- data/lib/rpicsim/mplab.rb +1 -0
- data/lib/rpicsim/mplab/mplab_assembly.rb +0 -1
- data/lib/rpicsim/pin.rb +7 -0
- data/lib/rpicsim/program_counter.rb +4 -0
- data/lib/rpicsim/program_file.rb +20 -17
- data/lib/rpicsim/rspec.rb +6 -3
- data/lib/rpicsim/rspec/helpers.rb +13 -5
- data/lib/rpicsim/rspec/persistent_expectations.rb +5 -3
- data/lib/rpicsim/rspec/sim_diagnostics.rb +1 -0
- data/lib/rpicsim/sim.rb +8 -3
- data/lib/rpicsim/stack_pointer.rb +6 -0
- data/lib/rpicsim/stack_trace.rb +32 -1
- data/lib/rpicsim/storage/memory_integer.rb +1 -0
- data/lib/rpicsim/symbol_set.rb +3 -1
- data/lib/rpicsim/variable.rb +14 -0
- data/lib/rpicsim/variable_set.rb +2 -0
- data/lib/rpicsim/version.rb +4 -1
- data/lib/rpicsim/xc8_sym_file.rb +63 -11
- metadata +2 -7
- data/docs/PreventingCallStackOverflow.md +0 -92
- data/lib/rpicsim/call_stack_info.rb +0 -303
- data/lib/rpicsim/instruction.rb +0 -337
- data/lib/rpicsim/mplab/mplab_disassembler.rb +0 -20
- data/lib/rpicsim/search.rb +0 -20
checksums.yaml
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SHA1:
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metadata.gz:
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data.tar.gz:
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metadata.gz: 5b6af21f7563390039da12c8b89f5680a02cb986
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data.tar.gz: 1b76b192dcbea43027d5279cebc2f4949c42377d
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SHA512:
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metadata.gz:
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data.tar.gz:
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metadata.gz: ac3c2f02ad9039fc16940f436cc35bffe710c028e084f52f23c4b4c81d4d4ead4b982af6032529b4259e2ef39e21d130fecead04486d70b3cdd7cbdc95ee936f
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data.tar.gz: fedd8d6089a28a1e7395beb446e7a7467778c69c696e3a6e7fffa5eb2910cf15cf370b51f268e49e379b8f33116c88197e1b571ac7778b58b6495c28615c4ff7
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data/.yardopts
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1
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lib/rpicsim.rb
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lib/rpicsim/mplab.rb
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lib/rpicsim/**/*.rb
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--readme Introduction.md
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--load docs/plugin/plugin.rb
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--api public
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-
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docs/Manual.md
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docs/ChangeLog.md
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@@ -18,7 +21,6 @@ docs/Manual.md
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docs/Variables.md
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docs/Memories.md
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docs/RamWatcher.md
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docs/PreventingCallStackOverflow.md
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docs/IntroductionToRSpec.md
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docs/UnitTesting.md
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data/Introduction.md
CHANGED
@@ -44,14 +44,12 @@ RPicSim has features that allow you to:
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* Monitor all writes to RAM.
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* Run assertions at every step of a simulation.
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-
For some applications, RPicSim can also analyze the firmware and verify that the call stack will never overflow.
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-
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RPicSim is distributed as a Ruby gem named `rpicsim`. To install RPicSim, run:
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jgem install rpicsim
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-
RPicSim has been tested with MPLAB X v1.85, v1.90, v1.95, v2.00, v2.05, and v2.
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RPicSim has been tested with MPLAB X v1.85, v1.90, v1.95, v2.00, v2.05, v2.10, v2.15, and v2.20.
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However, it uses a lot of undocumented and internal features of the Microchip Java libraries, so it will probably need to be updated as new versions of MPLAB X are released.
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RPicSim is not intended to replace formal specifications, code reviews, and rigorous testing of your firmware on actual hardware.
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data/README.md
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* Monitor all writes to RAM.
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* Run assertions at every step of a simulation.
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-
For some applications, RPicSim can also analyze the firmware and verify that the call stack will never overflow.
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-
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RPicSim is distributed as a Ruby gem named `rpicsim`. To install RPicSim, run:
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jgem install rpicsim
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RPicSim has been tested with MPLAB X v1.85, v1.90, v1.95, v2.00, v2.05, and v2.
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RPicSim has been tested with MPLAB X v1.85, v1.90, v1.95, v2.00, v2.05, v2.10, v2.15, and v2.20.
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However, it uses a lot of undocumented and internal features of the Microchip Java libraries, so it will probably need to be updated as new versions of MPLAB X are released.
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RPicSim is not intended to replace formal specifications, code reviews, and rigorous testing of your firmware on actual hardware.
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data/docs/ChangeLog.md
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Change log
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====
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1.0.0
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----
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Released on 2014-09-17.
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- Major improvements to the documentation. Mainly, the public API of RPicSim has been defined, and everything not in the public API is now hidden from the documentation. Doing this allows us to follow [Semantic Versioning](http://semver.org/spec/v2.0.0.html) from now on.
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- MemoryWatcher: Adds WREG and BSR to the default list of registers to ignore.
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- Removed all disassembly and static analysis features, since they could be better implemented in a different gem that doesn't depend on any Microchip code:
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- Removed RPicSim::ProgramFile#instruction
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- Removed RPicSim::CallStackInfo
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- Removed RPicSim::Instruction
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0.4.0
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----
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Released on 2014-07-30.
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@@ -15,6 +26,8 @@ Released on 2014-07-30.
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- Adds the {RPicSim::Xc8SymFile} class, which can load symbols from a SYM file produced by the XC8 compiler and then be passed to {RPicSim::Sim::ClassDefinitionMethods#import_symbols import_symbols}. This was necessary because the COF files produced by XC8 are difficult to interpret and do not always allow us to tell what memory space a given symbol is for.
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- {RPicSim::Sim::ClassMethods#label #label} and {RPicSim::Sim::ClassMethods#labels #labels} methods are now available on both instances of a simulation class or on a simulation class itself.
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MPLAB X v2.15 and v2.20 were released after RPicSim 0.4.0, but the changes in those versions of MPLAB X were minor enough that RPicSim 0.4.0 should work with them.
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+
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0.3.0
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----
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Released on 2014-06-20.
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data/docs/KnownIssues.md
CHANGED
@@ -112,11 +112,11 @@ Pins report the wrong output state if TRISx is cleared again
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112
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----
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_Type: MPLAB X bug_
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-
_MPLAB X versions affected:
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_MPLAB X versions affected: 1.85 through 2.10_
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Even if you set up the pin properly (working around all the issues above) and get {RPicSim::Pin#driving_high?} to return true, a `bcf` instruction on the pin's TRISx bit (or probably any write to the TRISx register) will cause the pin to start reporting the wrong output state.
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-
This issue is tested in `spec/integration/pin_spec.rb
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This issue is tested in `spec/integration/pin_spec.rb`, and was fixed in MPLAB X v2.15.
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RAM watcher is useless because all of RAM seems to change on every step
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data/docs/Manual.md
CHANGED
@@ -20,7 +20,6 @@ This is the table of contents for the RPicSim manual.
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* {file:Variables.md}
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* {file:Memories.md}
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* {file:RamWatcher.md RAM watcher}
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-
* {file:PreventingCallStackOverflow.md Preventing call stack overflow}
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* Testing firmware with RPicSim and RSpec
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* {file:IntroductionToRSpec.md Introduction to RSpec}
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* {file:UnitTesting.md Unit testing}
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data/docs/RSpecIntegration.md
CHANGED
@@ -13,7 +13,30 @@ To enable the RSpec integration, simply put this line in your `spec_helper.rb`:
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!!!ruby
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require 'rpicsim/rspec'
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-
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That gives you all the features that are documented below.
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### Fine-grained configuration
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Alternatively, if you just want a subset of the features described here, you can use any combination of the snippets below:
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# Persistent expectations that can be stored and checked later
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require 'rpicsim/rspec/persistent_expectations'
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RSpec.configure { |c| c.include RPicSim::RSpec::PersistentExpectations }
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<!-- separate -->
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# Helper methods, including persistent expectations
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require 'rpicsim/rspec/helpers'
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<!-- separate -->
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# Show debug info from sim if a spec fails
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require 'rpicsim/rspec/sim_diagnostics'
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<!-- separate -->
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# Better error messages for RSpec 2.x
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require 'rpicsim/rspec/be_predicate'
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Helper methods
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@@ -8,6 +8,8 @@ RPicSim uses code in MPLAB X to actually perform the PIC simulation. Therefore,
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- 2.00
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- 2.05
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- 2.10
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- 2.15
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- 2.20
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The different versions of MPLAB X have different problems that affect the simulation. For more information, see the {file:KnownIssues.md Known issues page}.
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data/lib/rpicsim.rb
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1
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# @api public
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module RPicSim
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# This class wraps two or more memory objects and
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# provides an interface that is also like {RPicSim::Memory}.
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# Any reads or writes from the composite memory will go to the first
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# component memory for which the address is valid.
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#
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# @api private
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class CompositeMemory
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# Creates a new instance.
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# The memory objects given must support the following methods:
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data/lib/rpicsim/flaws.rb
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# @api public
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module RPicSim
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# This module stores knowledge about flaw in RPicSim, usually due to bugs or
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# limitation of the MPLAB X classes we are using. See {file:KnownIssues.md}
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# for more details.
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#
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# @api public
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module Flaws
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-
# Represents a flaw in RPicSim, usually
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#
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-
#
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# Represents a flaw in RPicSim, usually dues to bugs in the MPLAB X classes
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# we are using. Stores the name of the flaw and knowledge about what
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# versions of MPLAB X it affects and how.
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class Flaw
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# Creates a new flaw with the specified name.
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# @param name [Symbol] The name of this flaw.
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# @api private
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def initialize(name)
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@versions = {}
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end
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@@ -15,7 +22,7 @@ module RPicSim
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# might be a more complicated thing if there is more than one effect the
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# the flaw can have.
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#
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-
# @param version [String] A version of MPLAB X, e.g.
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# @param version [String] A version of MPLAB X, e.g. +'1.95'+.
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# @return effect
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def effect(version)
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if @versions.key? version
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@@ -26,6 +33,7 @@ module RPicSim
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end
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# Records the effect this flaw has on a given version of MPLAB X.
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# @api private
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def affects_version(version, effect)
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@versions[version] = effect
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end
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# Records the effect that this flaw probably has in other versions of
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# MPLAB X that have not been tested. This allows us to record our guesses
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# about how the next version of MPLAB X will behave.
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# @api private
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def probably_affects_other_versions(effect)
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@probable_affect_for_other_versions = effect
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end
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end
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@flaw_hash = {}
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# Returns the {Flaw} with the specified name.
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# @param name [Symbol] The name of the flaw. The names are listed in +flaws.rb+.
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# @return [Flaw]
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def self.[](name)
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@flaw_hash[name].effect Mplab.version
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end
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# @api private
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def self.add(name)
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@flaw_hash[name] = flaw = Flaw.new(name)
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yield flaw
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end
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add(:writing_tris_affects_output) do |flaw|
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flaw.affects_version '1.85', true
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flaw.affects_version '1.90', true
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flaw.affects_version '1.95', true
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flaw.affects_version '2.00', true
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flaw.affects_version '2.05', true
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flaw.affects_version '2.10', true
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flaw.probably_affects_other_versions false
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end
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add(:fr_memory_attach_useless) do |flaw|
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flaw.affects_version '1.85', false
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flaw.affects_version '1.90', false
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data/lib/rpicsim/label.rb
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# @api public
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module RPicSim
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# A very simple class that represents a label in firmware.
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# @api public
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class Label
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# The name of the label from the firmware.
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# @return (Symbol)
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attr_reader :address
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# Makes a new label with the specified name and address.
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# @api private
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def initialize(name, address)
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@name = name
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@address = address
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end
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# Returns the address of the label.
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#
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# @return [Integer]
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def to_i
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address
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end
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# Returns a nice string representation of the label.
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#
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# @return [String]
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def to_s
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'<Label %s address=0x%x>' % [name, address]
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end
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data/lib/rpicsim/memory.rb
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# @api public
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module RPicSim
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# This object allows read and write access to the data currently
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# stored in a memory space of the simulated device.
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# +read_word+ and +write_word+.
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#
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# For more information, see {file:Memories.md}.
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#
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# @api public
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class Memory
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# @param mplab_memory [Mplab::Memory]
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# @api private
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def initialize(mplab_memory)
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@mplab_memory = mplab_memory
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end
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require 'set'
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# @api public
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module RPicSim
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# This class can attach to an MPLAB X memory class and watch for changes in it, and
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# report those changes as a hash associating variable names to new values. This is
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@@ -9,9 +10,15 @@ module RPicSim
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# This class does not analyze the current instruction being executed; it uses the
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# Attach method of the MPLAB X memory classes. This means that it doesn't work properly
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# in some versions of MPLAB X. See {file:docs/Flaws.textile}.
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#
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# @api public
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class MemoryWatcher
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# Allows you to read or write the list of variable names whose changes will
|
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# be ignored. By default, this includes registers like WREG and STATUS that
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# change a lot.
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#
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# @return [Array(Symbol)]
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attr_accessor :var_names_ignored
|
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|
-
attr_accessor :var_names_ignored_on_first_step
|
15
22
|
|
16
23
|
# Creates a new instance.
|
17
24
|
# @param sim [Sim]
|
@@ -61,6 +68,8 @@ module RPicSim
|
|
61
68
|
@vars_written.clear
|
62
69
|
end
|
63
70
|
|
71
|
+
private
|
72
|
+
|
64
73
|
def handle_change(address_ranges)
|
65
74
|
addresses = address_ranges.flat_map(&:to_a)
|
66
75
|
vars = addresses.map { |a| @vars_by_address[a] || a }
|
@@ -71,8 +80,6 @@ module RPicSim
|
|
71
80
|
@vars_written.merge vars
|
72
81
|
end
|
73
82
|
|
74
|
-
private
|
75
|
-
|
76
83
|
def remove_vars(vars, var_names_to_remove)
|
77
84
|
vars.reject! do |key, val|
|
78
85
|
name = key.is_a?(Integer) ? key : key.name
|
@@ -84,7 +91,7 @@ module RPicSim
|
|
84
91
|
# The datasheet says the PCLATH is not affected by pushing or popping the stack, but
|
85
92
|
# we still get spurious events for it when a return instruction is executed.
|
86
93
|
|
87
|
-
[:PCL, :PCLATH, :STATUS]
|
94
|
+
[:PCL, :PCLATH, :WREG, :STATUS, :BSR]
|
88
95
|
end
|
89
96
|
end
|
90
97
|
end
|
data/lib/rpicsim/mplab.rb
CHANGED
data/lib/rpicsim/pin.rb
CHANGED
@@ -1,10 +1,14 @@
|
|
1
|
+
# @api public
|
1
2
|
module RPicSim
|
2
3
|
# This class represents an external pin of the simulated device.
|
3
4
|
# It provides methods for reading the pin's output value and setting
|
4
5
|
# its input value.
|
6
|
+
#
|
7
|
+
# @api public
|
5
8
|
class Pin
|
6
9
|
# Initializes a new Pin object to wrap the given MplabPin.
|
7
10
|
# @param mplab_pin [Mplab::MplabPin]
|
11
|
+
# @api private
|
8
12
|
def initialize(mplab_pin)
|
9
13
|
raise ArgumentError, 'mplab_pin is nil' if mplab_pin.nil?
|
10
14
|
@mplab_pin = mplab_pin
|
@@ -46,14 +50,17 @@ module RPicSim
|
|
46
50
|
|
47
51
|
# Returns an array of all the pin's names from the datasheet, like
|
48
52
|
# "RA4" or "TX".
|
53
|
+
# @return [String]
|
49
54
|
def names
|
50
55
|
@mplab_pin.names
|
51
56
|
end
|
52
57
|
|
58
|
+
# @return [String]
|
53
59
|
def to_s
|
54
60
|
@mplab_pin.name
|
55
61
|
end
|
56
62
|
|
63
|
+
# @return [String]
|
57
64
|
def inspect
|
58
65
|
'#<%s %s>' % [self.class, to_s]
|
59
66
|
end
|
@@ -1,16 +1,20 @@
|
|
1
|
+
# @api public
|
1
2
|
module RPicSim
|
2
3
|
# Instances of this class represent the program counter in a
|
3
4
|
# simulated microcontroller.
|
5
|
+
# @api public
|
4
6
|
class ProgramCounter
|
5
7
|
# @param processor [Mplab::Processor]
|
6
8
|
def initialize(processor)
|
7
9
|
@processor = processor
|
8
10
|
end
|
9
11
|
|
12
|
+
# @return [Integer]
|
10
13
|
def value
|
11
14
|
@processor.get_pc
|
12
15
|
end
|
13
16
|
|
17
|
+
# @param val [Integer]
|
14
18
|
def value=(val)
|
15
19
|
@processor.set_pc(val)
|
16
20
|
end
|
data/lib/rpicsim/program_file.rb
CHANGED
@@ -1,19 +1,27 @@
|
|
1
1
|
require_relative 'mplab'
|
2
2
|
require_relative 'label'
|
3
|
-
require_relative 'instruction'
|
4
3
|
require_relative 'symbol_set'
|
5
4
|
|
6
5
|
# TODO: When symbols have the same address, think about how to choose the more
|
7
6
|
# interesting one in a stack trace (fewer underscores?)
|
8
7
|
|
8
|
+
# @api public
|
9
9
|
module RPicSim
|
10
10
|
# Represents a PIC program file (e.g. COF or HEX).
|
11
11
|
# Keeps track of all the symbols loaded from that file and also allows you
|
12
12
|
# to add symbols in various ways.
|
13
|
+
#
|
14
|
+
# @api public
|
13
15
|
class ProgramFile
|
16
|
+
# @return [String]
|
14
17
|
attr_reader :filename
|
18
|
+
|
19
|
+
# The name of the device the file is for (e.g. "PIC10F322").
|
20
|
+
#
|
21
|
+
# @return [String]
|
15
22
|
attr_reader :device
|
16
23
|
|
24
|
+
# @api private
|
17
25
|
attr_reader :address_increment
|
18
26
|
|
19
27
|
# @param filename [String] The path to the program file.
|
@@ -28,8 +36,6 @@ module RPicSim
|
|
28
36
|
@assembly.load_file(filename)
|
29
37
|
@address_increment = @assembly.device_info.code_address_increment
|
30
38
|
|
31
|
-
@instructions = []
|
32
|
-
|
33
39
|
@labels = {}
|
34
40
|
|
35
41
|
@symbol_set = SymbolSet.new
|
@@ -90,6 +96,8 @@ module RPicSim
|
|
90
96
|
#
|
91
97
|
# Warning: This is a persistent hash that will automatically be updated when
|
92
98
|
# new symbols are defined.
|
99
|
+
#
|
100
|
+
# @return [Hash]
|
93
101
|
def symbols
|
94
102
|
@symbol_set.symbols
|
95
103
|
end
|
@@ -100,6 +108,8 @@ module RPicSim
|
|
100
108
|
#
|
101
109
|
# Warning: This is a persistent hash that will automatically be updated when
|
102
110
|
# new symbols are defined.
|
111
|
+
#
|
112
|
+
# @return [Hash]
|
103
113
|
def symbols_in_ram
|
104
114
|
@symbol_set.symbols_in_memory(:ram)
|
105
115
|
end
|
@@ -110,6 +120,8 @@ module RPicSim
|
|
110
120
|
#
|
111
121
|
# Warning: This is a persistent hash that will automatically be updated when
|
112
122
|
# new symbols are defined.
|
123
|
+
#
|
124
|
+
# @return [Hash]
|
113
125
|
def symbols_in_program_memory
|
114
126
|
@symbol_set.symbols_in_memory(:program_memory)
|
115
127
|
end
|
@@ -120,17 +132,21 @@ module RPicSim
|
|
120
132
|
#
|
121
133
|
# Warning: This is a persistent hash that will automatically be updated when
|
122
134
|
# new symbols are defined.
|
135
|
+
#
|
136
|
+
# @return [Hash]
|
123
137
|
def symbols_in_eeprom
|
124
138
|
@symbol_set.symbols_in_memory(:eeprom)
|
125
139
|
end
|
126
140
|
|
127
141
|
# Returns a hash associating program memory label names (as symbols) to their addresses.
|
128
|
-
#
|
142
|
+
#
|
143
|
+
# @return [Hash]
|
129
144
|
attr_reader :labels
|
130
145
|
|
131
146
|
# Returns a {Label} object if a program label by that name is found.
|
132
147
|
# The name is specified in the code that defined the label. If you are using a C compiler,
|
133
148
|
# you will probably need to prefix the name with an underscore.
|
149
|
+
#
|
134
150
|
# @return [Label]
|
135
151
|
def label(name)
|
136
152
|
name = name.to_sym
|
@@ -159,14 +175,6 @@ module RPicSim
|
|
159
175
|
desc
|
160
176
|
end
|
161
177
|
|
162
|
-
# Gets an {Instruction} object representing the PIC instruction at the given
|
163
|
-
# address in program memory.
|
164
|
-
# @param address [Integer]
|
165
|
-
# @return [Instruction]
|
166
|
-
def instruction(address)
|
167
|
-
@instructions[address] ||= make_instruction(address)
|
168
|
-
end
|
169
|
-
|
170
178
|
private
|
171
179
|
|
172
180
|
def message_for_label_not_found(name)
|
@@ -181,10 +189,5 @@ module RPicSim
|
|
181
189
|
end
|
182
190
|
message
|
183
191
|
end
|
184
|
-
|
185
|
-
def make_instruction(address)
|
186
|
-
mplab_instruction = @assembly.disassembler.disassemble(address)
|
187
|
-
Instruction.new(mplab_instruction, address, @address_increment, self)
|
188
|
-
end
|
189
192
|
end
|
190
193
|
end
|