rggen 0.16.0 → 0.17.0
Sign up to get free protection for your applications and to get access to all the features.
- checksums.yaml +4 -4
- data/README.md +35 -2
- data/lib/rggen/version.rb +1 -1
- metadata +8 -8
checksums.yaml
CHANGED
@@ -1,7 +1,7 @@
|
|
1
1
|
---
|
2
2
|
SHA256:
|
3
|
-
metadata.gz:
|
4
|
-
data.tar.gz:
|
3
|
+
metadata.gz: dd38a06acb7dd567dd0620cdf0cac277f5be85cf3eda2976bd94f40b09d2f1bc
|
4
|
+
data.tar.gz: e557922b390055ea15eaaabcf10f27b91c63ab734b8d8fbc294b34edf395e277
|
5
5
|
SHA512:
|
6
|
-
metadata.gz:
|
7
|
-
data.tar.gz:
|
6
|
+
metadata.gz: 1c825e164ce8336075ed7c820fb9ab2c194993dab51402a6458c1cf8906fb690f6ae13daf71b73298685145adc8b59f39566ff68f035907e971d8bb3cedf96ad
|
7
|
+
data.tar.gz: 06fffe85f27326411b39d201f852c4fc7e072d80c833f8da1f2b4d8c54ec6962cc7e4fa3554ce39e71dccf78f382f3eb61b610fe3ce019a027050935e414e9bb
|
data/README.md
CHANGED
@@ -7,7 +7,7 @@
|
|
7
7
|
|
8
8
|
# RgGen
|
9
9
|
|
10
|
-
RgGen is a code generation tool for ASIC/IP/FPGA/RTL engineers. It will automatically generate soruce code related to
|
10
|
+
RgGen is a code generation tool for ASIC/IP/FPGA/RTL engineers. It will automatically generate soruce code related to configuration and status registers (CSR), e.g. SytemVerilog RTL, UVM RAL model, Wiki documents, from human readable register map specifications.
|
11
11
|
|
12
12
|
RgGen has following features:
|
13
13
|
|
@@ -68,6 +68,39 @@ To resolve the above error, there are three solutions. See [this page](https://g
|
|
68
68
|
|
69
69
|
See [Wiki documents](https://github.com/rggen/rggen/wiki).
|
70
70
|
|
71
|
+
## Example
|
72
|
+
|
73
|
+
You can get example configuration file and register map specification listed below:
|
74
|
+
|
75
|
+
* Configuration file
|
76
|
+
* https://github.com/rggen/rggen-sample/blob/master/config.yml
|
77
|
+
* Register map specifications
|
78
|
+
* https://github.com/rggen/rggen-sample/blob/master/block_0.yml
|
79
|
+
* https://github.com/rggen/rggen-sample/blob/master/block_1.yml
|
80
|
+
|
81
|
+
By using these example files, you can try to use RgGen. Hit command below:
|
82
|
+
|
83
|
+
```
|
84
|
+
$ rggen -c config.yml -o out block_0.yml block_1.yml
|
85
|
+
```
|
86
|
+
|
87
|
+
* `-c`
|
88
|
+
* Specify path to your configuration file
|
89
|
+
* `-o`
|
90
|
+
* Specify path to the directory where generated files will be written to
|
91
|
+
|
92
|
+
Then, generated files listed below will be written to `out` directory.
|
93
|
+
|
94
|
+
* SystemVerilog RTL
|
95
|
+
* https://github.com/rggen/rggen-sample/blob/master/block_0.sv
|
96
|
+
* https://github.com/rggen/rggen-sample/blob/master/block_1.sv
|
97
|
+
* UVM RAL model
|
98
|
+
* https://github.com/rggen/rggen-sample/blob/master/block_0_ral_pkg.sv
|
99
|
+
* https://github.com/rggen/rggen-sample/blob/master/block_1_ral_pkg.sv
|
100
|
+
* Markdown document
|
101
|
+
* https://github.com/rggen/rggen-sample/blob/master/block_0.md
|
102
|
+
* https://github.com/rggen/rggen-sample/blob/master/block_1.md
|
103
|
+
|
71
104
|
## Contact
|
72
105
|
|
73
106
|
Feedbacks, bug reports, questions and etc. are wellcome! You can post them by using following ways:
|
@@ -88,7 +121,7 @@ Feedbacks, bug reports, questions and etc. are wellcome! You can post them by us
|
|
88
121
|
|
89
122
|
## Copyright & License
|
90
123
|
|
91
|
-
Copyright © 2019 Taichi Ishitani. RgGen is licensed
|
124
|
+
Copyright © 2019 Taichi Ishitani. RgGen is licensed under the [MIT License](https://opensource.org/licenses/MIT), see [LICENSE](LICENSE) for futher detils.
|
92
125
|
|
93
126
|
## Code of Conduct
|
94
127
|
|
data/lib/rggen/version.rb
CHANGED
metadata
CHANGED
@@ -1,14 +1,14 @@
|
|
1
1
|
--- !ruby/object:Gem::Specification
|
2
2
|
name: rggen
|
3
3
|
version: !ruby/object:Gem::Version
|
4
|
-
version: 0.
|
4
|
+
version: 0.17.0
|
5
5
|
platform: ruby
|
6
6
|
authors:
|
7
7
|
- Taichi Ishitani
|
8
8
|
autorequire:
|
9
9
|
bindir: bin
|
10
10
|
cert_chain: []
|
11
|
-
date: 2019-
|
11
|
+
date: 2019-11-13 00:00:00.000000000 Z
|
12
12
|
dependencies:
|
13
13
|
- !ruby/object:Gem::Dependency
|
14
14
|
name: rggen-core
|
@@ -16,28 +16,28 @@ dependencies:
|
|
16
16
|
requirements:
|
17
17
|
- - "~>"
|
18
18
|
- !ruby/object:Gem::Version
|
19
|
-
version: '0.
|
19
|
+
version: '0.17'
|
20
20
|
type: :runtime
|
21
21
|
prerelease: false
|
22
22
|
version_requirements: !ruby/object:Gem::Requirement
|
23
23
|
requirements:
|
24
24
|
- - "~>"
|
25
25
|
- !ruby/object:Gem::Version
|
26
|
-
version: '0.
|
26
|
+
version: '0.17'
|
27
27
|
- !ruby/object:Gem::Dependency
|
28
28
|
name: rggen-default-register-map
|
29
29
|
requirement: !ruby/object:Gem::Requirement
|
30
30
|
requirements:
|
31
31
|
- - "~>"
|
32
32
|
- !ruby/object:Gem::Version
|
33
|
-
version: '0.
|
33
|
+
version: '0.17'
|
34
34
|
type: :runtime
|
35
35
|
prerelease: false
|
36
36
|
version_requirements: !ruby/object:Gem::Requirement
|
37
37
|
requirements:
|
38
38
|
- - "~>"
|
39
39
|
- !ruby/object:Gem::Version
|
40
|
-
version: '0.
|
40
|
+
version: '0.17'
|
41
41
|
- !ruby/object:Gem::Dependency
|
42
42
|
name: rggen-markdown
|
43
43
|
requirement: !ruby/object:Gem::Requirement
|
@@ -72,14 +72,14 @@ dependencies:
|
|
72
72
|
requirements:
|
73
73
|
- - "~>"
|
74
74
|
- !ruby/object:Gem::Version
|
75
|
-
version: '0.
|
75
|
+
version: '0.17'
|
76
76
|
type: :runtime
|
77
77
|
prerelease: false
|
78
78
|
version_requirements: !ruby/object:Gem::Requirement
|
79
79
|
requirements:
|
80
80
|
- - "~>"
|
81
81
|
- !ruby/object:Gem::Version
|
82
|
-
version: '0.
|
82
|
+
version: '0.17'
|
83
83
|
- !ruby/object:Gem::Dependency
|
84
84
|
name: bundler
|
85
85
|
requirement: !ruby/object:Gem::Requirement
|