origen_testers 0.5.5 → 0.5.6

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data/config/version.rb CHANGED
@@ -1,7 +1,7 @@
1
1
  module OrigenTesters
2
2
  MAJOR = 0
3
3
  MINOR = 5
4
- BUGFIX = 5
4
+ BUGFIX = 6
5
5
  DEV = nil
6
6
 
7
7
  VERSION = [MAJOR, MINOR, BUGFIX].join(".") + (DEV ? ".pre#{DEV}" : '')
@@ -7,6 +7,9 @@ module OrigenTesters
7
7
  attr_accessor :software_version
8
8
  attr_accessor :pattern_compiler_pinmap
9
9
  attr_accessor :memory_test_en
10
+ attr_accessor :testerconfig
11
+ attr_accessor :channelmap
12
+ attr_accessor :max_site
10
13
 
11
14
  # NOTE: DO NOT USE THIS CLASS DIRECTLY ONLY USED AS PARENT FOR
12
15
  # DESIRED TESTER CLASS
@@ -40,12 +43,95 @@ module OrigenTesters
40
43
  @min_pattern_vectors = 0 # no minimum
41
44
 
42
45
  @memory_test_en = false # memory test enabled (for all patterns?)
46
+
47
+ @testerconfig ||= {}
48
+ @channelmap ||= {}
43
49
  end
44
50
 
45
51
  def igxl_based?
46
52
  true
47
53
  end
48
54
 
55
+ def import_tester_config(testconfigname, fullconfigpath)
56
+ # This function reads in CurrentConfig.txt file generated by IG-XL.
57
+ # testconfigname example ==> "FT", "WT", "Production"
58
+ # fullconfigpath example ==> "/product_folder/CurrentConfig.txt"
59
+
60
+ puts "importing Testerconfig #{testconfigname}..."
61
+ slotnum = Struct.new(:slot, :instrument, :idprom)
62
+ @testerconfig[testconfigname] ||= {}
63
+ current_config_file = Pathname.new(fullconfigpath)
64
+ File.open(current_config_file, 'r').each_line do |line|
65
+ if line =~ /^\d*.0/
66
+ (slot, blank1, instrument, blank2, idprom) = line.split(/\t/)
67
+ @testerconfig[testconfigname][slot.split('.').first.to_i] = slotnum.new(slot.split('.').first.to_i, instrument, idprom.chomp)
68
+ end
69
+ end
70
+ end
71
+
72
+ def get_tester_instrument(testconfigname, slot)
73
+ @testerconfig[testconfigname].each_with_index do |element, index|
74
+ if slot.to_s == element[0].to_s
75
+ return element[1][:instrument]
76
+ end
77
+ end
78
+ nil # if no corresponding slot
79
+ end
80
+
81
+ def get_instrument_slots(testconfigname, instrument) # testconfigname example "WT", "FT", "Production"
82
+ @slots = []
83
+ @testerconfig[testconfigname].each_with_index do |element, index|
84
+ if instrument.to_s == element[1][:instrument].to_s
85
+ @slots << element[0].to_i
86
+ end
87
+ end
88
+ @slots # if no corresponding slot
89
+ end
90
+
91
+ def import_chanmap(chanmapname, fullchanmappath)
92
+ # This function reads IG-XL ChannelMap file
93
+ # chanmapname example ==> "FT", "WT", "FTX2"
94
+ # fullchanmappath example ==> "/product_folder/Chans_FT.txt"
95
+
96
+ puts "importing ChannelMap #{fullchanmappath}..."
97
+
98
+ chanassignment = Struct.new(:pinname, :site, :channel, :type, :packagepin)
99
+ chanmap_file = Pathname.new(fullchanmappath)
100
+ @channelmap[chanmapname] ||= {}
101
+ File.open(chanmap_file, 'r').each_line.with_index do |line, index|
102
+ if index == 0
103
+ unless line =~ /DTChanMap/
104
+ puts "#{fullchanmappath} is not a valid IG-XL ChannelMap!"
105
+ break
106
+ end
107
+ end
108
+ if index == 5
109
+ siteloc = line.split(/\t/).size - 2
110
+ @max_site_s = line.split(/\t/)[siteloc].split(/\s/)[1]
111
+ @max_site = @max_site_s.to_i
112
+ (0..@max_site).each do |sitenum|
113
+ @channelmap[chanmapname][sitenum] ||= {}
114
+ end
115
+ end
116
+ if index > 5
117
+ (blank1, pinname, packagepin, type) = line.split(/\t/)
118
+ (0..@max_site).each do |sitenum|
119
+ channel = line.split(/\t/)[4 + sitenum]
120
+ @channelmap[chanmapname][sitenum][pinname] = chanassignment.new(pinname, sitenum, channel.chomp, type, packagepin)
121
+ end
122
+ end
123
+ end
124
+ end
125
+
126
+ def get_tester_channel(chanmapname, pinname, sitenum)
127
+ if sitenum <= @max_site
128
+ @testerchannel = @channelmap[chanmapname][sitenum][pinname].channel
129
+ return @testerchannel
130
+ else
131
+ return nil
132
+ end
133
+ end
134
+
49
135
  def assign_dc_instr_pins(dc_pins)
50
136
  if !dc_pins.is_a?(Array)
51
137
  @dc_pins = [] << dc_pins
@@ -21,11 +21,11 @@ module OrigenTesters
21
21
  add_pin :tdo
22
22
  add_pin :tms
23
23
 
24
- add_reg32 :testme32, 0x007a do
25
- bits 31..16, :portB
26
- bits 15..8, :portA
27
- bits 1, :done
28
- bits 0, :enable
24
+ reg :testme32, 0x007a do |reg|
25
+ reg.bits 31..16, :portB
26
+ reg.bits 15..8, :portA
27
+ reg.bits 1, :done
28
+ reg.bits 0, :enable
29
29
  end
30
30
  @hv_supply_pin = 'VDDHV'
31
31
  @lv_supply_pin = 'VDDLV'
@@ -7,8 +7,8 @@ module OrigenTesters
7
7
  add_pin :reset, reset: :drive_hi, name: 'nvm_reset'
8
8
  add_pin :clk, reset: :drive_hi, name: 'nvm_clk'
9
9
  add_pin :clk_mux, reset: :drive_hi, name: 'nvm_clk_mux'
10
- add_port :porta, reset: :drive_lo, size: 8
11
- add_port :portb, reset: :drive_lo, size: 8, endian: :little
10
+ add_pin :porta, reset: :drive_lo, size: 8
11
+ add_pin :portb, reset: :drive_lo, size: 8, endian: :little
12
12
  add_pin :invoke, reset: :drive_lo, name: 'nvm_invoke'
13
13
  add_pin :done, reset: :expect_hi, name: 'nvm_done'
14
14
  add_pin :fail, reset: :expect_lo, name: 'nvm_fail'
@@ -29,7 +29,7 @@ module OrigenTesters
29
29
  add_pin_alias :pa5, :porta, pin: 5
30
30
  add_pin_alias :pa_lower, :porta, pins: [3..0]
31
31
  add_pin_alias :pa_upper, :porta, pins: [7, 6, 5, 4]
32
- add_port_alias :porta_alias, :porta
32
+ add_pin_alias :porta_alias, :porta
33
33
  end
34
34
 
35
35
  def startup(options)
@@ -212,7 +212,8 @@ module OrigenTesters
212
212
  # Calling this will compress the 2nd group into the 1st if possible
213
213
  def lead_group_finalized?
214
214
  if first_group_present? && second_group_present?
215
- if second_group_is_duplicate_of_first_group? && first_group_repeat != $tester.max_repeat_loop
215
+ if second_group_is_duplicate_of_first_group? && first_group_repeat != $tester.max_repeat_loop &&
216
+ first_group_can_be_compressed?
216
217
  # Consume the second group by incrementing the first group repeat counter
217
218
  self.first_group_repeat = first_group_repeat + second_group_repeat
218
219
  # Delete the second group
@@ -256,6 +257,12 @@ module OrigenTesters
256
257
  second_group.last.repeat = val
257
258
  end
258
259
 
260
+ def first_group_can_be_compressed?
261
+ first_group.all? do |vector|
262
+ !vector.dont_compress
263
+ end
264
+ end
265
+
259
266
  def second_group_is_duplicate_of_first_group?
260
267
  i = -1
261
268
  second_group.all? do |vector|
@@ -14,11 +14,11 @@ Pattern.create(:end_with_halt => true) do
14
14
 
15
15
  ss 'Test that basic port manipulation works'
16
16
  unless $tester.respond_to?('hpt_mode')
17
- $nvm.port(:porta).drive(0x55)
17
+ $nvm.pins(:porta).drive(0x55)
18
18
  $tester.cycle
19
- $nvm.port(:porta).expect(0xAA)
19
+ $nvm.pins(:porta).expect(0xAA)
20
20
  $tester.cycle
21
- $nvm.port(:porta)[1].dont_care
21
+ $nvm.pins(:porta)[1].dont_care
22
22
  $tester.cycle
23
23
  end
24
24
 
@@ -88,17 +88,17 @@ Pattern.create(:end_with_halt => true) do
88
88
  if !$tester.respond_to?('hpt_mode')
89
89
  ss 'Test looping, these vectors should be executed once'
90
90
  $tester.loop_vector('test_loop_1', 1) do
91
- $nvm.port(:porta).drive(0xAA)
91
+ $nvm.pins(:porta).drive(0xAA)
92
92
  $tester.cycle
93
- $nvm.port(:porta).drive(0x55)
93
+ $nvm.pins(:porta).drive(0x55)
94
94
  $tester.cycle
95
95
  end
96
96
 
97
97
  ss 'Test looping, these vectors should be executed 3 times'
98
98
  $tester.loop_vector('test_loop_2', 3) do
99
- $nvm.port(:porta).drive(0xAA)
99
+ $nvm.pins(:porta).drive(0xAA)
100
100
  $tester.cycle
101
- $nvm.port(:porta).drive(0x55)
101
+ $nvm.pins(:porta).drive(0x55)
102
102
  $tester.cycle
103
103
  end
104
104
  else
@@ -14,21 +14,21 @@ Pattern.create do
14
14
 
15
15
  unless $tester.respond_to?('hpt_mode')
16
16
  ss 'Test that the port API works'
17
- $nvm.port(:porta).drive(0x55)
17
+ $nvm.pins(:porta).drive(0x55)
18
18
  $tester.cycle
19
- $nvm.port(:porta).expect(0xAA)
19
+ $nvm.pins(:porta).expect(0xAA)
20
20
  $tester.cycle
21
- $nvm.port(:porta).drive!(0x55)
22
- $nvm.port(:porta).dont_care!
23
- $nvm.port(:porta).drive_hi!
24
- $nvm.port(:porta).drive_very_hi!
25
- $nvm.port(:porta).drive_lo!
26
- $nvm.port(:porta).assert_hi!
27
- $nvm.port(:porta).assert_lo!
28
- $nvm.port(:porta).drive_lo
29
- $nvm.port(:porta)[1].assert(1)
30
- $nvm.port(:porta)[2].assert!(1)
31
- $nvm.port(:porta).drive_lo
21
+ $nvm.pins(:porta).drive!(0x55)
22
+ $nvm.pins(:porta).dont_care!
23
+ $nvm.pins(:porta).drive_hi!
24
+ $nvm.pins(:porta).drive_very_hi!
25
+ $nvm.pins(:porta).drive_lo!
26
+ $nvm.pins(:porta).assert_hi!
27
+ $nvm.pins(:porta).assert_lo!
28
+ $nvm.pins(:porta).drive_lo
29
+ $nvm.pins(:porta)[1].assert(1)
30
+ $nvm.pins(:porta)[2].assert!(1)
31
+ $nvm.pins(:porta).drive_lo
32
32
  end
33
33
 
34
34
  ss 'Test that the store method works'
@@ -107,25 +107,25 @@ Pattern.create do
107
107
  unless $tester.respond_to?('hpt_mode')
108
108
  ss 'Test looping, these vectors should be executed once'
109
109
  $tester.loop_vector('test_loop_1', 1) do
110
- $nvm.port(:porta).drive(0xAA)
110
+ $nvm.pins(:porta).drive(0xAA)
111
111
  $tester.cycle
112
- $nvm.port(:porta).drive(0x55)
112
+ $nvm.pins(:porta).drive(0x55)
113
113
  $tester.cycle
114
114
  end
115
115
 
116
116
  ss 'Test looping, these vectors should be executed 3 times'
117
117
  $tester.loop_vector('test_loop_2', 3) do
118
- $nvm.port(:porta).drive(0xAA)
118
+ $nvm.pins(:porta).drive(0xAA)
119
119
  $tester.cycle
120
- $nvm.port(:porta).drive(0x55)
120
+ $nvm.pins(:porta).drive(0x55)
121
121
  $tester.cycle
122
122
  end
123
123
 
124
124
  ss 'Test looping with label first, these vectors should be executed 3 times'
125
125
  $tester.loop_vector('test_loop_2', 3, false, true) do
126
- $nvm.port(:porta).drive(0xAA)
126
+ $nvm.pins(:porta).drive(0xAA)
127
127
  $tester.cycle
128
- $nvm.port(:porta).drive(0x55)
128
+ $nvm.pins(:porta).drive(0x55)
129
129
  $tester.cycle
130
130
  end
131
131
  end
@@ -179,13 +179,13 @@ Pattern.create do
179
179
 
180
180
  unless $tester.respond_to?('hpt_mode')
181
181
  ss 'Test memory test port states'
182
- $nvm.port(:porta).drive_mem
182
+ $nvm.pins(:porta).drive_mem
183
183
  $tester.cycle
184
- $nvm.port(:porta).drive_mem!
185
- $nvm.port(:porta).expect_mem
184
+ $nvm.pins(:porta).drive_mem!
185
+ $nvm.pins(:porta).expect_mem
186
186
  $tester.cycle
187
- $nvm.port(:porta).expect_mem!
188
- $nvm.port(:porta).drive!(0x0)
187
+ $nvm.pins(:porta).expect_mem!
188
+ $nvm.pins(:porta).drive!(0x0)
189
189
  end
190
190
  end
191
191
 
@@ -199,4 +199,11 @@ Pattern.create do
199
199
  Origen.tester.cycle(:repeat => 60000)
200
200
  Origen.tester.cycle(:repeat => 60000)
201
201
  Origen.tester.cycle(:repeat => 60000)
202
+
203
+ ss 'Test real life case where dont compress was ignored'
204
+ tester.label("my_label_1")
205
+ $nvm.pins(:porta).drive(0x55)
206
+ tester.cycle(dont_compress: true)
207
+ tester.cycle(repeat: 200)
208
+ $nvm.pins(:porta).drive!(0)
202
209
  end
@@ -12,18 +12,18 @@ Pattern.create do
12
12
  end
13
13
 
14
14
  ss "Test that the port API works"
15
- $nvm.port(:porta).drive(0x55)
15
+ $nvm.pins(:porta).drive(0x55)
16
16
  $tester.cycle
17
- $nvm.port(:porta).expect(0xAA)
17
+ $nvm.pins(:porta).expect(0xAA)
18
18
  $tester.cycle
19
- $nvm.port(:porta).drive!(0x55)
20
- $nvm.port(:porta).dont_care!
21
- $nvm.port(:porta).drive_hi!
22
- $nvm.port(:porta).drive_very_hi!
23
- $nvm.port(:porta).drive_lo!
24
- $nvm.port(:porta).assert_hi!
25
- $nvm.port(:porta).assert_lo!
26
- $nvm.port(:porta).drive_lo
19
+ $nvm.pins(:porta).drive!(0x55)
20
+ $nvm.pins(:porta).dont_care!
21
+ $nvm.pins(:porta).drive_hi!
22
+ $nvm.pins(:porta).drive_very_hi!
23
+ $nvm.pins(:porta).drive_lo!
24
+ $nvm.pins(:porta).assert_hi!
25
+ $nvm.pins(:porta).assert_lo!
26
+ $nvm.pins(:porta).drive_lo
27
27
 
28
28
  ss "Test that the store method works"
29
29
  cc "This vector should capture the FAIL pin data"
@@ -34,7 +34,7 @@ Pattern.create do
34
34
  $tester.cycle
35
35
  $tester.cycle
36
36
  $tester.cycle
37
- $tester.store $nvm.pin(:fail), $nvm.port(:porta), :offset => -2
37
+ $tester.store $nvm.pin(:fail), $nvm.pins(:porta), :offset => -2
38
38
  $tester.cycle
39
39
  $tester.store_next_cycle $nvm.pin(:fail)
40
40
  cc "This vector should capture the FAIL pin data"
@@ -74,25 +74,25 @@ Pattern.create do
74
74
 
75
75
  ss "Test looping, these vectors should be executed once"
76
76
  $tester.loop_vector("test_loop_1", 1) do
77
- $nvm.port(:porta).drive(0xAA)
77
+ $nvm.pins(:porta).drive(0xAA)
78
78
  $tester.cycle
79
- $nvm.port(:porta).drive(0x55)
79
+ $nvm.pins(:porta).drive(0x55)
80
80
  $tester.cycle
81
81
  end
82
82
 
83
83
  ss "Test looping, these vectors should be executed 3 times"
84
84
  $tester.loop_vector("test_loop_2", 3) do
85
- $nvm.port(:porta).drive(0xAA)
85
+ $nvm.pins(:porta).drive(0xAA)
86
86
  $tester.cycle
87
- $nvm.port(:porta).drive(0x55)
87
+ $nvm.pins(:porta).drive(0x55)
88
88
  $tester.cycle
89
89
  end
90
90
 
91
91
  ss "Test looping, these vectors should be executed 5 times"
92
92
  $tester.loop_vectors 5 do
93
- $nvm.port(:porta).drive(0xAA)
93
+ $nvm.pins(:porta).drive(0xAA)
94
94
  $tester.cycle
95
- $nvm.port(:porta).drive(0x55)
95
+ $nvm.pins(:porta).drive(0x55)
96
96
  $tester.cycle
97
97
  end
98
98
 
metadata CHANGED
@@ -1,14 +1,14 @@
1
1
  --- !ruby/object:Gem::Specification
2
2
  name: origen_testers
3
3
  version: !ruby/object:Gem::Version
4
- version: 0.5.5
4
+ version: 0.5.6
5
5
  platform: ruby
6
6
  authors:
7
7
  - Stephen McGinty
8
8
  autorequire:
9
9
  bindir: bin
10
10
  cert_chain: []
11
- date: 2015-11-13 00:00:00.000000000 Z
11
+ date: 2016-02-03 00:00:00.000000000 Z
12
12
  dependencies:
13
13
  - !ruby/object:Gem::Dependency
14
14
  name: origen
@@ -42,14 +42,14 @@ dependencies:
42
42
  name: origen_arm_debug
43
43
  requirement: !ruby/object:Gem::Requirement
44
44
  requirements:
45
- - - ">="
45
+ - - '='
46
46
  - !ruby/object:Gem::Version
47
47
  version: 0.4.3
48
48
  type: :development
49
49
  prerelease: false
50
50
  version_requirements: !ruby/object:Gem::Requirement
51
51
  requirements:
52
- - - ">="
52
+ - - '='
53
53
  - !ruby/object:Gem::Version
54
54
  version: 0.4.3
55
55
  - !ruby/object:Gem::Dependency