origen_arm_debug 0.4.1 → 0.4.2

checksums.yaml

@@ -1,7 +1,7 @@
 ---
 SHA1:
-  metadata.gz: dc238d6a6c1968e247feaf3a6b57c4b6222246e8
-  data.tar.gz: 79ee7b36c4af7d4357fa541937b429a9b596525f
+  metadata.gz: cd4a3c91ea754230b8e799d2fdbb6fa5ebce4405
+  data.tar.gz: a4b18c224767fe55666e0366fb11700129165be5
 SHA512:
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-  data.tar.gz: b061fba3f3ccad2c04cc8b94b0ac8b633aea8a25ac3fc2183cec9f802e110c7829c2990edc71e4c298b8066afaec33872230080bf3c32db356e8f5212ef8d7e1
+  metadata.gz: 30e7d8fe43c7668ed2a5e8d0eb5da2e3ba2d2ea1a3a83e77e45e80c25dd98d4e907c03dbef77a6159204a31818ab484e8c5cb740153b1bd0f5107762f3f6cd44
+  data.tar.gz: a15f046b109e8b8778391ca73c1aba2afd84e0020423afd1a6e38feb1931510be99fee52360c51330b460c47b42a0c74e6b62193291a06347dedf45de02777a2

data/config/commands.rb

@@ -24,6 +24,10 @@ when "examples"
   # Pattern generator tests
   ARGV = %w(read_write_reg -t debug -r approved)
   load "#{Origen.top}/lib/origen/commands/generate.rb"
+  ARGV = %w(read_write_reg_jtag -t debug -r approved)
+  load "#{Origen.top}/lib/origen/commands/generate.rb"
+  ARGV = %w(read_write_reg_swd -t debug -r approved)
+  load "#{Origen.top}/lib/origen/commands/generate.rb"
     
   if Origen.app.stats.changed_files == 0 &&
      Origen.app.stats.new_files == 0 &&

data/config/version.rb

@@ -1,7 +1,7 @@
 module OrigenARMDebug
   MAJOR = 0
   MINOR = 4
-  BUGFIX = 1
+  BUGFIX = 2
   DEV = nil
 
   VERSION = [MAJOR, MINOR, BUGFIX].join(".") + (DEV ? ".pre#{DEV}" : '')

data/lib/origen_arm_debug/driver.rb

@@ -16,6 +16,7 @@ module OrigenARMDebug
       @owner = owner
     end
 
+    # Create and/or return the SWJ_DP object with specified protocol 
     def swj_dp
       if owner.respond_to?(:swd)
         @swj_dp ||= SWJ_DP.new(self, :swd)
@@ -30,23 +31,43 @@ module OrigenARMDebug
     end
 
     # Method to add additional Memory Access Ports (MEM-AP) with specified base address
-    # name - short name for mem_ap that is being created
-    # base_address - base address
+    #
+    # @param [Integer] name Short name for mem_ap that is being created
+    # @param [Integer] base_address Base address
+    #
+    # @examples
+    #   arm_debug.add_mem_ap('alt_ahbapi', 0x02000000)
+    #
     def add_mem_ap(name, base_address)
       instance_variable_set("@#{name}", MemAP.new(self, name: name, base_address: base_address))
       self.class.send(:attr_accessor, name)
     end
 
+    # Read from a MEM-AP register
+    #
+    # @param [Integer, Origen::Register::Reg, Origen::Register::BitCollection, Origen::Register::Bit] reg_or_val
+    #   Value to be read. If a reg/bit collection is supplied this can be pre-marked for
+    #   read, store or overlay and which will result in the requested action being applied to
+    #   the cycles corresponding to those bits only (don't care cycles will be generated for the others).
+    # @param [Hash] options Options to customize the operation
     def read_register(reg_or_val, options = {})
       mem_ap.read(reg_or_val.address, size: reg_or_val.size, compare_data: reg_or_val.data)
     end
 
+    # Write data to a MEM-AP register
+    #
+    # @param [Integer, Origen::Register::Reg, Origen::Register::BitCollection, Origen::Register::Bit] reg_or_val
+    #   Value to be written to. If a reg/bit collection is supplied this can be pre-marked for
+    #   read, store or overlay and which will result in the requested action being applied to
+    #   the cycles corresponding to those bits only (don't care cycles will be generated for the others).
+    # @param [Hash] options Options to customize the operation
     def write_register(reg_or_val, options = {})
       mem_ap.write(reg_or_val.address, reg_or_val.data, size: reg_or_val.size)
     end
 
     private
 
+    # Short-cut to protocol driver
     def arm_debug_driver
       return @arm_debug_driver if @arm_debug_driver
       if owner.respond_to?(:jtag)

data/lib/origen_arm_debug/swj_dp.rb

@@ -57,19 +57,6 @@ module OrigenARMDebug
                                      data: { pos: 0, bits: 32 }
     end
 
-    # Method to add additional Memory Access Ports (MEM-AP) with specified base address
-    #
-    # @param [Integer] name Short name for mem_ap that is being created
-    # @param [Integer] base_address Base address
-    #
-    # @examples
-    #   arm_debug.add_mem_ap('alt_ahbapi', 0x02000000)
-    #
-    def add_mem_ap(name, base_address)
-      instance_variable_set("@#{name}", MemAP.new(self, base_address: base_address))
-      self.class.send(:attr_accessor, name)
-    end
-
     #-------------------------------------
     #  DPACC Access API
     #-------------------------------------

data/pattern/read_write_reg.rb

@@ -11,10 +11,8 @@ Pattern.create do
   $dut.read_register($dut.reg(:test))
   $dut.write_register($dut.reg(:test), 0xFF02)
 
-
-  $dut_swd.arm_debug.swj_dp.read_dp("IDCODE");
-  $dut_swd.arm_debug.swj_dp.write_read_dp("CTRL/STAT", 0x50000000, edata: 0xf0000000);
-  $dut_swd.arm_debug.swj_dp.read_ap(0x010000FC);
-  $dut_swd.arm_debug.swj_dp.write_read_ap(0x01000004, 0x10101010);
+  $dut.arm_debug.mem_ap.R(0x10000004, 0x00000000)
+  $dut.arm_debug.mem_ap.W(0x10000004, 0x55555555)
+  $dut.arm_debug.mem_ap.WR(0x10000004, 0x55555555)
 
 end

data/pattern/read_write_reg_jtag.rb

@@ -0,0 +1,10 @@
+Pattern.create do
+
+  $dut_jtag.arm_debug.swj_dp.read_dp("IDCODE")
+  $dut_jtag.arm_debug.swj_dp.read_expect_dp("IDCODE", 0xba5eba11)
+  $dut_jtag.arm_debug.swj_dp.write_read_dp("CTRL/STAT", 0x50000000, edata: 0xf0000000)
+  $dut_jtag.arm_debug.swj_dp.read_ap(0x010000FC)
+  $dut_jtag.arm_debug.swj_dp.write_read_ap(0x01000004, 0x10101010)
+  #$dut_jtag.arm_debug.swj_dp.read_expect_ap(0x01000004, 0x10101010)
+
+end

data/pattern/read_write_reg_swd.rb

@@ -0,0 +1,10 @@
+Pattern.create do
+
+  $dut_swd.arm_debug.swj_dp.read_dp("IDCODE")
+  $dut_swd.arm_debug.swj_dp.read_expect_dp("IDCODE", 0xba5eba11)
+  $dut_swd.arm_debug.swj_dp.write_read_dp("CTRL/STAT", 0x50000000, edata: 0xf0000000)
+  $dut_swd.arm_debug.swj_dp.read_ap(0x010000FC)
+  $dut_swd.arm_debug.swj_dp.write_read_ap(0x01000004, 0x10101010)
+  #$dut_swd.arm_debug.swj_dp.read_expect_ap(0x01000004, 0x10101010)
+
+end

metadata

@@ -1,14 +1,14 @@
 --- !ruby/object:Gem::Specification
 name: origen_arm_debug
 version: !ruby/object:Gem::Version
-  version: 0.4.1
+  version: 0.4.2
 platform: ruby
 authors:
 - Ronnie Lajaunie
 autorequire: 
 bindir: bin
 cert_chain: []
-date: 2015-08-25 00:00:00.000000000 Z
+date: 2015-08-27 00:00:00.000000000 Z
 dependencies:
 - !ruby/object:Gem::Dependency
   name: origen
@@ -87,6 +87,8 @@ files:
 - lib/origen_arm_debug/mem_ap.rb
 - lib/origen_arm_debug/swj_dp.rb
 - pattern/read_write_reg.rb
+- pattern/read_write_reg_jtag.rb
+- pattern/read_write_reg_swd.rb
 - templates/web/index.md.erb
 - templates/web/layouts/_basic.html.erb
 - templates/web/partials/_navbar.html.erb