metasm 1.0.0 → 1.0.1

data/lib/metasm/ia32/decode.rb

@@ -194,6 +194,7 @@ class Ia32
 			when :reg;    Reg.new     field_val[a], opsz
 			when :eeec;   CtrlReg.new field_val[a]
 			when :eeed;   DbgReg.new  field_val[a]
+			when :eeet;   TstReg.new  field_val[a]
 			when :seg2, :seg2A, :seg3, :seg3A; SegReg.new field_val[a]
 			when :regfp;  FpReg.new   field_val[a]
 			when :regmmx; SimdReg.new field_val[a], mmxsz

data/lib/metasm/ia32/decompile.rb

@@ -290,7 +290,7 @@ class Ia32
 					# mov cr0 etc
 					a1, a2 = di.instruction.args
 					case a1
-					when Ia32::CtrlReg, Ia32::DbgReg, Ia32::SegReg
+					when Ia32::CtrlReg, Ia32::DbgReg, Ia32::TstReg, Ia32::SegReg
 						sz = a1.kind_of?(Ia32::SegReg) ? 16 : 32
 						if not dcmp.c_parser.toplevel.symbol["intrinsic_set_#{a1}"]
 							dcmp.c_parser.parse("void intrinsic_set_#{a1}(__int#{sz});")
@@ -302,7 +302,7 @@ class Ia32
 						next
 					end
 					case a2
-					when Ia32::CtrlReg, Ia32::DbgReg, Ia32::SegReg
+					when Ia32::CtrlReg, Ia32::DbgReg, Ia32::TstReg, Ia32::SegReg
 						if not dcmp.c_parser.toplevel.symbol["intrinsic_get_#{a2}"]
 							sz = a2.kind_of?(Ia32::SegReg) ? 16 : 32
 							dcmp.c_parser.parse("__int#{sz} intrinsic_get_#{a2}(void);")

data/lib/metasm/ia32/encode.rb

@@ -240,7 +240,7 @@ class Ia32
 		postponed = []
 		oi.each { |oa, ia|
 			case oa
-			when :reg, :seg3, :seg3A, :seg2, :seg2A, :eeec, :eeed, :regfp, :regmmx, :regxmm
+			when :reg, :seg3, :seg3A, :seg2, :seg2A, :eeec, :eeed, :eeet, :regfp, :regmmx, :regxmm
 				# field arg
 				set_field[oa, ia.val]
 				pfx << 0x66 if oa == :regmmx and op.props[:xmmx] and ia.sz == 128

data/lib/metasm/ia32/main.rb

@@ -78,6 +78,11 @@ class Ia32 < CPU
 		simple_map((0..7).map { |i| [i, "cr#{i}"] })
 	end
 
+	# test registers (tr0..tr7) (undocumented)
+	class TstReg < Argument
+		simple_map((0..7).map { |i| [i, "tr#{i}"] })
+	end
+
 	# floating point registers
 	class FpReg < Argument
 		simple_map((0..7).map { |i| [i, "ST(#{i})"] } << [nil, 'ST'])

data/lib/metasm/ia32/opcodes.rb

@@ -11,14 +11,14 @@ class Ia32
 	def init_cpu_constants
 		@opcode_list ||= []
 		@fields_mask.update :w => 1, :s => 1, :d => 1, :modrm => 0xc7,
-			:reg => 7, :eeec => 7, :eeed => 7, :seg2 => 3, :seg3 => 7,
+			:reg => 7, :eeec => 7, :eeed => 7, :eeet => 7, :seg2 => 3, :seg3 => 7,
 			:regfp => 7, :regmmx => 7, :regxmm => 7
 		@fields_mask[:seg2A]    = @fields_mask[:seg2]
 		@fields_mask[:seg3A]    = @fields_mask[:seg3]
 		@fields_mask[:modrmA]   = @fields_mask[:modrm]
 
 		@valid_args.concat [:i, :i8, :u8, :u16, :reg, :seg2, :seg2A,
-			:seg3, :seg3A, :eeec, :eeed, :modrm, :modrmA, :mrm_imm,
+			:seg3, :seg3A, :eeec, :eeed, :eeet, :modrm, :modrmA, :mrm_imm,
 			:farptr, :imm_val1, :imm_val3, :reg_cl, :reg_eax,
 			:reg_dx, :regfp, :regfp0, :modrmmmx, :regmmx,
 			:modrmxmm, :regxmm] - @valid_args
@@ -177,6 +177,7 @@ class Ia32
 		addop 'ltr',   [0x0F, 0x00], 3
 		addop('mov',   [0x0F, 0x20, 0xC0], :reg, {:d => [1, 1], :eeec => [2, 3]}, :eeec) { |op| op.args.reverse! }
 		addop('mov',   [0x0F, 0x21, 0xC0], :reg, {:d => [1, 1], :eeed => [2, 3]}, :eeed) { |op| op.args.reverse! }
+		addop('mov',   [0x0F, 0x24, 0xC0], :reg, {:d => [1, 1], :eeet => [2, 3]}, :eeet) { |op| op.args.reverse! }
 		addop('mov',   [0x8C], 0,    {:d => [0, 1], :seg3 => [1, 3]}, :seg3) { |op| op.args.reverse! }
 		addop 'out',   [0xE6], nil,  {:w => [0, 0]}, :u8, :reg_eax
 		addop 'out',   [0xE6], nil,  {:w => [0, 0]}, :reg_eax, :u8

data/lib/metasm/ia32/parse.rb

@@ -167,7 +167,7 @@ end
 	end
 
 	def parse_argregclasslist
-		[Reg, SimdReg, SegReg, DbgReg, CtrlReg, FpReg]
+		[Reg, SimdReg, SegReg, DbgReg, TstReg, CtrlReg, FpReg]
 	end
 	def parse_modrm(lex, tok, cpu)
 		ModRM.parse(lex, tok, cpu)
@@ -267,6 +267,7 @@ end
 		when :seg2A;    arg.kind_of? SegReg  and arg.val < 4 and arg.val != 1
 		when :eeec;     arg.kind_of? CtrlReg
 		when :eeed;     arg.kind_of? DbgReg
+		when :eeet;     arg.kind_of? TstReg
 		when :modrmA;   arg.kind_of? ModRM
 		when :mrm_imm;  arg.kind_of? ModRM   and not arg.s and not arg.i and not arg.b
 		when :farptr;   arg.kind_of? Farptr

data/lib/metasm/ia32/render.rb

@@ -14,7 +14,7 @@ class Ia32
 		include Renderable
 	end
 
-	[SegReg, DbgReg, CtrlReg, FpReg].each { |c| c.class_eval {
+	[SegReg, DbgReg, TstReg, CtrlReg, FpReg].each { |c| c.class_eval {
 		def render ; [self.class.i_to_s[@val]] end
 	} }
 	[Reg, SimdReg].each { |c| c.class_eval {

data/lib/metasm/x86_64/decode.rb

@@ -112,6 +112,7 @@ class X86_64
 			when :reg;    Reg.new     field_val_r[a], opsz
 			when :eeec;   CtrlReg.new field_val_r[a]
 			when :eeed;   DbgReg.new  field_val_r[a]
+			when :eeet;   TstReg.new  field_val_r[a]
 			when :seg2, :seg2A, :seg3, :seg3A; SegReg.new field_val[a]
 			when :regmmx; SimdReg.new field_val_r[a], mmxsz
 			when :regxmm; SimdReg.new field_val_r[a], 128

data/lib/metasm/x86_64/encode.rb

@@ -172,7 +172,7 @@ class X86_64
 				else
 					rex_b = ia.val_rex
 				end
-			when :seg3, :seg3A, :seg2, :seg2A, :eeec, :eeed, :regfp, :regxmm, :regmmx
+			when :seg3, :seg3A, :seg2, :seg2A, :eeec, :eeed, :eeet, :regfp, :regxmm, :regmmx
 				set_field[oa, ia.val & 7]
 				rex_r = 1 if ia.val > 7
 				pfx << 0x66 if oa == :regmmx and op.props[:xmmx] and ia.sz == 128

data/lib/metasm/x86_64/main.rb

@@ -94,6 +94,10 @@ class X86_64 < Ia32
 		simple_map((0..15).map { |i| [i, "cr#{i}"] })
 	end
 
+	class TstReg < Ia32::TstReg
+		simple_map((0..15).map { |i| [i, "tr#{i}"] })
+	end
+
 	# Create a new instance of an X86 cpu
 	# arguments (any order)
 	# - instruction set (386, 486, sse2...) [latest]

data/lib/metasm/x86_64/parse.rb

@@ -29,7 +29,7 @@ class X86_64
 
 	# needed due to how ruby inheritance works wrt constants
 	def parse_argregclasslist
-		[Reg, SimdReg, SegReg, DbgReg, CtrlReg, FpReg]
+		[Reg, SimdReg, SegReg, DbgReg, TstReg, CtrlReg, FpReg]
 	end
 	# same inheritance sh*t
 	def parse_modrm(lex, tok, cpu)

metadata

@@ -1,13 +1,13 @@
 --- !ruby/object:Gem::Specification 
 name: metasm
 version: !ruby/object:Gem::Version 
-  hash: 23
+  hash: 21
   prerelease: 
   segments: 
   - 1
   - 0
-  - 0
-  version: 1.0.0
+  - 1
+  version: 1.0.1
 platform: ruby
 authors: 
 - Yoann Guillot
@@ -15,7 +15,7 @@ autorequire:
 bindir: bin
 cert_chain: []
 
-date: 2011-04-26 00:00:00 Z
+date: 2011-04-30 00:00:00 Z
 dependencies: []
 
 description: Metasm is a cross-architecture assembler, disassembler, compiler, linker and debugger in pure Ruby with no dependencies.