logicuit 0.1.3 → 0.1.4

checksums.yaml

@@ -1,7 +1,7 @@
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data/README.md

@@ -21,48 +21,47 @@ gem install logicuit
 This is the code to create a 1-bit CPU:
 
 ```
-require "logicuit"
-
-# 1 bit CPU
-#
-#  +-(Y)-|NOT|-(A)-+
-#  |               |
-#  +-(D)-|   |-(Q)-+
-#        |DFF|
-#   (CK)-|>  |
-#
-class OneBitCpu
-  def initialize
-    @dff = Logicuit::Circuits::Sequential::DFlipFlop.new
-    @not = Logicuit::Gates::Not.new
-    @dff.q >> @not.a
-    @not.y >> @dff.d
-  end
-
-  def to_s
-    <<~CIRCUIT
-      +-(#{@not.y})-|NOT|-(#{@not.a})-+
-      |               |
-      +-(#{@dff.d})-|   |-(#{@dff.q})-+
-            |DFF|
-       (CK)-|>  |
-    CIRCUIT
-  end
-end
+require 'logicuit'
+
+class Multiplexer2To1 < Logicuit::Base
+  tag :MY_MUX
+
+  diagram <<~DIAGRAM
+    (C0)---------|
+                 |AND|--+
+         +-|NOT|-|      +--|
+         |                 |OR|--(Y)
+    (C1)---------|      +--|
+         |       |AND|--+
+    (A)--+-------|
+  DIAGRAM
+
+  define_inputs :c0, :c1, :a
 
-obc = OneBitCpu.new
-loop do
-  system("clear")
-  puts obc
-  sleep 1
-  Logicuit::Signals::Clock.tick
+  define_outputs y: ->(c0, c1, a) { (c0 && !a) || (c1 && a) }
 end
+
+Logicuit.run(:MY_MUX)
 ```
 
-you can execute the following as a one-liner:
+you can execute a same circuit by the following as a one-liner:
+
+```
+$ ruby -r ./lib/logicuit -e 'Logicuit.run(:mux)'
+```
+
+you can similarly execute other circuits with the following commands:
+
+```
+$ ruby -r ./lib/logicuit -e 'Logicuit.run(:mux)'
+```
+
+```
+$ ruby -r ./lib/logicuit -e 'Logicuit.run(:dff)'
+```
 
 ```
-$ ruby -r logicuit -e 'Logicuit::Circuits::SystemLevel::OneBitCpu.run'
+$ ruby -r ./lib/logicuit -e 'Logicuit.run(:one_bit_cpu)'
 ```
 
 ## Development

data/lib/logicuit/base.rb

@@ -1,51 +1,68 @@
 # frozen_string_literal: true
 
+# Logicuit module
 module Logicuit
   # base class for all gates and circuits
-  class Base
+  class Base # rubocop:disable Metrics/ClassLength
+    def self.tag(*tags)
+      tags.each do |tag|
+        registry[tag] = self
+      end
+    end
+
+    @@registry = {} # rubocop:disable Style/ClassVars
+
+    def self.registry
+      @@registry
+    end
+
     def initialize(*args)
       @input_targets = []
       @output_targets = []
-      define_inputs(*args)
-      define_outputs
-      evaluate
+      @clock = false
+      define_inputs(*args) if respond_to?(:define_inputs)
+      define_outputs if respond_to?(:define_outputs)
+      assembling if respond_to?(:assembling)
+      evaluate if respond_to?(:evaluate)
     end
 
-    attr_reader :input_targets, :output_targets
+    attr_reader :input_targets, :output_targets, :clock
 
-    def self.define_inputs(*inputs) # rubocop:disable Metrics/MethodLength
-      inputs.each do |input|
+    def self.define_inputs(*args, **kwargs) # rubocop:disable Metrics/MethodLength,Metrics/AbcSize
+      args.each do |input|
         define_method(input) do
           instance_variable_get("@#{input}")
         end
       end
 
-      define_method(:define_inputs) do |*args|
-        inputs.each_with_index do |input, index|
-          signal = Signals::Signal.new(args[index] == 1)
-          signal.on_change << self
+      define_method(:define_inputs) do |*instance_method_args|
+        instance_variable_set("@clock", true) if kwargs&.key?(:clock)
+        args.each_with_index do |input, index|
+          signal = Signals::Signal.new(instance_method_args[index] == 1)
+          signal.on_change << self unless clock
           instance_variable_set("@#{input}", signal)
           @input_targets << input
         end
+        Signals::Clock.on_tick << self if clock
       end
     end
 
-    def self.define_outputs(**outputs) # rubocop:disable Metrics/MethodLength,Metrics/AbcSize
-      outputs.each_key do |output|
+    def self.define_outputs(*args, **kwargs) # rubocop:disable Metrics/MethodLength,Metrics/AbcSize
+      (args + kwargs.keys).each do |output|
         define_method(output) do
           instance_variable_get("@#{output}")
         end
       end
 
       define_method(:define_outputs) do
-        outputs.each_key do |output|
+        (args + kwargs.keys).each do |output|
           instance_variable_set("@#{output}", Signals::Signal.new(false))
           @output_targets << output
         end
       end
 
       define_method(:evaluate) do
-        outputs.each do |output, evaluator|
+        kwargs.each do |output, evaluator|
           signal = instance_variable_get("@#{output}")
           if evaluator.call(*@input_targets.map do |input|
             instance_variable_get("@#{input}").current
@@ -58,6 +75,12 @@ module Logicuit
       end
     end
 
+    def self.assembling
+      define_method(:assembling) do
+        yield(*(@input_targets + @output_targets).map { |target| instance_variable_get("@#{target}") })
+      end
+    end
+
     def self.diagram(source)
       define_method(:to_s) do
         (@input_targets + @output_targets).reduce(source) do |result, input|
@@ -74,6 +97,8 @@ module Logicuit
         table = rows.map do |row|
           row.split("|").map(&:strip).reject(&:empty?).map(&:downcase).map do |v|
             case v
+            when "^"
+              :clock
             when "x"
               :any
             when "1"
@@ -107,4 +132,41 @@ module Logicuit
       end
     end
   end
+
+  def self.run(sym) # rubocop:disable Metrics/AbcSize,Metrics/MethodLength,Metrics/PerceivedComplexity
+    circuit = Base.registry[sym.upcase.to_sym].new
+
+    render = lambda {
+      system("clear")
+      puts circuit
+      puts
+      puts "tick: #{Signals::Clock.tick_count}" if circuit.clock
+      puts "input: #{circuit.input_targets.join ","}?" if circuit.input_targets.any?
+    }
+
+    if circuit.clock
+      Thread.new do
+        loop do
+          render.call
+          sleep 1
+          Signals::Clock.tick
+        end
+      end
+    else
+      render.call
+    end
+
+    while (input = gets)
+      key = input.chomp.to_sym
+      next unless circuit.respond_to? key
+
+      signal = circuit.send(key)
+      if signal.current
+        signal.off
+      else
+        signal.on
+      end
+      render.call
+    end
+  end
 end

data/lib/logicuit/circuits/combinational/half_adder.rb

@@ -1,3 +1,48 @@
 # frozen_string_literal: true
 
-# TODO: implement the HalfAdder class
+module Logicuit
+  module Circuits
+    module Combinational
+      # HalfAdder class
+      class HalfAdder < Base
+        tag :HADD
+
+        diagram <<~DIAGRAM
+          (A)---+-|
+                | |XOR|-(S)
+          (B)-+---+
+              | |
+              | +-|
+              |   |AND|-(C)
+              +---|
+        DIAGRAM
+
+        define_inputs :a, :b
+
+        define_outputs :c, :s
+
+        assembling do |a, b, c, s|
+          xor_gate = Gates::Xor.new
+          and_gate = Gates::And.new
+
+          a >> xor_gate.a
+          b >> xor_gate.b
+          xor_gate.y >> s
+
+          a >> and_gate.a
+          b >> and_gate.b
+          and_gate.y >> c
+        end
+
+        truth_table <<~TRUTH_TABLE
+          | A | B | C | S |
+          | - | - | - | - |
+          | 0 | 0 | 0 | 0 |
+          | 0 | 1 | 0 | 1 |
+          | 1 | 0 | 0 | 1 |
+          | 1 | 1 | 1 | 0 |
+        TRUTH_TABLE
+      end
+    end
+  end
+end

data/lib/logicuit/circuits/combinational/multiplexer2to1.rb

@@ -5,11 +5,7 @@ module Logicuit
     module Combinational
       # A Multiplexer with 2 inputs and 1 output
       class Multiplexer2To1 < Base
-        define_inputs :c0, :c1, :a
-
-        define_outputs y: lambda { |c0, c1, a|
-          (c0 && !a) || (c1 && a)
-        }
+        tag :MUX, :MUX2, :MUX2to1
 
         diagram <<~DIAGRAM
           (C0)---------|
@@ -21,6 +17,10 @@ module Logicuit
           (A)--+-------|
         DIAGRAM
 
+        define_inputs :c0, :c1, :a
+
+        define_outputs y: ->(c0, c1, a) { (c0 && !a) || (c1 && a) }
+
         truth_table <<~TRUTH_TABLE
           | C0 | C1 | A | Y |
           | -- | -- | - | - |

data/lib/logicuit/circuits/combinational/multiplexer4to1.rb

@@ -5,11 +5,7 @@ module Logicuit
     module Combinational
       # A Multiplexer with 4 inputs and 1 output
       class Multiplexer4To1 < Base
-        define_inputs :c0, :c1, :c2, :c3, :b, :a
-
-        define_outputs y: lambda { |c0, c1, c2, c3, b, a|
-          (c0 && !b && !a) || (c1 && !b && a) || (c2 && b && !a) || (c3 && b && a)
-        }
+        tag :MUX4, :MUX4TO1
 
         diagram <<~DIAGRAM
           (C0)---------------|
@@ -33,6 +29,12 @@ module Logicuit
           (A)----+-|NOT|---+
         DIAGRAM
 
+        define_inputs :c0, :c1, :c2, :c3, :b, :a
+
+        define_outputs y: lambda { |c0, c1, c2, c3, b, a|
+          (c0 && !b && !a) || (c1 && !b && a) || (c2 && b && !a) || (c3 && b && a)
+        }
+
         truth_table <<~TRUTH_TABLE
           | B | A | C0 | C1 | C2 | C3 | Y |
           | - | - | -- | -- | -- | -- | - |

data/lib/logicuit/circuits/sequential/d_flip_flop.rb

@@ -4,38 +4,25 @@ module Logicuit
   module Circuits
     module Sequential
       # D Flip-Flop
-      #
-      # (D)--|   |--(Q)
-      #      |DFF|
-      # (CK)-|>  |
-      #
-      class DFlipFlop
-        def initialize(d = 0) # rubocop:disable Naming/MethodParameterName
-          Signals::Clock.on_tick << self
+      class DFlipFlop < Base
+        tag :DFF
 
-          @d = d.is_a?(Signals::Signal) ? d : Signals::Signal.new(d == 1)
+        diagram <<~DIAGRAM
+          (D)--|   |--(Q)
+               |DFF|
+          (CK)-|>  |
+        DIAGRAM
 
-          @q = Signals::Signal.new(false)
-          evaluate
-        end
+        define_inputs :d, clock: :ck
 
-        attr_reader :d, :q
+        define_outputs q: ->(d) { d }
 
-        def evaluate
-          if d.current
-            q.on
-          else
-            q.off
-          end
-        end
-
-        def to_s
-          <<~CIRCUIT
-            (#{d})--|   |--(#{q})
-                 |DFF|
-            (CK)-|>  |
-          CIRCUIT
-        end
+        truth_table <<~TRUTH_TABLE
+          | CK | D | Q |
+          | -- | - | - |
+          |  ^ | 0 | 0 |
+          |  ^ | 1 | 1 |
+        TRUTH_TABLE
       end
     end
   end

data/lib/logicuit/circuits/system_level/one_bit_cpu.rb

@@ -4,40 +4,37 @@ module Logicuit
   module Circuits
     module SystemLevel
       # 1 bit CPU
-      #
-      #  +-(Y)-|NOT|-(A)-+
-      #  |               |
-      #  +-(D)-|   |-(Q)-+
-      #        |DFF|
-      #   (CK)-|>  |
-      #
-      class OneBitCpu
-        def initialize
-          @dff = Sequential::DFlipFlop.new
-          @not = Gates::Not.new
-          @dff.q >> @not.a
-          @not.y >> @dff.d
-        end
+      class OneBitCpu < Base
+        tag :ONE_BIT_CPU
 
-        def to_s
-          <<~CIRCUIT
-            +-(#{@not.y})-|NOT|-(#{@not.a})-+
-            |               |
-            +-(#{@dff.d})-|   |-(#{@dff.q})-+
+        diagram <<~DIAGRAM
+          +-------------+
+          |             |
+          +-|NOT|-|   |-+-(Y)
                   |DFF|
              (CK)-|>  |
-          CIRCUIT
-        end
+        DIAGRAM
+
+        define_inputs clock: :ck
+
+        define_outputs :y
 
-        def self.run
-          obc = new
-          loop do
-            system("clear")
-            puts obc
-            sleep 1
-            Signals::Clock.tick
-          end
+        assembling do |y|
+          dff = Sequential::DFlipFlop.new
+          not_gate = Gates::Not.new
+
+          dff.q >> not_gate.a
+          not_gate.y >> dff.d
+
+          dff.q >> y
         end
+
+        truth_table <<~TRUTH_TABLE
+          | CK | prev Y | Y |
+          | -- | ------ | - |
+          |  ^ |      0 | 1 |
+          |  ^ |      1 | 0 |
+        TRUTH_TABLE
       end
     end
   end

data/lib/logicuit/gates/and.rb

@@ -4,9 +4,7 @@ module Logicuit
   module Gates
     # AND gate
     class And < Base
-      define_inputs :a, :b
-
-      define_outputs y: ->(a, b) { a && b }
+      tag :AND
 
       diagram <<~DIAGRAM
         (A)-|
@@ -14,6 +12,10 @@ module Logicuit
         (B)-|
       DIAGRAM
 
+      define_inputs :a, :b
+
+      define_outputs y: ->(a, b) { a && b }
+
       truth_table <<~TRUTH_TABLE
         | A | B | Y |
         | - | - | - |

data/lib/logicuit/gates/nand.rb

@@ -4,9 +4,7 @@ module Logicuit
   module Gates
     # NAND gate
     class Nand < Base
-      define_inputs :a, :b
-
-      define_outputs y: ->(a, b) { !(a && b) }
+      tag :NAND
 
       diagram <<~DIAGRAM
         (A)-|
@@ -14,6 +12,10 @@ module Logicuit
         (B)-|
       DIAGRAM
 
+      define_inputs :a, :b
+
+      define_outputs y: ->(a, b) { !(a && b) }
+
       truth_table <<~TRUTH_TABLE
         | A | B | Y |
         | - | - | - |

data/lib/logicuit/gates/not.rb

@@ -4,14 +4,16 @@ module Logicuit
   module Gates
     # NOT gate
     class Not < Base
-      define_inputs :a
-
-      define_outputs y: ->(a) { !a } # rubocop:disable Style/SymbolProc
+      tag :NOT
 
       diagram <<~DIAGRAM
         (A)-|NOT|-(Y)
       DIAGRAM
 
+      define_inputs :a
+
+      define_outputs y: ->(a) { !a } # rubocop:disable Style/SymbolProc
+
       truth_table <<~TRUTH_TABLE
         | A | Y |
         | - | - |

data/lib/logicuit/gates/or.rb

@@ -4,9 +4,7 @@ module Logicuit
   module Gates
     # OR gate
     class Or < Base
-      define_inputs :a, :b
-
-      define_outputs y: ->(a, b) { a || b }
+      tag :OR
 
       diagram <<~DIAGRAM
         (A)-|
@@ -14,6 +12,10 @@ module Logicuit
         (B)-|
       DIAGRAM
 
+      define_inputs :a, :b
+
+      define_outputs y: ->(a, b) { a || b }
+
       truth_table <<~TRUTH_TABLE
         | A | B | Y |
         | - | - | - |

data/lib/logicuit/gates/xor.rb

@@ -4,9 +4,7 @@ module Logicuit
   module Gates
     # XOR gate
     class Xor < Base
-      define_inputs :a, :b
-
-      define_outputs y: ->(a, b) { (a && !b) || (!a && b) }
+      tag :XOR
 
       diagram <<~DIAGRAM
         (A)-|
@@ -14,6 +12,10 @@ module Logicuit
         (B)-|
       DIAGRAM
 
+      define_inputs :a, :b
+
+      define_outputs y: ->(a, b) { (a && !b) || (!a && b) }
+
       truth_table <<~TRUTH_TABLE
         | A | B | Y |
         | - | - | - |

data/lib/logicuit/signals/clock.rb

@@ -6,11 +6,13 @@ module Logicuit
     class Clock
       def initialize
         @on_tick = []
+        @tick_count = 0
       end
 
-      attr_reader :on_tick
+      attr_reader :on_tick, :tick_count
 
       def tick
+        @tick_count += 1
         @on_tick.each(&:evaluate)
       end
 
@@ -25,6 +27,10 @@ module Logicuit
       def self.tick
         instance.tick
       end
+
+      def self.tick_count
+        instance.tick_count
+      end
     end
   end
 end

data/lib/logicuit/version.rb

@@ -1,5 +1,5 @@
 # frozen_string_literal: true
 
 module Logicuit
-  VERSION = "0.1.3"
+  VERSION = "0.1.4"
 end

data/lib/logicuit.rb

@@ -12,4 +12,5 @@ require_relative "logicuit/signals/clock"
 require_relative "logicuit/circuits/sequential/d_flip_flop"
 require_relative "logicuit/circuits/combinational/multiplexer2to1"
 require_relative "logicuit/circuits/combinational/multiplexer4to1"
+require_relative "logicuit/circuits/combinational/half_adder"
 require_relative "logicuit/circuits/system_level/one_bit_cpu"

metadata

@@ -1,13 +1,13 @@
 --- !ruby/object:Gem::Specification
 name: logicuit
 version: !ruby/object:Gem::Version
-  version: 0.1.3
+  version: 0.1.4
 platform: ruby
 authors:
 - Koji NAKAMURA
 bindir: exe
 cert_chain: []
-date: 2025-03-12 00:00:00.000000000 Z
+date: 2025-03-15 00:00:00.000000000 Z
 dependencies: []
 description: logi(c cir)cuit -> logicuit
 email: