circuits 0.11.3 → 0.12.0
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checksums.yaml
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!binary "U0hBMQ==":
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metadata.gz: !binary |-
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SHA512:
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metadata.gz: !binary |-
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@@ -43,8 +43,8 @@ module Circuits
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end
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def link_or_gate(sub_components)
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-
sub_components[:or_gate].a.set sub_components[:half_adder_carry].
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-
sub_components[:or_gate].b.set sub_components[:half_adder_in].
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sub_components[:or_gate].a.set sub_components[:half_adder_carry].c_out
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sub_components[:or_gate].b.set sub_components[:half_adder_in].c_out
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end
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def link_outputs(sub_components)
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@@ -10,7 +10,7 @@ module Circuits
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and_gate = And.new
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xor_gate = Xor.new
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super(inputs: 2,
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outputs: [:s, :
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outputs: [:s, :c_out],
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sub_components: [and_gate, xor_gate],
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ticks: 1)
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link_internals and_gate, xor_gate
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@@ -28,7 +28,7 @@ module Circuits
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def link_outputs(and_gate, xor_gate)
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s.set xor_gate.out
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c_out.set and_gate.out
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end
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end
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end
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data/lib/circuits/version.rb
CHANGED
@@ -12,7 +12,7 @@ describe Circuits::Component::HalfAdder do
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subject.tick
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subject.tock
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expect(subject.s.get).to eq false
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expect(subject.
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expect(subject.c_out.get).to eq false
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end
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end
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@@ -23,7 +23,7 @@ describe Circuits::Component::HalfAdder do
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subject.tick
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subject.tock
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expect(subject.s.get).to eq true
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expect(subject.
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expect(subject.c_out.get).to eq false
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end
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end
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@@ -34,7 +34,7 @@ describe Circuits::Component::HalfAdder do
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subject.tick
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subject.tock
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expect(subject.s.get).to eq true
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expect(subject.
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expect(subject.c_out.get).to eq false
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end
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end
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@@ -45,7 +45,7 @@ describe Circuits::Component::HalfAdder do
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subject.tick
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subject.tock
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expect(subject.s.get).to eq false
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expect(subject.
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expect(subject.c_out.get).to eq true
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end
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end
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end
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