circuits 0.10.0 → 0.11.0

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checksums.yaml CHANGED
@@ -1,15 +1,15 @@
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@@ -4,20 +4,15 @@ module Circuits
4
4
  module Component
5
5
  # Logical AND Operator
6
6
  class And < Base
7
+ def initialize(opts = {})
8
+ inputs = opts[:inputs] || 2
9
+ super(inputs: inputs, outputs: 1)
10
+ end
11
+
7
12
  # Sets the output to be the result of a logical AND of the inputs
8
13
  def tick
9
14
  self[:out].set(inputs.map(&:get).inject(:&))
10
15
  end
11
-
12
- private
13
-
14
- def default_input_count
15
- 2
16
- end
17
-
18
- def default_output_count
19
- 1
20
- end
21
16
  end
22
17
  end
23
18
  end
@@ -10,15 +10,17 @@ module Circuits
10
10
  class Base
11
11
  # Creates the Component with inputs and outputs
12
12
  # @param opts [Hash] options to create the Component with
13
- # @option opts [FixNum] :input_count The number of inputs
14
- # @option opts [FixNum] :ouput_count The number of outputs
13
+ # @option opts [FixNum, Array<Symbol>] :inputs The number of inputs or an
14
+ # array of their names
15
+ # @option opts [FixNum, Array<Symbol>] :ouputs The number of outputs or an
16
+ # array of their names
15
17
  # @option opts [Hash] :port_mappings The port_mappings to use
16
18
  def initialize(opts = {})
17
- input_count = opts[:input_count] || default_input_count
18
- output_count = opts[:output_count] || default_output_count
19
- @inputs = input_count.times.collect { Circuits::Terminal::Input.new }
20
- @outputs = output_count.times.collect { Circuits::Terminal::Output.new }
21
- @port_mappings = opts[:port_mappings] || default_port_mappings
19
+ @inputs = create_inputs opts[:inputs]
20
+ @outputs = create_outputs opts[:outputs]
21
+ @port_mappings = create_port_mappings opts
22
+ @sub_components = opts[:sub_components] || []
23
+ @ticks = opts[:ticks] || 0
22
24
  end
23
25
 
24
26
  # the inputs of this component
@@ -36,6 +38,14 @@ module Circuits
36
38
  res
37
39
  end
38
40
 
41
+ # Computes the outputs based on the inputs and previous state
42
+ def tick
43
+ @ticks.times.each do
44
+ @sub_components.each(&:tick)
45
+ @sub_components.each(&:tock)
46
+ end
47
+ end
48
+
39
49
  # Sets all the outputs expose what was set in #tick
40
50
  def tock
41
51
  outputs.each(&:tock)
@@ -52,7 +62,7 @@ module Circuits
52
62
  # @param port [Symbol] The symbol that represents the terminal
53
63
  # @return [Input, Output] The terminal
54
64
  def [](port)
55
- port_mapping = port_mappings[port]
65
+ port_mapping = @port_mappings[port]
56
66
  return nil if port_mapping.nil?
57
67
  port_number = port_mapping[:number]
58
68
  case port_mapping[:type]
@@ -65,17 +75,33 @@ module Circuits
65
75
 
66
76
  private
67
77
 
68
- attr_reader :port_mappings
78
+ def create_inputs(inputs)
79
+ input_count = inputs.class == Fixnum ? inputs : inputs.length
80
+ input_count.times.map { Circuits::Terminal::Input.new }
81
+ end
82
+
83
+ def create_outputs(outputs)
84
+ output_count = outputs.class == Fixnum ? outputs : outputs.length
85
+ output_count.times.map { Circuits::Terminal::Output.new }
86
+ end
69
87
 
70
- def default_port_mappings
88
+ def create_port_mappings(opts = {})
71
89
  res = {}
72
- (input_mappings + output_mappings).each do |mapping|
90
+ (input_mappings(opts[:inputs]) +
91
+ output_mappings(opts[:outputs])).each do |mapping|
73
92
  res.merge!(mapping)
74
93
  end
75
94
  res
76
95
  end
77
96
 
78
- def input_mappings
97
+ def input_mappings(input_names)
98
+ return default_input_mappings unless input_names.class == Array
99
+ input_names.map.each_with_index do |input_name, num|
100
+ { input_name => { type: :input, number: num } }
101
+ end
102
+ end
103
+
104
+ def default_input_mappings
79
105
  input_count = inputs.length
80
106
  return [{ in: { type: :input, number: 0 } }] if input_count == 1
81
107
  input_count.times.collect do |num|
@@ -83,7 +109,14 @@ module Circuits
83
109
  end
84
110
  end
85
111
 
86
- def output_mappings
112
+ def output_mappings(output_names)
113
+ return default_output_mappings unless output_names.class == Array
114
+ output_names.map.each_with_index do |output_name, num|
115
+ { output_name => { type: :output, number: num } }
116
+ end
117
+ end
118
+
119
+ def default_output_mappings
87
120
  output_count = outputs.length
88
121
  return[{ out: { type: :output, number: 0 } }] if output_count == 1
89
122
  output_count.times.collect do |num|
@@ -1,80 +1,58 @@
1
1
  require 'circuits/component/base'
2
- require 'circuits/component/nand'
2
+ require 'circuits/component/and'
3
+ require 'circuits/component/sr_nand'
3
4
 
4
5
  module Circuits
5
6
  module Component
6
7
  # Positive edge triggered D-type flip flop
7
8
  class D < Base
8
9
  def initialize
9
- super(port_mappings: { d: { type: :input, number: 0 },
10
- clk: { type: :input, number: 1 },
11
- q: { type: :output, number: 0 },
12
- not_q: { type: :output, number: 1 } })
13
- create_sub_components
14
- link_sub_components
10
+ sub_components = create_sub_components
11
+ super(inputs: [:d, :clk], outputs: [:q, :not_q],
12
+ sub_components: sub_components.map { |_, v| v },
13
+ ticks: 4)
14
+ link sub_components
15
15
  reset
16
16
  end
17
17
 
18
- # Computes the outputs based on the inputs and previous state
19
- def tick
20
- 3.times.each do
21
- sub_components.each(&:tick)
22
- sub_components.each(&:tock)
23
- end
24
- end
25
-
26
18
  private
27
19
 
28
- attr_reader :and_gate, :sr_nand_clk, :sr_nand_d, :sr_nand_out,
29
- :sub_components
30
-
31
20
  def create_sub_components
32
- @and_gate = Circuits::Component::And.new
33
- @sr_nand_clk = Circuits::Component::SrNand.new
34
- @sr_nand_d = Circuits::Component::SrNand.new
35
- @sr_nand_out = Circuits::Component::SrNand.new
36
- @sub_components = [@and_gate, @sr_nand_clk, @sr_nand_d, @sr_nand_out]
37
- end
38
-
39
- def default_input_count
40
- 2
41
- end
42
-
43
- def default_output_count
44
- 2
45
- end
46
-
47
- def link_and_gate
48
- and_gate[:a].set sr_nand_clk[:not_q]
49
- and_gate[:b].set self[:clk]
21
+ {
22
+ and_gate: Circuits::Component::And.new,
23
+ sr_nand_clk: Circuits::Component::SrNand.new,
24
+ sr_nand_d: Circuits::Component::SrNand.new,
25
+ sr_nand_out: Circuits::Component::SrNand.new
26
+ }
50
27
  end
51
28
 
52
- def link_outputs
53
- self[:q].set sr_nand_out[:q]
54
- self[:not_q].set sr_nand_out[:not_q]
29
+ def link(sub_components)
30
+ link_and_gate sub_components
31
+ link_sr_nand_clk sub_components
32
+ link_sr_nand_d sub_components
33
+ link_sr_nand_out sub_components
34
+ q.set sub_components[:sr_nand_out].q
35
+ not_q.set sub_components[:sr_nand_out].not_q
55
36
  end
56
37
 
57
- def link_sr_nand_d
58
- sr_nand_d[:not_s].set and_gate[:out]
59
- sr_nand_d[:not_r].set self[:d]
38
+ def link_and_gate(sc)
39
+ sc[:and_gate].a.set sc[:sr_nand_clk].not_q
40
+ sc[:and_gate].b.set clk
60
41
  end
61
42
 
62
- def link_sr_nand_clk
63
- sr_nand_clk[:not_s].set sr_nand_d[:not_q]
64
- sr_nand_clk[:not_r].set self[:clk]
43
+ def link_sr_nand_clk(sc)
44
+ sc[:sr_nand_clk].not_s.set sc[:sr_nand_d].not_q
45
+ sc[:sr_nand_clk].not_r.set clk
65
46
  end
66
47
 
67
- def link_sr_nand_out
68
- sr_nand_out[:not_s].set sr_nand_clk[:not_q]
69
- sr_nand_out[:not_r].set sr_nand_d[:q]
48
+ def link_sr_nand_d(sc)
49
+ sc[:sr_nand_d].not_s.set sc[:and_gate].out
50
+ sc[:sr_nand_d].not_r.set d
70
51
  end
71
52
 
72
- def link_sub_components
73
- link_outputs
74
- link_and_gate
75
- link_sr_nand_d
76
- link_sr_nand_clk
77
- link_sr_nand_out
53
+ def link_sr_nand_out(sc)
54
+ sc[:sr_nand_out].not_s.set sc[:sr_nand_clk].not_q
55
+ sc[:sr_nand_out].not_r.set sc[:sr_nand_d].q
78
56
  end
79
57
 
80
58
  def reset
@@ -4,20 +4,15 @@ module Circuits
4
4
  module Component
5
5
  # Logical NAND Operator
6
6
  class Nand < Base
7
+ def initialize(opts = {})
8
+ inputs = opts[:inputs] || 2
9
+ super(inputs: inputs, outputs: 1)
10
+ end
11
+
7
12
  # Sets the output to be the result of a logical NAND of the inputs
8
13
  def tick
9
14
  self[:out].set(!inputs.map(&:get).inject(:&))
10
15
  end
11
-
12
- private
13
-
14
- def default_input_count
15
- 2
16
- end
17
-
18
- def default_output_count
19
- 1
20
- end
21
16
  end
22
17
  end
23
18
  end
@@ -4,20 +4,15 @@ module Circuits
4
4
  module Component
5
5
  # Logical NOR Operator
6
6
  class Nor < Base
7
+ def initialize(opts = {})
8
+ inputs = opts[:inputs] || 2
9
+ super(inputs: inputs, outputs: 1)
10
+ end
11
+
7
12
  # Sets the output to be the result of a logical OR of the inputs
8
13
  def tick
9
14
  self[:out].set(!inputs.map(&:get).inject(:|))
10
15
  end
11
-
12
- private
13
-
14
- def default_input_count
15
- 2
16
- end
17
-
18
- def default_output_count
19
- 1
20
- end
21
16
  end
22
17
  end
23
18
  end
@@ -4,19 +4,13 @@ module Circuits
4
4
  module Component
5
5
  # Logical NOT Operator
6
6
  class Not < Base
7
- # Sets the output to be the result of a logical NOT of the inputs
8
- def tick
9
- self[:out].set(!self[:in].get)
7
+ def initialize
8
+ super(inputs: 1, outputs: 1)
10
9
  end
11
10
 
12
- private
13
-
14
- def default_input_count
15
- 1
16
- end
17
-
18
- def default_output_count
19
- 1
11
+ # Sets the output to be the result of a logical NOT of the inputs
12
+ def tick
13
+ out.set(!self[:in].get)
20
14
  end
21
15
  end
22
16
  end
@@ -4,20 +4,15 @@ module Circuits
4
4
  module Component
5
5
  # Logical OR Operator
6
6
  class Or < Base
7
+ def initialize(opts = {})
8
+ inputs = opts[:inputs] || 2
9
+ super(inputs: inputs, outputs: 1)
10
+ end
11
+
7
12
  # Sets the output to be the result of a logical OR of the inputs
8
13
  def tick
9
14
  self[:out].set(inputs.map(&:get).inject(:|))
10
15
  end
11
-
12
- private
13
-
14
- def default_input_count
15
- 2
16
- end
17
-
18
- def default_output_count
19
- 1
20
- end
21
16
  end
22
17
  end
23
18
  end
@@ -6,67 +6,40 @@ module Circuits
6
6
  # SR NAND Latch
7
7
  class SrNand < Base
8
8
  def initialize
9
- super(port_mappings: { not_s: { type: :input, number: 0 },
10
- not_r: { type: :input, number: 1 },
11
- q: { type: :output, number: 0 },
12
- not_q: { type: :output, number: 1 } })
13
- create_sub_components
14
- link_sub_components
9
+ nand_s = Nand.new
10
+ nand_r = Nand.new
11
+ super(inputs: [:not_s, :not_r],
12
+ outputs: [:q, :not_q],
13
+ sub_components: [nand_s, nand_r],
14
+ ticks: 2)
15
+ link nand_s, nand_r
15
16
  reset
16
17
  end
17
18
 
18
- # Computes the outputs based on the inputs and previous state
19
- def tick
20
- 2.times.each do
21
- sub_components.each(&:tick)
22
- sub_components.each(&:tock)
23
- end
24
- end
25
-
26
19
  private
27
20
 
28
- attr_reader :nand_s, :nand_r, :sub_components
29
-
30
- def create_sub_components
31
- @nand_s = Nand.new
32
- @nand_r = Nand.new
33
- @sub_components = [@nand_s, @nand_r]
34
- end
35
-
36
- def default_input_count
37
- 2
38
- end
39
-
40
- def default_output_count
41
- 2
42
- end
43
-
44
- def link_nand_r
45
- nand_r[:a].set self[:not_r]
46
- nand_r[:b].set nand_s[:out]
47
- end
48
-
49
- def link_nand_s
50
- nand_s[:a].set self[:not_s]
51
- nand_s[:b].set nand_r[:out]
21
+ def link(nand_s, nand_r)
22
+ link_nand_s nand_s, nand_r
23
+ link_nand_r nand_s, nand_r
24
+ q.set nand_s.out
25
+ not_q.set nand_r.out
52
26
  end
53
27
 
54
- def link_outputs
55
- self[:q].set nand_s[:out]
56
- self[:not_q].set nand_r[:out]
28
+ def link_nand_s(nand_s, nand_r)
29
+ nand_s.a.set not_s
30
+ nand_s.b.set nand_r.out
57
31
  end
58
32
 
59
- def link_sub_components
60
- link_nand_s
61
- link_nand_r
62
- link_outputs
33
+ def link_nand_r(nand_s, nand_r)
34
+ nand_r.a.set not_r
35
+ nand_r.b.set nand_s.out
63
36
  end
64
37
 
65
38
  def reset
66
- self[:not_s].set true
39
+ not_s.set true
67
40
  tick
68
41
  tock
69
- self[:not_r].set true
42
+ not_r.set true
70
43
  end
71
44
  end
72
45
  end
@@ -6,67 +6,40 @@ module Circuits
6
6
  # SR NOR Latch
7
7
  class SrNor < Base
8
8
  def initialize
9
- super(port_mappings: { r: { type: :input, number: 0 },
10
- s: { type: :input, number: 1 },
11
- q: { type: :output, number: 0 },
12
- not_q: { type: :output, number: 1 } })
13
- create_sub_components
14
- link_sub_components
9
+ nor_s = Nor.new
10
+ nor_r = Nor.new
11
+ super(inputs: [:r, :s],
12
+ outputs: [:q, :not_q],
13
+ sub_components: [nor_s, nor_r],
14
+ ticks: 2)
15
+ link nor_s, nor_r
15
16
  reset
16
17
  end
17
18
 
18
- # Computes the outputs based on the inputs and previous state
19
- def tick
20
- 2.times.each do
21
- sub_components.each(&:tick)
22
- sub_components.each(&:tock)
23
- end
24
- end
25
-
26
19
  private
27
20
 
28
- attr_reader :nor_r, :nor_s, :sub_components
29
-
30
- def create_sub_components
31
- @nor_r = Nor.new
32
- @nor_s = Nor.new
33
- @sub_components = [@nor_r, @nor_s]
34
- end
35
-
36
- def default_input_count
37
- 2
38
- end
39
-
40
- def default_output_count
41
- 2
42
- end
43
-
44
- def link_nor_r
45
- nor_r[:a].set self[:r]
46
- nor_r[:b].set nor_s[:out]
47
- end
48
-
49
- def link_nor_s
50
- nor_s[:a].set self[:s]
51
- nor_s[:b].set nor_r[:out]
21
+ def link(nor_s, nor_r)
22
+ link_nor_s nor_s, nor_r
23
+ link_nor_r nor_s, nor_r
24
+ q.set nor_r.out
25
+ not_q.set nor_s.out
52
26
  end
53
27
 
54
- def link_outputs
55
- self[:q].set nor_r[:out]
56
- self[:not_q].set nor_s[:out]
28
+ def link_nor_s(nor_s, nor_r)
29
+ nor_s.a.set s
30
+ nor_s.b.set nor_r.out
57
31
  end
58
32
 
59
- def link_sub_components
60
- link_nor_s
61
- link_nor_r
62
- link_outputs
33
+ def link_nor_r(nor_s, nor_r)
34
+ nor_r.a.set r
35
+ nor_r.b.set nor_s.out
63
36
  end
64
37
 
65
38
  def reset
66
- self[:r].set true
39
+ r.set true
67
40
  tick
68
41
  tock
69
- self[:r].set false
42
+ r.set false
70
43
  end
71
44
  end
72
45
  end
@@ -4,20 +4,15 @@ module Circuits
4
4
  module Component
5
5
  # Logical XNOR Operator
6
6
  class Xnor < Base
7
+ def initialize(opts = {})
8
+ inputs = opts[:inputs] || 2
9
+ super(inputs: inputs, outputs: 1)
10
+ end
11
+
7
12
  # Sets the output to be the result of a logical XNOR of the inputs
8
13
  def tick
9
14
  self[:out].set(!inputs.map(&:get).inject(:^))
10
15
  end
11
-
12
- private
13
-
14
- def default_input_count
15
- 2
16
- end
17
-
18
- def default_output_count
19
- 1
20
- end
21
16
  end
22
17
  end
23
18
  end
@@ -4,20 +4,15 @@ module Circuits
4
4
  module Component
5
5
  # Logical XOR Operator
6
6
  class Xor < Base
7
+ def initialize(opts = {})
8
+ inputs = opts[:inputs] || 2
9
+ super(inputs: inputs, outputs: 1)
10
+ end
11
+
7
12
  # Sets the output to be the result of a logical XOR of the inputs
8
13
  def tick
9
14
  self[:out].set(inputs.map(&:get).inject(:^))
10
15
  end
11
-
12
- private
13
-
14
- def default_input_count
15
- 2
16
- end
17
-
18
- def default_output_count
19
- 1
20
- end
21
16
  end
22
17
  end
23
18
  end
@@ -1,5 +1,5 @@
1
1
  # Circuits allows you to express logical circuits in code
2
2
  module Circuits
3
3
  # The version of the Circuits gem
4
- VERSION = '0.10.0'
4
+ VERSION = '0.11.0'
5
5
  end
@@ -49,7 +49,7 @@ describe Circuits::Component::And do
49
49
 
50
50
  [3, 4, 8].each do |n|
51
51
  context "with #{n} inputs" do
52
- subject { Circuits::Component::And.new input_count: n }
52
+ subject { Circuits::Component::And.new inputs: n }
53
53
 
54
54
  before do
55
55
  n.times { |x| subject.inputs[x].set inputs[x] }
@@ -1,32 +1,10 @@
1
1
  require 'spec_helper'
2
2
  require 'circuits/component/base'
3
3
 
4
- # Mock component to include Circuits::Component::Base
5
- class MockComponent1 < Circuits::Component::Base
6
- def default_input_count
7
- 1
8
- end
9
-
10
- def default_output_count
11
- 1
12
- end
13
- end
14
-
15
- # Mock component to include Circuits::Component::Base
16
- class MockComponent2 < Circuits::Component::Base
17
- def default_input_count
18
- 2
19
- end
20
-
21
- def default_output_count
22
- 2
23
- end
24
- end
25
-
26
4
  describe Circuits::Component::Base do
27
5
  describe '#[]' do
28
6
  context 'one input and one output' do
29
- subject { MockComponent1.new }
7
+ subject { Circuits::Component::Base.new(inputs: 1, outputs: 1) }
30
8
 
31
9
  it 'has the input available as #in' do
32
10
  expect(subject[:in]).to eq(subject.inputs[0])
@@ -62,7 +40,7 @@ describe Circuits::Component::Base do
62
40
  end
63
41
 
64
42
  context 'two inputs and two outputs' do
65
- subject { MockComponent2.new }
43
+ subject { Circuits::Component::Base.new(inputs: 2, outputs: 2) }
66
44
 
67
45
  it 'has the inputs available as #a and #b' do
68
46
  expect(subject.a).to eq(subject.inputs[0])
@@ -49,7 +49,7 @@ describe Circuits::Component::Nand do
49
49
 
50
50
  [3, 4, 8].each do |n|
51
51
  context "with #{n} inputs" do
52
- subject { Circuits::Component::Nand.new input_count: n }
52
+ subject { Circuits::Component::Nand.new inputs: n }
53
53
 
54
54
  before do
55
55
  n.times { |x| subject.inputs[x].set inputs[x] }
@@ -49,7 +49,7 @@ describe Circuits::Component::Nor do
49
49
 
50
50
  [3, 4, 8].each do |n|
51
51
  context "with #{n} inputs" do
52
- subject { Circuits::Component::Nor.new input_count: n }
52
+ subject { Circuits::Component::Nor.new inputs: n }
53
53
 
54
54
  before do
55
55
  n.times { |x| subject.inputs[x].set inputs[x] }
@@ -49,7 +49,7 @@ describe Circuits::Component::Or do
49
49
 
50
50
  [3, 4, 8].each do |n|
51
51
  context "with #{n} inputs" do
52
- subject { Circuits::Component::Or.new input_count: n }
52
+ subject { Circuits::Component::Or.new inputs: n }
53
53
 
54
54
  before do
55
55
  n.times { |x| subject.inputs[x].set inputs[x] }
@@ -50,7 +50,7 @@ describe Circuits::Component::Xnor do
50
50
  context 'when the number of inputs is even' do
51
51
  [2, 4, 8].each do |n|
52
52
  context "with #{n} inputs" do
53
- subject { Circuits::Component::Xnor.new input_count: n }
53
+ subject { Circuits::Component::Xnor.new inputs: n }
54
54
 
55
55
  before do
56
56
  n.times { |x| subject.inputs[x].set inputs[x] }
@@ -99,7 +99,7 @@ describe Circuits::Component::Xnor do
99
99
  context 'when the number of inputs is odd' do
100
100
  [3, 5, 7].each do |n|
101
101
  context "with #{n} inputs" do
102
- subject { Circuits::Component::Xnor.new input_count: n }
102
+ subject { Circuits::Component::Xnor.new inputs: n }
103
103
 
104
104
  before do
105
105
  n.times { |x| subject.inputs[x].set inputs[x] }
@@ -50,7 +50,7 @@ describe Circuits::Component::Xor do
50
50
  context 'when the number of inputs is even' do
51
51
  [2, 4, 8].each do |n|
52
52
  context "with #{n} inputs" do
53
- subject { Circuits::Component::Xor.new input_count: n }
53
+ subject { Circuits::Component::Xor.new inputs: n }
54
54
 
55
55
  before do
56
56
  n.times { |x| subject.inputs[x].set inputs[x] }
@@ -99,7 +99,7 @@ describe Circuits::Component::Xor do
99
99
  context 'when the number of inputs is odd' do
100
100
  [3, 5, 7].each do |n|
101
101
  context "with #{n} inputs" do
102
- subject { Circuits::Component::Xor.new input_count: n }
102
+ subject { Circuits::Component::Xor.new inputs: n }
103
103
 
104
104
  before do
105
105
  n.times { |x| subject.inputs[x].set inputs[x] }
metadata CHANGED
@@ -1,14 +1,14 @@
1
1
  --- !ruby/object:Gem::Specification
2
2
  name: circuits
3
3
  version: !ruby/object:Gem::Version
4
- version: 0.10.0
4
+ version: 0.11.0
5
5
  platform: ruby
6
6
  authors:
7
7
  - Henry Muru Paenga
8
8
  autorequire:
9
9
  bindir: bin
10
10
  cert_chain: []
11
- date: 2015-10-29 00:00:00.000000000 Z
11
+ date: 2015-11-01 00:00:00.000000000 Z
12
12
  dependencies:
13
13
  - !ruby/object:Gem::Dependency
14
14
  name: bundler