axi_tdl 0.0.19 → 0.1.0

checksums.yaml

@@ -1,7 +1,7 @@
 ---
 SHA256:
-  metadata.gz: 97a6adaec566d23b4b76a1c7396bc9b03c5d9f3de0afa0f5a6caa5e923e4c80a
-  data.tar.gz: eb0d97cd60eb072a05341d39b983084ef6d601cad45af6d1205ad6162acd5b1c
+  metadata.gz: baeb52ac25e3aaa2c8a6207d9de9744e64f6264112db6667dddf704f547ddf8f
+  data.tar.gz: 52bc1a24600db46881c770564a2f8a38a00e5b6547ab2dba312020a206a3e1a8
 SHA512:
-  metadata.gz: ae7440f8c8eaacd212546c1284f1b167fc5d48dc6f160ea8373991c9a17c139621c93e829d6c3c4cb3df06b266bf1ba6ebc439a94ba5e246cca3f8aed9ca66d1
-  data.tar.gz: 9e9b7b861a12fb69f490ee1214975169b51582d277c19089124db252b148591c327e28639fa26c3b4720adc357b3716f0e5d7a6822cca5960e999586992365aa
+  metadata.gz: e262a33c8f90aa05558c9d71e2d7d1ab90e9b1dcca5e17ba5dfd0c1a77b1a41b06bfe07a054b39498f34fd027b0da5205b01c77db91303e97cb0ca74ea783eeb
+  data.tar.gz: 183f5a3421d04f6c418fea0c1fa5ec14a91a50a1ffd3902e3decc4cac8cc77b774f8031e6686f4948c6d30b9925618a9062900f30d5312e3464ed36c5763b842

data/lib/axi_tdl/version.rb

@@ -1,3 +1,3 @@
 module AxiTdl
-  VERSION = "0.0.19"
+  VERSION = "0.1.0"
 end

data/lib/tdl/examples/2_hdl_class/tmp/test_module_var.sv

@@ -5,7 +5,7 @@ _______________________________________
 descript:
 author : Cook.Darwin
 Version: VERA.0.0
-created: 2021-03-20 13:20:54 +0800
+created: 2021-03-20 20:34:51 +0800
 madified:
 ***********************************************/
 `timescale 1ns/1ps
@@ -19,7 +19,7 @@ module test_module_var #(
 
 //==========================================================================
 //-------- define ----------------------------------------------------------
-localparam  ASIZE  = 20   ;
+localparam  ASIZE  = 20;
 axi_stream_inf #(.DSIZE(8),.USIZE(1)) tmp_axis_inf (.aclk(clock),.aresetn(rst_n),.aclken(1'b1)) ;
 axi_stream_inf #(.DSIZE(8),.USIZE(1)) tmp_axis0_inf (.aclk(clock),.aresetn(rst_n),.aclken(1'b1)) ;
 axi_inf #(.DSIZE(32),.IDSIZE(2),.ASIZE(8),.LSIZE(9),.MODE("BOTH"),.ADDR_STEP(4294967295)) tmp_axi4_inf (.axi_aclk(clock),.axi_aresetn(rst_n)) ;

data/lib/tdl/examples/2_hdl_class/tmp/test_vcs_string.sv

@@ -5,7 +5,7 @@ _______________________________________
 descript:
 author : Cook.Darwin
 Version: VERA.0.0
-created: 2021-03-20 13:24:07 +0800
+created: 2021-03-21 10:19:17 +0800
 madified:
 ***********************************************/
 `timescale 1ns/1ps

data/lib/tdl/examples/9_itegration/clock_manage/itgt_module_clock_manage.rb

@@ -29,5 +29,18 @@ class ClockManage < ItegrationVerb
 
     end
 
+    def_test_unit('test_clock_xx',__dir__) do 
+        test_unit_init do 
+
+        end
+    end
+
+    def_test_unit('test_clock_bb',__dir__) do 
+        test_unit_init do 
+
+        end
+    end
+
+
 end
 

data/lib/tdl/examples/9_itegration/clock_manage/test_clock_bb.sv

@@ -0,0 +1,34 @@
+/**********************************************
+_______________________________________ 
+___________    Cook Darwin   __________    
+_______________________________________
+descript:
+author : Cook.Darwin
+Version: VERA.0.0
+created: 2021-03-20 23:48:13 +0800
+madified:
+***********************************************/
+`timescale 1ns/1ps
+
+module test_clock_bb(
+    input        from_up_pass,
+    output logic to_down_pass
+);
+
+//==========================================================================
+//-------- define ----------------------------------------------------------
+
+
+//==========================================================================
+//-------- instance --------------------------------------------------------
+
+//==========================================================================
+//-------- expression ------------------------------------------------------
+initial begin
+    to_down_pass = 1'b0;
+    wait(from_up_pass);
+    $root.tb_test_tttop_sim.test_unit_region = "test_clock_bb";
+    to_down_pass = 1'b1;
+end
+
+endmodule

data/lib/tdl/examples/9_itegration/tb_test_top.sv

@@ -5,7 +5,7 @@ _______________________________________
 descript:
 author : Cook.Darwin
 Version: VERA.0.0
-created: xxxx.xx.xx
+created: 2021-03-20 20:34:51 +0800
 madified:
 ***********************************************/
 `timescale 1ns/1ps
@@ -23,7 +23,7 @@ test_top rtl_top(
 //==========================================================================
 //-------- expression ------------------------------------------------------
 initial begin
-     forever begin #(33ns);gl_clk = ~gl_clk;end;
+    forever begin #(33ns);gl_clk = ~gl_clk;end;
 end
 
 endmodule

data/lib/tdl/examples/9_itegration/tb_test_tttop.sv

@@ -5,7 +5,7 @@ _______________________________________
 descript:
 author : Cook.Darwin
 Version: VERA.0.0
-created: 2021-03-20 12:10:28 +0800
+created: xxxx.xx.xx
 madified:
 ***********************************************/
 `timescale 1ns/1ps

data/lib/tdl/examples/9_itegration/tb_test_tttop_sim.sv

@@ -0,0 +1,38 @@
+/**********************************************
+_______________________________________ 
+___________    Cook Darwin   __________    
+_______________________________________
+descript:
+author : Cook.Darwin
+Version: VERA.0.0
+created: xxxx.xx.xx
+madified:
+***********************************************/
+`timescale 1ns/1ps
+
+module tb_test_tttop_sim();
+//==========================================================================
+//-------- define ----------------------------------------------------------
+logic gl_clk;
+string test_unit_region;
+logic unit_pass_u;
+logic unit_pass_d;
+
+//==========================================================================
+//-------- instance --------------------------------------------------------
+test_tttop_sim rtl_top(
+/* input clock */.global_sys_clk (gl_clk )
+);
+test_clock_bb test_unit_0(
+/* input  */.from_up_pass (unit_pass_u ),
+/* output */.to_down_pass (unit_pass_d )
+);
+//==========================================================================
+//-------- expression ------------------------------------------------------
+initial begin
+    forever begin #(33ns);gl_clk = ~gl_clk;end;
+end
+
+assign unit_pass_u = 1'b1;
+
+endmodule

data/lib/tdl/examples/9_itegration/test_top.sv

@@ -5,7 +5,7 @@ _______________________________________
 descript:
 author : Cook.Darwin
 Version: VERA.0.0
-created: xxxx.xx.xx
+created: 2021-03-20 20:34:51 +0800
 madified:
 ***********************************************/
 `timescale 1ns/1ps
@@ -33,8 +33,8 @@ a_test_md a_test_md_inst(
 );
 //==========================================================================
 //-------- expression ------------------------------------------------------
-assign  x_origin_inf.axis_tvalid = 1'b0;
-assign  x_origin_inf.axis_tdata = '0;
-assign  x_origin_inf.axis_tlast = 1'b0;
+assign x_origin_inf.axis_tvalid = 1'b0;
+assign x_origin_inf.axis_tdata = '0;
+assign x_origin_inf.axis_tlast = 1'b0;
 
 endmodule

data/lib/tdl/examples/9_itegration/test_tttop.sv

@@ -5,7 +5,7 @@ _______________________________________
 descript:
 author : Cook.Darwin
 Version: VERA.0.0
-created: xxxx.xx.xx
+created: 2021-03-21 10:19:00 +0800
 madified:
 ***********************************************/
 `timescale 1ns/1ps

data/lib/tdl/examples/9_itegration/test_tttop_sim.sv

@@ -0,0 +1,9 @@
+
+`timescale 1ns/1ps
+module test_tttop_sim();
+initial begin
+    #(1us);
+    $warning("Check TopModule.sim,please!!!");
+    $stop;
+end
+endmodule

data/lib/tdl/examples/9_itegration/top.rb

@@ -8,4 +8,5 @@ TopModule.test_tttop(__dir__) do
     add_itegration('ClockManage',pins_map: :CM)
     add_itegration('ABlock')
 
+    add_test_unit('test_clock_bb')
 end

data/lib/tdl/exlib/itegration_verb.rb

@@ -354,25 +354,25 @@ class ItegrationVerb
         _names_pool_inst()
         # @itgt_links = ItgtLinks.new(self)
         ## 为child module 生成方法
-        init_children_modules()
+        # init_children_modules()
         # init_children_modules_post()
     end
 
-    def init_children_modules
-        blocks_hash = self.class.instance_variable_get("@_sdl_eval_blocks_hash_") || {}
-        blocks_hash_post = self.class.instance_variable_get("@_sdl_eval_blocks_post_hash_") || {}
-        dir_hash = self.class.instance_variable_get("@_sdl_eval_dir_hash_")
+    # def init_children_modules
+    #     blocks_hash = self.class.instance_variable_get("@_sdl_eval_blocks_hash_") || {}
+    #     blocks_hash_post = self.class.instance_variable_get("@_sdl_eval_blocks_post_hash_") || {}
+    #     dir_hash = self.class.instance_variable_get("@_sdl_eval_dir_hash_")
 
-        blocks_hash = blocks_hash.merge blocks_hash_post
+    #     blocks_hash = blocks_hash.merge blocks_hash_post
 
-        blocks_hash.keys.each do |key|
+    #     blocks_hash.keys.each do |key|
 
-            sdlm = SdlModule.new(name:self.class.to_s + "_#{@nickname}#{key}",out_sv_path:dir_hash[key])
-            define_singleton_method(key) do
-                sdlm
-            end
-        end
-    end
+    #         sdlm = SdlModule.new(name:self.class.to_s + "_#{@nickname}#{key}",out_sv_path:dir_hash[key])
+    #         define_singleton_method(key) do
+    #             sdlm
+    #         end
+    #     end
+    # end
 
     # def init_children_modules_post
     #     blocks_hash = self.class.instance_variable_get("@_sdl_eval_blocks_post_hash_")
@@ -387,20 +387,20 @@ class ItegrationVerb
     #     end
     # end
 
-    def gen_children_modules
-        blocks_hash = self.class.instance_variable_get("@_sdl_eval_blocks_hash_") || {}
-        blocks_hash_post = self.class.instance_variable_get("@_sdl_eval_blocks_post_hash_") || {}
-        blocks_hash = blocks_hash.merge blocks_hash_post
-        blocks_hash.keys.each do |key|
-            self.send(key).gen_sv_module()
-        end
-    end
+    # def gen_children_modules
+    #     blocks_hash = self.class.instance_variable_get("@_sdl_eval_blocks_hash_") || {}
+    #     blocks_hash_post = self.class.instance_variable_get("@_sdl_eval_blocks_post_hash_") || {}
+    #     blocks_hash = blocks_hash.merge blocks_hash_post
+    #     blocks_hash.keys.each do |key|
+    #         self.send(key).gen_sv_module()
+    #     end
+    # end
 
         # define_singleton_method(:inst) do
     def inst
         # 先生成子模块
         ## 执行 生成 sdl module
-        inst_child_module()
+        # inst_child_module()
 
         blocks = self.class.instance_variable_get("@_inst_blocks_")
         ItegrationVerb.curr_itgt_push(self)
@@ -422,7 +422,7 @@ class ItegrationVerb
         end
 
         ## 执行 生成 sdl module
-        inst_child_module_post()
+        # inst_child_module_post()
 
         ## 执行top module techbench eval
         tb_inst()
@@ -431,7 +431,8 @@ class ItegrationVerb
         ## 执行 约束
         inst_constraints()
         ## 执行单元测试
-        test_unit_inst()
+        ## 改到 运行 top_module _exec_add_test_unit 那边执行
+        # test_unit_inst()
     end
 
     def tb_inst
@@ -464,8 +465,11 @@ class ItegrationVerb
         return if blocks.empty?
         ItegrationVerb.curr_itgt_push self
 
-        return unless TopModule.sim
-       
+        unless TopModule.sim
+            ItegrationVerb.curr_itgt_pop
+            return 
+        end
+
         blocks.each do |b|
             # @top_module.techbench.instance_exec(self,&b.clone)
             sdlm = TestUnitModule.new(name: b[0],out_sv_path: b[1])
@@ -486,62 +490,94 @@ class ItegrationVerb
 
     end
 
-    def inst_child_module
-        blocks_hash = self.class.instance_variable_get("@_sdl_eval_blocks_hash_")
-        return unless blocks_hash
-        ItegrationVerb.curr_itgt_push self
-        $_implicit_curr_itgt_.with_none_itgt do 
-            blocks_hash.keys.each do |key|
-                sdlm = self.send(key)
-
-
-                blocks = blocks_hash[key]
-                if blocks.length ==  1
-                    block = blocks[0]
-                    sdlm.instance_exec(self,&block)
-                elsif blocks.length >  1
-                    # block = Proc.new do
-                        blocks.each do |b|
-                            # b.call
-                            sdlm.instance_exec(self,&b)
-                        end
-                    # end
-                else
-                    ;
-                end
-            end
-        end
-        ItegrationVerb.curr_itgt_pop
-    end
+    def self.test_unit_inst(&filter_block)
+        # blocks = self.instance_variable_get("@_inst_test_unit_blocks_")
+        # blocks = instance_variable_get("@_inst_test_unit_blocks_") || []
+        blocks = @@_inst_test_unit_blocks_
+        return unless blocks
+        return if blocks.empty?
+        return unless TopModule.sim
 
-    def inst_child_module_post
-        blocks_hash = self.class.instance_variable_get("@_sdl_eval_blocks_post_hash_")
-        return unless blocks_hash
-        ItegrationVerb.curr_itgt_push self
-        $_implicit_curr_itgt_.with_none_itgt do
-            blocks_hash.keys.each do |key|
-                sdlm = self.send(key)
-                # $_implicit_curr_itgt_ = self
+        ItegrationVerb.curr_itgt_push nil
 
-                blocks = blocks_hash[key]
-                if blocks.length ==  1
-                    block = blocks[0]
-                    sdlm.instance_exec(self,&block)
-                elsif blocks.length >  1
-                    # block = Proc.new do
-                        blocks.each do |b|
-                            # b.call
-                            sdlm.instance_exec(self,&b)
-                        end
-                    # end
-                else
-                    next
+        blocks.each do |b|
+            # @top_module.techbench.instance_exec(self,&b.clone)
+            if !(block_given?) || filter_block.call(b[0])
+                sdlm = TestUnitModule.new(name: b[0],out_sv_path: b[1])
+                $_implicit_curr_itgt_.with_none_itgt do 
+                    sdlm.input - "from_up_pass"
+                    sdlm.output.logic - "to_down_pass"
+                end
+                sdlm.instance_exec(nil,&b[2])
+
+                if b[1] && File.exist?(b[1])
+                    sdlm.gen_sv_module
+                else 
+                    sdlm.origin_sv = true 
                 end
             end
         end
+
         ItegrationVerb.curr_itgt_pop
+
     end
 
+    # def inst_child_module
+    #     blocks_hash = self.class.instance_variable_get("@_sdl_eval_blocks_hash_")
+    #     return unless blocks_hash
+    #     ItegrationVerb.curr_itgt_push self
+    #     $_implicit_curr_itgt_.with_none_itgt do 
+    #         blocks_hash.keys.each do |key|
+    #             sdlm = self.send(key)
+
+
+    #             blocks = blocks_hash[key]
+    #             if blocks.length ==  1
+    #                 block = blocks[0]
+    #                 sdlm.instance_exec(self,&block)
+    #             elsif blocks.length >  1
+    #                 # block = Proc.new do
+    #                     blocks.each do |b|
+    #                         # b.call
+    #                         sdlm.instance_exec(self,&b)
+    #                     end
+    #                 # end
+    #             else
+    #                 ;
+    #             end
+    #         end
+    #     end
+    #     ItegrationVerb.curr_itgt_pop
+    # end
+
+    # def inst_child_module_post
+    #     blocks_hash = self.class.instance_variable_get("@_sdl_eval_blocks_post_hash_")
+    #     return unless blocks_hash
+    #     ItegrationVerb.curr_itgt_push self
+    #     $_implicit_curr_itgt_.with_none_itgt do
+    #         blocks_hash.keys.each do |key|
+    #             sdlm = self.send(key)
+    #             # $_implicit_curr_itgt_ = self
+
+    #             blocks = blocks_hash[key]
+    #             if blocks.length ==  1
+    #                 block = blocks[0]
+    #                 sdlm.instance_exec(self,&block)
+    #             elsif blocks.length >  1
+    #                 # block = Proc.new do
+    #                     blocks.each do |b|
+    #                         # b.call
+    #                         sdlm.instance_exec(self,&b)
+    #                     end
+    #                 # end
+    #             else
+    #                 next
+    #             end
+    #         end
+    #     end
+    #     ItegrationVerb.curr_itgt_pop
+    # end
+
     def self.inherited(subclass)
         unless @@child.include? subclass
             @@child << subclass
@@ -589,7 +625,7 @@ class ItegrationVerb
     public
     def check_same_method(name)
         if respond_to? name.to_s
-            raise TdlError.new("Itegration can't Redefine method #{name}")
+            raise TdlError.new("Itegration `#{to_s}` can't Redefine method #{name}")
         end
     end
 
@@ -736,63 +772,64 @@ class ItegrationVerb
     ## 添加测试用例
 
     def self.def_test_unit(name,path,&block)
-        _inst_test_unit_blocks_ = instance_variable_get("@_inst_test_unit_blocks_")
-        _inst_test_unit_blocks_ ||= []
-        _inst_test_unit_blocks_ << [name.to_s, path, block]
-        instance_variable_set("@_inst_test_unit_blocks_",_inst_test_unit_blocks_)
+        # @@_inst_test_unit_blocks_ = instance_variable_get("@_inst_test_unit_blocks_")
+        @@_inst_test_unit_blocks_ ||= []
+        @@_inst_test_unit_blocks_ << [name.to_s, path, block]
+        # instance_variable_set("@_inst_test_unit_blocks_",_inst_test_unit_blocks_)
+        @@_inst_test_unit_blocks_
     end
 
     ## 生成 itgt内的模块,
-    def self.has_module(dir,*names)
-        unless File.exist? dir
-            Dir.mkdir dir
-        end
-        ## itgt 生成 sdl 模块
-        names.each do |name|
-            # unless container_hash[name.to_s]
-            #     container_hash[name.to_s] = []
-            # end
-            self.define_singleton_method("#{name}_sdl_eval") do |&block|
-                _sdl_eval_blocks_hash_ = instance_variable_get("@_sdl_eval_blocks_hash_")
-                _sdl_eval_dir_hash_ = instance_variable_get("@_sdl_eval_dir_hash_")
-                _sdl_eval_blocks_hash_ ||= {}
-                _sdl_eval_dir_hash_ ||= {}
-
-                if _sdl_eval_blocks_hash_[name]
-                    _sdl_eval_blocks_hash_[name] << block
-                    # _sdl_eval_blocks_hash_[name] << $_implicit_curr_itgt_.wrap_nont_itgt(&block)
-                    # _sdl_eval_blocks_hash_[name] << lambda {|itgt| block.call }
-                else
-                    _sdl_eval_blocks_hash_[name] = [block]
-                    # _sdl_eval_blocks_hash_[name] = [$_implicit_curr_itgt_.wrap_nont_itgt(&block)]
-                    # _sdl_eval_blocks_hash_[name] == [ lambda {|itgt| block.call }]
-                end
-
-                _sdl_eval_dir_hash_[name] = dir if dir
-                instance_variable_set("@_sdl_eval_dir_hash_",_sdl_eval_dir_hash_)
-                instance_variable_set("@_sdl_eval_blocks_hash_",_sdl_eval_blocks_hash_)
-            end
-            ## 在 top_module 后再执行
-            self.define_singleton_method("#{name}_sdl_post_eval") do |&block|
-                $_implicit_curr_itgt_.with_none_itgt do 
-                    _blocks_hash_ = instance_variable_get("@_sdl_eval_blocks_post_hash_")
-                    _sdl_eval_dir_hash_ = instance_variable_get("@_sdl_eval_dir_hash_")
-                    _blocks_hash_ ||= {}
-                    _sdl_eval_dir_hash_ ||= {}
-
-                    if _blocks_hash_[name]
-                        _blocks_hash_[name] << block    #$_implicit_curr_itgt_.wrap_nont_itgt(&block)
-                    else
-                        _blocks_hash_[name] = [block]   #[$_implicit_curr_itgt_.wrap_nont_itgt(&block)]
-                    end
-
-                    _sdl_eval_dir_hash_[name] = dir if dir
-                    instance_variable_set("@_sdl_eval_dir_hash_",_sdl_eval_dir_hash_)
-                    instance_variable_set("@_sdl_eval_blocks_post_hash_",_blocks_hash_)
-                end
-            end
-        end
-    end
+    # def self.has_module(dir,*names)
+    #     unless File.exist? dir
+    #         Dir.mkdir dir
+    #     end
+    #     ## itgt 生成 sdl 模块
+    #     names.each do |name|
+    #         # unless container_hash[name.to_s]
+    #         #     container_hash[name.to_s] = []
+    #         # end
+    #         self.define_singleton_method("#{name}_sdl_eval") do |&block|
+    #             _sdl_eval_blocks_hash_ = instance_variable_get("@_sdl_eval_blocks_hash_")
+    #             _sdl_eval_dir_hash_ = instance_variable_get("@_sdl_eval_dir_hash_")
+    #             _sdl_eval_blocks_hash_ ||= {}
+    #             _sdl_eval_dir_hash_ ||= {}
+
+    #             if _sdl_eval_blocks_hash_[name]
+    #                 _sdl_eval_blocks_hash_[name] << block
+    #                 # _sdl_eval_blocks_hash_[name] << $_implicit_curr_itgt_.wrap_nont_itgt(&block)
+    #                 # _sdl_eval_blocks_hash_[name] << lambda {|itgt| block.call }
+    #             else
+    #                 _sdl_eval_blocks_hash_[name] = [block]
+    #                 # _sdl_eval_blocks_hash_[name] = [$_implicit_curr_itgt_.wrap_nont_itgt(&block)]
+    #                 # _sdl_eval_blocks_hash_[name] == [ lambda {|itgt| block.call }]
+    #             end
+
+    #             _sdl_eval_dir_hash_[name] = dir if dir
+    #             instance_variable_set("@_sdl_eval_dir_hash_",_sdl_eval_dir_hash_)
+    #             instance_variable_set("@_sdl_eval_blocks_hash_",_sdl_eval_blocks_hash_)
+    #         end
+    #         ## 在 top_module 后再执行
+    #         self.define_singleton_method("#{name}_sdl_post_eval") do |&block|
+    #             $_implicit_curr_itgt_.with_none_itgt do 
+    #                 _blocks_hash_ = instance_variable_get("@_sdl_eval_blocks_post_hash_")
+    #                 _sdl_eval_dir_hash_ = instance_variable_get("@_sdl_eval_dir_hash_")
+    #                 _blocks_hash_ ||= {}
+    #                 _sdl_eval_dir_hash_ ||= {}
+
+    #                 if _blocks_hash_[name]
+    #                     _blocks_hash_[name] << block    #$_implicit_curr_itgt_.wrap_nont_itgt(&block)
+    #                 else
+    #                     _blocks_hash_[name] = [block]   #[$_implicit_curr_itgt_.wrap_nont_itgt(&block)]
+    #                 end
+
+    #                 _sdl_eval_dir_hash_[name] = dir if dir
+    #                 instance_variable_set("@_sdl_eval_dir_hash_",_sdl_eval_dir_hash_)
+    #                 instance_variable_set("@_sdl_eval_blocks_post_hash_",_blocks_hash_)
+    #             end
+    #         end
+    #     end
+    # end
 
     def self.record_instance_var_block(name,default=[],&block)
         _inst_ccc_ = instance_variable_get("@_#{name}_")

data/lib/tdl/sdlmodule/sdlmodule_draw.rb

@@ -64,7 +64,7 @@ class SdlModule
             end 
         else
             File.open(File.join(@out_sv_path,"#{module_name}.sv"),"w") do |f|
-                f.print build_module(ex_param:ex_param,ex_port:ex_port,ex_up_code:ex_up_code,ex_down_code:ex_down_code)
+                f.print build_module_verb(ex_param:ex_param,ex_port:ex_port,ex_up_code:ex_up_code,ex_down_code:ex_down_code).join("")
             end
         end 
     end

data/lib/tdl/sdlmodule/test_unit_module.rb

@@ -325,6 +325,12 @@ class TopModule
     def _exec_add_test_unit
         @_test_unit_collect_ ||= []
         args = @_test_unit_collect_
+        ## 例化需要的itgt test unit
+        # ItegrationVerb.test_unit_inst
+        ItegrationVerb.test_unit_inst do |name|
+            args.include? name.to_s
+        end
+
         self.techbench.instance_exec(args) do |args|
             index = 0
             last_index = 0

data/lib/tdl/sdlmodule/top_module.rb

@@ -154,17 +154,16 @@ endmodule\n"
         end
 
         ## 生成 itgt下的子模块文件
-        # gen_children_modules
-        @_itgt_collect_.each do |itgt|
-            itgt.gen_children_modules()
-        end
+        # @_itgt_collect_.each do |itgt|
+        #     itgt.gen_children_modules()
+        # end
 
-        if implicit_itgt_collect
-            ## 执行 itegration_verb 里面的silence
-            implicit_itgt_collect.each do |itgt|
-                itgt.gen_children_modules()
-            end
-        end
+        # if implicit_itgt_collect
+        #     ## 执行 itegration_verb 里面的silence
+        #     implicit_itgt_collect.each do |itgt|
+        #         itgt.gen_children_modules()
+        #     end
+        # end
 
     end
 

metadata

@@ -1,14 +1,14 @@
 --- !ruby/object:Gem::Specification
 name: axi_tdl
 version: !ruby/object:Gem::Version
-  version: 0.0.19
+  version: 0.1.0
 platform: ruby
 authors:
 - Cook.Darwin
 autorequire: 
 bindir: exe
 cert_chain: []
-date: 2021-03-20 00:00:00.000000000 Z
+date: 2021-03-21 00:00:00.000000000 Z
 dependencies:
 - !ruby/object:Gem::Dependency
   name: rake
@@ -1204,14 +1204,17 @@ files:
 - lib/tdl/examples/9_itegration/clock_manage/itgt_module_clock_manage.rb
 - lib/tdl/examples/9_itegration/clock_manage/simple_clock.rb
 - lib/tdl/examples/9_itegration/clock_manage/simple_clock.sv
+- lib/tdl/examples/9_itegration/clock_manage/test_clock_bb.sv
 - lib/tdl/examples/9_itegration/dve.tcl
 - lib/tdl/examples/9_itegration/pins.yml
 - lib/tdl/examples/9_itegration/tb_test_top.sv
 - lib/tdl/examples/9_itegration/tb_test_tttop.sv
+- lib/tdl/examples/9_itegration/tb_test_tttop_sim.sv
 - lib/tdl/examples/9_itegration/test_top.sv
 - lib/tdl/examples/9_itegration/test_top_constraints.xdc
 - lib/tdl/examples/9_itegration/test_tttop.sv
 - lib/tdl/examples/9_itegration/test_tttop_constraints.xdc
+- lib/tdl/examples/9_itegration/test_tttop_sim.sv
 - lib/tdl/examples/9_itegration/top.rb
 - lib/tdl/examples/readme.md
 - lib/tdl/exlib/axis_eth_ex.rb