HDLRuby 2.0.8 → 2.0.9

checksums.yaml

@@ -1,7 +1,7 @@
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data/HDLRuby.gemspec

@@ -10,7 +10,7 @@ Gem::Specification.new do |spec|
   spec.email         = ["lovic@ariake-nct.ac.jp"]
 
   spec.summary       = %q{Hardware Ruby is a library for describing and simulating digital electronic systems.}
-  spec.description   = %q{Hardware Ruby is a library for describing and simulating digital electronic systems. With this library it will possible to describe hardware using all the features of the Ruby language, e.g., object orientation, duck tping, closure. This library is also usable through irb for interactive design and simulation.}
+  spec.description   = %q{Hardware Ruby is a library for describing and simulating digital electronic systems. With this library it will possible to describe synthesizable hardware using all the features of the Ruby language, e.g., object orientation, duck typing, closure. This library is also usable through irb for interactive design and simulation.}
   spec.homepage      = "https://github.com/civol"
   spec.license       = "MIT"
 
@@ -30,6 +30,7 @@ Gem::Specification.new do |spec|
   spec.executables   = spec.files.grep(%r{^exe/}) { |f| File.basename(f) }
   spec.require_paths = ["lib"]
 
+  spec.required_ruby_version = '>= 2.0'
   spec.add_development_dependency "bundler", "~> 2.0.1"
   spec.add_development_dependency "rake", "~> 10.0"
   # spec.add_development_dependency "minitest", "~> 5.0"

data/README.md

@@ -13,13 +13,13 @@ __Warning__:
 
 ## Using the HDLRuby compiler
 
-'hdrcc.rb' is the HDLRuby compiler. It takes as input a HDLRuby file, checks it, and can produce as output a Verilog HDL or a YAML low-level descriptions of a HW components but also simulate the input description.
+'hdrcc' is the HDLRuby compiler. It takes as input a HDLRuby file, checks it, and can produce as output a Verilog HDL or a YAML low-level descriptions of a HW components but also simulate the input description.
 
 
 __Usage__:
 
 ```
-hdrcc.rb [options] <input file> <output directory>
+hdrcc [options] <input file> <output directory>
 ```
 
 Where:
@@ -52,32 +52,32 @@ __Examples__:
 * Compile system named `adder` from `adder.rb` input file and generate a low-level YAML description into directory `adder`:
 
 ```
-hdrcc.rb --yaml --top adder adder.rb adder
+hdrcc --yaml --top adder adder.rb adder
 ```
 
 * Compile `adder.rb` input file and generate a low-level Verilog HDL description into directory `adder`:
 
 ```
-hdrcc.rb -v adder.rb adder
+hdrcc -v adder.rb adder
 ```
   
 * Compile system `adder` whose bit width is generic from `adder_gen.rb` input file to a 16-bit circuit low-level VHDL description into directory `adder`:
 
 ```
-hdrcc.rb -V -t adder --param 16 adder_gen.rb adder
+hdrcc -V -t adder --param 16 adder_gen.rb adder
 ```
 
 * Compile system `multer` with inputs and output bit width is generic from `multer_gen.rb` input file to a 16x16->32 bit cicruit whose low-level YAML description into directory `multer`:
 
 ```
-hdrcc.rb -y -t multer -p 16,16,32 multer_gen.rb multer
+hdrcc -y -t multer -p 16,16,32 multer_gen.rb multer
 ```
 
 * Simulate the circuit described in file `counter_bench.rb` using directory `counter` for
   storing the simulator's files:
 
 ```
-hdrcc.rb -S counter_bench.rb counter
+hdrcc -S counter_bench.rb counter
 ```
 
 

data/lib/HDLRuby/version.rb

@@ -1,3 +1,3 @@
 module HDLRuby
-  VERSION = "2.0.8"
+  VERSION = "2.0.9"
 end

metadata

@@ -1,7 +1,7 @@
 --- !ruby/object:Gem::Specification
 name: HDLRuby
 version: !ruby/object:Gem::Version
-  version: 2.0.8
+  version: 2.0.9
 platform: ruby
 authors:
 - Lovic Gauthier
@@ -39,9 +39,9 @@ dependencies:
       - !ruby/object:Gem::Version
         version: '10.0'
 description: Hardware Ruby is a library for describing and simulating digital electronic
-  systems. With this library it will possible to describe hardware using all the features
-  of the Ruby language, e.g., object orientation, duck tping, closure. This library
-  is also usable through irb for interactive design and simulation.
+  systems. With this library it will possible to describe synthesizable hardware using
+  all the features of the Ruby language, e.g., object orientation, duck typing, closure.
+  This library is also usable through irb for interactive design and simulation.
 email:
 - lovic@ariake-nct.ac.jp
 executables:
@@ -283,7 +283,7 @@ required_ruby_version: !ruby/object:Gem::Requirement
   requirements:
   - - ">="
     - !ruby/object:Gem::Version
-      version: '0'
+      version: '2.0'
 required_rubygems_version: !ruby/object:Gem::Requirement
   requirements:
   - - ">="