BOAST 1.3.5 → 2.0.0
Sign up to get free protection for your applications and to get access to all the features.
- checksums.yaml +4 -4
- data/BOAST.gemspec +1 -1
- data/LICENSE +13 -1
- data/README.md +62 -13
- data/lib/BOAST.rb +3 -1
- data/lib/BOAST/Language/ARMCPUID_by_name.rb +3752 -0
- data/lib/BOAST/Language/Algorithm.rb +4 -24
- data/lib/BOAST/Language/Architectures.rb +5 -0
- data/lib/BOAST/Language/Arithmetic.rb +38 -5
- data/lib/BOAST/Language/BOAST_OpenCL.rb +7 -8
- data/lib/BOAST/Language/Case.rb +10 -3
- data/lib/BOAST/Language/Config.rb +36 -12
- data/lib/BOAST/Language/ControlStructure.rb +7 -3
- data/lib/BOAST/Language/DataTypes.rb +6 -0
- data/lib/BOAST/Language/Expression.rb +26 -2
- data/lib/BOAST/Language/For.rb +59 -30
- data/lib/BOAST/Language/FuncCall.rb +9 -5
- data/lib/BOAST/Language/Functors.rb +1 -1
- data/lib/BOAST/Language/HighLevelOperators.rb +172 -0
- data/lib/BOAST/Language/If.rb +25 -9
- data/lib/BOAST/Language/Index.rb +5 -5
- data/lib/BOAST/Language/Intrinsics.rb +40 -27
- data/lib/BOAST/Language/OpenMP.rb +1 -0
- data/lib/BOAST/Language/Operators.rb +221 -34
- data/lib/BOAST/Language/Parens.rb +3 -2
- data/lib/BOAST/Language/Procedure.rb +18 -5
- data/lib/BOAST/Language/Slice.rb +176 -44
- data/lib/BOAST/Language/Variable.rb +99 -56
- data/lib/BOAST/Language/While.rb +18 -3
- data/lib/BOAST/Language/{CPUID_by_name.rb → X86CPUID_by_name.rb} +0 -0
- data/lib/BOAST/Optimization/Optimization.rb +2 -0
- data/lib/BOAST/Runtime/AffinityProbe.rb +7 -3
- data/lib/BOAST/Runtime/CKernel.rb +3 -0
- data/lib/BOAST/Runtime/CRuntime.rb +4 -0
- data/lib/BOAST/Runtime/CompiledRuntime.rb +404 -77
- data/lib/BOAST/Runtime/Compilers.rb +44 -18
- data/lib/BOAST/Runtime/Config.rb +9 -0
- data/lib/BOAST/Runtime/EnergyProbe.rb +19 -3
- data/lib/BOAST/Runtime/FFIRuntime.rb +23 -0
- data/lib/BOAST/Runtime/FORTRANRuntime.rb +1 -1
- data/lib/BOAST/Runtime/MAQAO.rb +29 -0
- data/lib/BOAST/Runtime/NonRegression.rb +64 -3
- data/lib/BOAST/Runtime/OpenCLRuntime.rb +16 -6
- data/lib/BOAST/Runtime/Probe.rb +21 -1
- metadata +5 -3
checksums.yaml
CHANGED
@@ -1,7 +1,7 @@
|
|
1
1
|
---
|
2
2
|
SHA1:
|
3
|
-
metadata.gz:
|
4
|
-
data.tar.gz:
|
3
|
+
metadata.gz: b7f276c1688e0a9ba92d4292b2f99c008e264821
|
4
|
+
data.tar.gz: d8c603a75c17ab5535c69156dcab3faecdd69826
|
5
5
|
SHA512:
|
6
|
-
metadata.gz:
|
7
|
-
data.tar.gz:
|
6
|
+
metadata.gz: 64dbe9f8d71796a2cbe626e2f7fe400ac90c491fdaa56b9d0e8cdcbf7696eb4df94cfaebf10cd80e43b886828d927a3f3e2c21988f6e9338b9f10be4eb5cbfca
|
7
|
+
data.tar.gz: 8c069701fce7b32127bdf26930587eb7644658f844161dc84ffcecc5d1d67bf42fa8c560702bc06b77c8b72b2250a188e964b46d2b8718ce0a0164b9de711a06
|
data/BOAST.gemspec
CHANGED
data/LICENSE
CHANGED
@@ -1,4 +1,16 @@
|
|
1
|
-
Copyright (c) 2012, Brice Videau <brice.videau@imag.fr>
|
1
|
+
Copyright (c) 2012-2016, Brice Videau <brice.videau@imag.fr>
|
2
|
+
Copyright (c) 2012-2016, Luigi Genovese <luigi.genovese@cea.fr>
|
3
|
+
Copyright (c) 2012, Johan <johan.cronsioe@gmail.com>
|
4
|
+
Copyright (c) 2013, Luka Stanisic <luka.stanisic@imag.fr>
|
5
|
+
Copyright (c) 2014, Kevin Pouget <kevin.pouget@imag.fr>
|
6
|
+
Copyright (c) 2015, Anthony Léonard <anthony.leonard@e.ujf-grenoble.fr>
|
7
|
+
Copyright (c) 2015-2016, Augustin Degomme <augustin.degomme@unibas.ch>
|
8
|
+
Copyright (c) 2016, Steven Quinito Masnada <steven.quinito-masnada@inria.fr>
|
9
|
+
Copyright (c) 2016, Luís Felipe Garlet Millani <luis.millani@imag.fr>
|
10
|
+
Copyright (c) 2012-2016, Thierry Deutsch <thierry.deutsch@cea.fr>
|
11
|
+
Copyright (c) 2012-2016, Jean-François Méhaut <jean-francois.mehaut@imag.fr>
|
12
|
+
Copyright (c) 2012-2013, Vania Marangozova-Martin <vania.marangozova-martin@imag.fr>
|
13
|
+
Copyright (c) 2014-2016, Frédéric Desprez <frederic.desprez@inria.fr>
|
2
14
|
All rights reserved.
|
3
15
|
|
4
16
|
Redistribution and use in source and binary forms, with or without
|
data/README.md
CHANGED
@@ -13,7 +13,7 @@ Installation
|
|
13
13
|
|
14
14
|
BOAST is ruby based, so ruby needs to be installed on the machine.
|
15
15
|
Installation of boast can be done using the ruby built-in package
|
16
|
-
manager: *gem*. See following Listing
|
16
|
+
manager: *gem*. See following Listing for reference.
|
17
17
|
|
18
18
|
```bash
|
19
19
|
sudo apt-get install ruby ruby-dev
|
@@ -25,7 +25,7 @@ Variable and Procedure Declaration
|
|
25
25
|
|
26
26
|
The following samples are presented using *irb* ruby interactive interpreter.
|
27
27
|
It can be launched using the *irb* command in a terminal. Following
|
28
|
-
Listing
|
28
|
+
Listing shows the declaration of two variables of different kind.
|
29
29
|
|
30
30
|
irb(main):001:0> require 'BOAST'
|
31
31
|
=> true
|
@@ -53,7 +53,7 @@ variables as parameters. For clarity irb echoes have been suppressed.
|
|
53
53
|
Switching Language
|
54
54
|
------------------
|
55
55
|
|
56
|
-
Following Listing
|
56
|
+
Following Listing shows how to switch BOAST to C. Available languages are
|
57
57
|
*FORTRAN*, *C*, *CUDA* and *CL*.
|
58
58
|
|
59
59
|
008:0> BOAST::lang = BOAST::C
|
@@ -65,7 +65,7 @@ Following Listing shows how to switch BOAST to C. Available languages are
|
|
65
65
|
Defining a Complete Procedure
|
66
66
|
-----------------------------
|
67
67
|
|
68
|
-
Following Listing
|
68
|
+
Following Listing shows how to define a procedure and the associated code. Note
|
69
69
|
that here the parameters of the procedure have been associated a direction:
|
70
70
|
one, *a*, is an input parameter while the other, *b*, is an output parameter.
|
71
71
|
|
@@ -91,7 +91,7 @@ one, *a*, is an input parameter while the other, *b*, is an output parameter.
|
|
91
91
|
Creating, Building and Running a Computing Kernel
|
92
92
|
-------------------------------------------------
|
93
93
|
|
94
|
-
Following Listing
|
94
|
+
Following Listing shows how to create a Computing kernel (*CKernel*) and build
|
95
95
|
it. Once a computing kernel is instantiated the output of BOAST will be
|
96
96
|
redirected to the computing kernel source code. Line 4 sets the entry point of
|
97
97
|
the computing kernel to the procedure we just defined. By default compilation
|
@@ -129,17 +129,17 @@ Using Arrays in Procedures
|
|
129
129
|
--------------------------
|
130
130
|
|
131
131
|
Most computing kernels don't work on scalar values but rather on arrays
|
132
|
-
of data. Following Listing
|
132
|
+
of data. Following Listing shows how to use arrays in computing
|
133
133
|
kernels. In this case we place ourselves in BOAST namespace to reduce
|
134
134
|
the syntax overhead. Variables *a* and *b* are one-dimensional arrays of
|
135
135
|
size *n*. Arrays in BOAST start at index 1 unless specified otherwise.
|
136
136
|
For instance `Dim(0,n-1)` would have created a dimension starting at 0.
|
137
137
|
Array bounds can also be negative and several dimensions can be
|
138
138
|
specified to obtain muti-dimensional arrays. For self contained
|
139
|
-
procedures/kernels one can use the shortcut written on line
|
139
|
+
procedures/kernels one can use the shortcut written on line 13 to create
|
140
140
|
a CKernel object. As we are not specifying build options the build
|
141
141
|
command can also be omitted and will be automatically called when
|
142
|
-
running the kernel the first time. Lines
|
142
|
+
running the kernel the first time. Lines 17 to 19 are used to check the
|
143
143
|
result of the kernel.
|
144
144
|
|
145
145
|
001:0> require 'BOAST'
|
@@ -168,11 +168,11 @@ result of the kernel.
|
|
168
168
|
The Canonical Case: Vector Addition
|
169
169
|
-----------------------------------
|
170
170
|
|
171
|
-
Following Listing
|
171
|
+
Following Listing shows the addition of two vectors in a third one. Here BOAST
|
172
172
|
is configured to have arrays starting at 0 and to use single precision reals by
|
173
|
-
default (Lines
|
173
|
+
default (Lines 5 and 6). The kernel declaration is encapsulated inside a method
|
174
174
|
to avoid cluttering the global namespace. Line 15 the expression `c[i] === a[i]+ b[i]`
|
175
|
-
is stored inside a variable *expr* for later use. Lines
|
175
|
+
is stored inside a variable *expr* for later use. Lines 16 to 23 show
|
176
176
|
that the kernel differs depending on the target language, in CUDA and OpenCL
|
177
177
|
each thread will process one element.
|
178
178
|
|
@@ -208,8 +208,8 @@ end
|
|
208
208
|
Following Listing shows the a way to check the validity of the previous kernel
|
209
209
|
over the available range of languages. The options that are passed to run are
|
210
210
|
only relevant for GPU languages and are thus ignored in FORTRAN and C
|
211
|
-
(Line
|
212
|
-
is raised (Lines
|
211
|
+
(Line 16). Success is only printed if results are validated, else an exception
|
212
|
+
is raised (Lines 17 to 20).
|
213
213
|
|
214
214
|
```ruby
|
215
215
|
n = 1024*1024
|
@@ -236,6 +236,55 @@ c_ref = a + b
|
|
236
236
|
puts "Success!"
|
237
237
|
```
|
238
238
|
|
239
|
+
Options
|
240
|
+
-------
|
241
|
+
|
242
|
+
Options can be passed through environment variables. Most BOAST states can be
|
243
|
+
set this way. Nonetheless here is a list of the most used ones, their possible values:
|
244
|
+
|
245
|
+
* BOAST_LANG: can be C, FORTRAN, OpenCL or CUDA
|
246
|
+
|
247
|
+
Compiler related:
|
248
|
+
|
249
|
+
* CC: c compiler
|
250
|
+
* CFLAGS: c compiler flags
|
251
|
+
* FC: fortran compiler
|
252
|
+
* FCFLAGS: fortran compiler flags
|
253
|
+
* CXX: c++ compiler
|
254
|
+
* CXXFLAGS: c++ compiler flags
|
255
|
+
* LD: linker (default CC)
|
256
|
+
* LDFLAGS: linker flags
|
257
|
+
* NVCC: cuda compiler
|
258
|
+
* NVCCFLAGS: cuda compiler flags
|
259
|
+
|
260
|
+
OpenCL related:
|
261
|
+
|
262
|
+
* CLFLAGS: OpenCL compilation flags
|
263
|
+
* CLPLATFORM: restricts OpenCL platforms to those that with matching CL_PLATFORM_NAME property
|
264
|
+
* CLVENDOR: restricts OpenCL platforms to those that with matching CL_PLATFORM_VENDOR property
|
265
|
+
* CLDEVICE: restricts OpenCL devices to those that with matching CL_DEVICE__NAME property
|
266
|
+
* CLDEVICETYPE: can be CPU, GPU, ACCELERATOR, CUSTOM, DEFAULT or ALL
|
267
|
+
|
268
|
+
Debug Related:
|
269
|
+
|
270
|
+
* VERBOSE: anything else than false or nil should enable, print compilation lines
|
271
|
+
* DEBUG_SOURCE: print source files before compiling them
|
272
|
+
* KEEP_TEMP: keep temporary files
|
273
|
+
* INSPECT: allow boast reflexive inspect
|
274
|
+
* DISABLE_OPENMP: forcibly disable OpenMP
|
275
|
+
|
276
|
+
Architecture related:
|
277
|
+
|
278
|
+
* MODEL: use a different model than native for -march flag (see gcc documentation for available models)
|
279
|
+
* USE_VLA: activate variable length array support in C, check the compiler support/option flags
|
280
|
+
|
281
|
+
Communication:
|
282
|
+
|
283
|
+
* ANNOTATE: enables source code YAML annotation
|
284
|
+
* ANNOTATE_LIST: coma separated list of control structure to annotate (For by default)
|
285
|
+
* ANNOTATE_LEVEL: level of recursivity for annotations
|
286
|
+
* ANNOTATE_INDEPTH_LIST: coma separated white list of control structure to recursively annotate (For by default)
|
287
|
+
|
239
288
|
Acknowledgment
|
240
289
|
--------------
|
241
290
|
|
data/lib/BOAST.rb
CHANGED
@@ -8,9 +8,11 @@ require 'BOAST/Language/Annotation.rb'
|
|
8
8
|
require 'BOAST/Language/Transitions.rb'
|
9
9
|
require 'BOAST/Language/Arithmetic.rb'
|
10
10
|
require 'BOAST/Language/Architectures.rb'
|
11
|
-
require 'BOAST/Language/
|
11
|
+
require 'BOAST/Language/ARMCPUID_by_name.rb'
|
12
|
+
require 'BOAST/Language/X86CPUID_by_name.rb'
|
12
13
|
require 'BOAST/Language/Intrinsics.rb'
|
13
14
|
require 'BOAST/Language/Operators.rb'
|
15
|
+
require 'BOAST/Language/HighLevelOperators.rb'
|
14
16
|
require 'BOAST/Language/DataTypes.rb'
|
15
17
|
require 'BOAST/Language/Expression.rb'
|
16
18
|
require 'BOAST/Language/Index.rb'
|
@@ -0,0 +1,3752 @@
|
|
1
|
+
module BOAST
|
2
|
+
ARMCPUID_by_name = {
|
3
|
+
"vadd_s8" => ["NEON", "ASIMD"],
|
4
|
+
"vaddq_s8" => ["NEON", "ASIMD"],
|
5
|
+
"vadd_s16" => ["NEON", "ASIMD"],
|
6
|
+
"vaddq_s16" => ["NEON", "ASIMD"],
|
7
|
+
"vadd_s32" => ["NEON", "ASIMD"],
|
8
|
+
"vaddq_s32" => ["NEON", "ASIMD"],
|
9
|
+
"vadd_s64" => ["NEON", "ASIMD"],
|
10
|
+
"vaddq_s64" => ["NEON", "ASIMD"],
|
11
|
+
"vadd_u8" => ["NEON", "ASIMD"],
|
12
|
+
"vaddq_u8" => ["NEON", "ASIMD"],
|
13
|
+
"vadd_u16" => ["NEON", "ASIMD"],
|
14
|
+
"vaddq_u16" => ["NEON", "ASIMD"],
|
15
|
+
"vadd_u32" => ["NEON", "ASIMD"],
|
16
|
+
"vaddq_u32" => ["NEON", "ASIMD"],
|
17
|
+
"vadd_u64" => ["NEON", "ASIMD"],
|
18
|
+
"vaddq_u64" => ["NEON", "ASIMD"],
|
19
|
+
"vadd_f32" => ["NEON", "ASIMD"],
|
20
|
+
"vaddq_f32" => ["NEON", "ASIMD"],
|
21
|
+
"vadd_f64" => ["ASIMD"],
|
22
|
+
"vaddq_f64" => ["ASIMD"],
|
23
|
+
"vaddd_s64" => ["ASIMD"],
|
24
|
+
"vaddd_u64" => ["ASIMD"],
|
25
|
+
"vaddl_s8" => ["NEON", "ASIMD"],
|
26
|
+
"vaddl_s16" => ["NEON", "ASIMD"],
|
27
|
+
"vaddl_s32" => ["NEON", "ASIMD"],
|
28
|
+
"vaddl_u8" => ["NEON", "ASIMD"],
|
29
|
+
"vaddl_u16" => ["NEON", "ASIMD"],
|
30
|
+
"vaddl_u32" => ["NEON", "ASIMD"],
|
31
|
+
"vaddl_high_s8" => ["ASIMD"],
|
32
|
+
"vaddl_high_s16" => ["ASIMD"],
|
33
|
+
"vaddl_high_s32" => ["ASIMD"],
|
34
|
+
"vaddl_high_u8" => ["ASIMD"],
|
35
|
+
"vaddl_high_u16" => ["ASIMD"],
|
36
|
+
"vaddl_high_u32" => ["ASIMD"],
|
37
|
+
"vaddw_s8" => ["NEON", "ASIMD"],
|
38
|
+
"vaddw_s16" => ["NEON", "ASIMD"],
|
39
|
+
"vaddw_s32" => ["NEON", "ASIMD"],
|
40
|
+
"vaddw_u8" => ["NEON", "ASIMD"],
|
41
|
+
"vaddw_u16" => ["NEON", "ASIMD"],
|
42
|
+
"vaddw_u32" => ["NEON", "ASIMD"],
|
43
|
+
"vaddw_high_s8" => ["ASIMD"],
|
44
|
+
"vaddw_high_s16" => ["ASIMD"],
|
45
|
+
"vaddw_high_s32" => ["ASIMD"],
|
46
|
+
"vaddw_high_u8" => ["ASIMD"],
|
47
|
+
"vaddw_high_u16" => ["ASIMD"],
|
48
|
+
"vaddw_high_u32" => ["ASIMD"],
|
49
|
+
"vhadd_s8" => ["NEON", "ASIMD"],
|
50
|
+
"vhaddq_s8" => ["NEON", "ASIMD"],
|
51
|
+
"vhadd_s16" => ["NEON", "ASIMD"],
|
52
|
+
"vhaddq_s16" => ["NEON", "ASIMD"],
|
53
|
+
"vhadd_s32" => ["NEON", "ASIMD"],
|
54
|
+
"vhaddq_s32" => ["NEON", "ASIMD"],
|
55
|
+
"vhadd_u8" => ["NEON", "ASIMD"],
|
56
|
+
"vhaddq_u8" => ["NEON", "ASIMD"],
|
57
|
+
"vhadd_u16" => ["NEON", "ASIMD"],
|
58
|
+
"vhaddq_u16" => ["NEON", "ASIMD"],
|
59
|
+
"vhadd_u32" => ["NEON", "ASIMD"],
|
60
|
+
"vhaddq_u32" => ["NEON", "ASIMD"],
|
61
|
+
"vrhadd_s8" => ["NEON", "ASIMD"],
|
62
|
+
"vrhaddq_s8" => ["NEON", "ASIMD"],
|
63
|
+
"vrhadd_s16" => ["NEON", "ASIMD"],
|
64
|
+
"vrhaddq_s16" => ["NEON", "ASIMD"],
|
65
|
+
"vrhadd_s32" => ["NEON", "ASIMD"],
|
66
|
+
"vrhaddq_s32" => ["NEON", "ASIMD"],
|
67
|
+
"vrhadd_u8" => ["NEON", "ASIMD"],
|
68
|
+
"vrhaddq_u8" => ["NEON", "ASIMD"],
|
69
|
+
"vrhadd_u16" => ["NEON", "ASIMD"],
|
70
|
+
"vrhaddq_u16" => ["NEON", "ASIMD"],
|
71
|
+
"vrhadd_u32" => ["NEON", "ASIMD"],
|
72
|
+
"vrhaddq_u32" => ["NEON", "ASIMD"],
|
73
|
+
"vqadd_s8" => ["NEON", "ASIMD"],
|
74
|
+
"vqaddq_s8" => ["NEON", "ASIMD"],
|
75
|
+
"vqadd_s16" => ["NEON", "ASIMD"],
|
76
|
+
"vqaddq_s16" => ["NEON", "ASIMD"],
|
77
|
+
"vqadd_s32" => ["NEON", "ASIMD"],
|
78
|
+
"vqaddq_s32" => ["NEON", "ASIMD"],
|
79
|
+
"vqadd_s64" => ["NEON", "ASIMD"],
|
80
|
+
"vqaddq_s64" => ["NEON", "ASIMD"],
|
81
|
+
"vqadd_u8" => ["NEON", "ASIMD"],
|
82
|
+
"vqaddq_u8" => ["NEON", "ASIMD"],
|
83
|
+
"vqadd_u16" => ["NEON", "ASIMD"],
|
84
|
+
"vqaddq_u16" => ["NEON", "ASIMD"],
|
85
|
+
"vqadd_u32" => ["NEON", "ASIMD"],
|
86
|
+
"vqaddq_u32" => ["NEON", "ASIMD"],
|
87
|
+
"vqadd_u64" => ["NEON", "ASIMD"],
|
88
|
+
"vqaddq_u64" => ["NEON", "ASIMD"],
|
89
|
+
"vqaddb_s8" => ["ASIMD"],
|
90
|
+
"vqaddh_s16" => ["ASIMD"],
|
91
|
+
"vqadds_s32" => ["ASIMD"],
|
92
|
+
"vqaddd_s64" => ["ASIMD"],
|
93
|
+
"vqaddb_u8" => ["ASIMD"],
|
94
|
+
"vqaddh_u16" => ["ASIMD"],
|
95
|
+
"vqadds_u32" => ["ASIMD"],
|
96
|
+
"vqaddd_u64" => ["ASIMD"],
|
97
|
+
"vuqadd_s8" => ["ASIMD"],
|
98
|
+
"vuqaddq_s8" => ["ASIMD"],
|
99
|
+
"vuqadd_s16" => ["ASIMD"],
|
100
|
+
"vuqaddq_s16" => ["ASIMD"],
|
101
|
+
"vuqadd_s32" => ["ASIMD"],
|
102
|
+
"vuqaddq_s32" => ["ASIMD"],
|
103
|
+
"vuqadd_s64" => ["ASIMD"],
|
104
|
+
"vuqaddq_s64" => ["ASIMD"],
|
105
|
+
"vuqaddb_s8" => ["ASIMD"],
|
106
|
+
"vuqaddh_s16" => ["ASIMD"],
|
107
|
+
"vuqadds_s32" => ["ASIMD"],
|
108
|
+
"vuqaddd_s64" => ["ASIMD"],
|
109
|
+
"vsqadd_u8" => ["ASIMD"],
|
110
|
+
"vsqaddq_u8" => ["ASIMD"],
|
111
|
+
"vsqadd_u16" => ["ASIMD"],
|
112
|
+
"vsqaddq_u16" => ["ASIMD"],
|
113
|
+
"vsqadd_u32" => ["ASIMD"],
|
114
|
+
"vsqaddq_u32" => ["ASIMD"],
|
115
|
+
"vsqadd_u64" => ["ASIMD"],
|
116
|
+
"vsqaddq_u64" => ["ASIMD"],
|
117
|
+
"vsqaddb_u8" => ["ASIMD"],
|
118
|
+
"vsqaddh_u16" => ["ASIMD"],
|
119
|
+
"vsqadds_u32" => ["ASIMD"],
|
120
|
+
"vsqaddd_u64" => ["ASIMD"],
|
121
|
+
"vaddhn_s16" => ["NEON", "ASIMD"],
|
122
|
+
"vaddhn_s32" => ["NEON", "ASIMD"],
|
123
|
+
"vaddhn_s64" => ["NEON", "ASIMD"],
|
124
|
+
"vaddhn_u16" => ["NEON", "ASIMD"],
|
125
|
+
"vaddhn_u32" => ["NEON", "ASIMD"],
|
126
|
+
"vaddhn_u64" => ["NEON", "ASIMD"],
|
127
|
+
"vaddhn_high_s16" => ["ASIMD"],
|
128
|
+
"vaddhn_high_s32" => ["ASIMD"],
|
129
|
+
"vaddhn_high_s64" => ["ASIMD"],
|
130
|
+
"vaddhn_high_u16" => ["ASIMD"],
|
131
|
+
"vaddhn_high_u32" => ["ASIMD"],
|
132
|
+
"vaddhn_high_u64" => ["ASIMD"],
|
133
|
+
"vraddhn_s16" => ["NEON", "ASIMD"],
|
134
|
+
"vraddhn_s32" => ["NEON", "ASIMD"],
|
135
|
+
"vraddhn_s64" => ["NEON", "ASIMD"],
|
136
|
+
"vraddhn_u16" => ["NEON", "ASIMD"],
|
137
|
+
"vraddhn_u32" => ["NEON", "ASIMD"],
|
138
|
+
"vraddhn_u64" => ["NEON", "ASIMD"],
|
139
|
+
"vraddhn_high_s16" => ["ASIMD"],
|
140
|
+
"vraddhn_high_s32" => ["ASIMD"],
|
141
|
+
"vraddhn_high_s64" => ["ASIMD"],
|
142
|
+
"vraddhn_high_u16" => ["ASIMD"],
|
143
|
+
"vraddhn_high_u32" => ["ASIMD"],
|
144
|
+
"vraddhn_high_u64" => ["ASIMD"],
|
145
|
+
"vmul_s8" => ["NEON", "ASIMD"],
|
146
|
+
"vmulq_s8" => ["NEON", "ASIMD"],
|
147
|
+
"vmul_s16" => ["NEON", "ASIMD"],
|
148
|
+
"vmulq_s16" => ["NEON", "ASIMD"],
|
149
|
+
"vmul_s32" => ["NEON", "ASIMD"],
|
150
|
+
"vmulq_s32" => ["NEON", "ASIMD"],
|
151
|
+
"vmul_u8" => ["NEON", "ASIMD"],
|
152
|
+
"vmulq_u8" => ["NEON", "ASIMD"],
|
153
|
+
"vmul_u16" => ["NEON", "ASIMD"],
|
154
|
+
"vmulq_u16" => ["NEON", "ASIMD"],
|
155
|
+
"vmul_u32" => ["NEON", "ASIMD"],
|
156
|
+
"vmulq_u32" => ["NEON", "ASIMD"],
|
157
|
+
"vmul_f32" => ["NEON", "ASIMD"],
|
158
|
+
"vmulq_f32" => ["NEON", "ASIMD"],
|
159
|
+
"vmul_p8" => ["NEON", "ASIMD"],
|
160
|
+
"vmulq_p8" => ["NEON", "ASIMD"],
|
161
|
+
"vmul_f64" => ["ASIMD"],
|
162
|
+
"vmulq_f64" => ["ASIMD"],
|
163
|
+
"vmulx_f32" => ["ASIMD"],
|
164
|
+
"vmulxq_f32" => ["ASIMD"],
|
165
|
+
"vmulx_f64" => ["ASIMD"],
|
166
|
+
"vmulxq_f64" => ["ASIMD"],
|
167
|
+
"vmulxs_f32" => ["ASIMD"],
|
168
|
+
"vmulxd_f64" => ["ASIMD"],
|
169
|
+
"vmulx_lane_f32" => ["ASIMD"],
|
170
|
+
"vmulxq_lane_f32" => ["ASIMD"],
|
171
|
+
"vmulx_lane_f64" => ["ASIMD"],
|
172
|
+
"vmulxq_lane_f64" => ["ASIMD"],
|
173
|
+
"vmulxs_lane_f32" => ["ASIMD"],
|
174
|
+
"vmulxd_lane_f64" => ["ASIMD"],
|
175
|
+
"vmulx_laneq_f32" => ["ASIMD"],
|
176
|
+
"vmulxq_laneq_f32" => ["ASIMD"],
|
177
|
+
"vmulx_laneq_f64" => ["ASIMD"],
|
178
|
+
"vmulxq_laneq_f64" => ["ASIMD"],
|
179
|
+
"vmulxs_laneq_f32" => ["ASIMD"],
|
180
|
+
"vmulxd_laneq_f64" => ["ASIMD"],
|
181
|
+
"vdiv_f32" => ["ASIMD"],
|
182
|
+
"vdivq_f32" => ["ASIMD"],
|
183
|
+
"vdiv_f64" => ["ASIMD"],
|
184
|
+
"vdivq_f64" => ["ASIMD"],
|
185
|
+
"vmla_s8" => ["NEON", "ASIMD"],
|
186
|
+
"vmlaq_s8" => ["NEON", "ASIMD"],
|
187
|
+
"vmla_s16" => ["NEON", "ASIMD"],
|
188
|
+
"vmlaq_s16" => ["NEON", "ASIMD"],
|
189
|
+
"vmla_s32" => ["NEON", "ASIMD"],
|
190
|
+
"vmlaq_s32" => ["NEON", "ASIMD"],
|
191
|
+
"vmla_u8" => ["NEON", "ASIMD"],
|
192
|
+
"vmlaq_u8" => ["NEON", "ASIMD"],
|
193
|
+
"vmla_u16" => ["NEON", "ASIMD"],
|
194
|
+
"vmlaq_u16" => ["NEON", "ASIMD"],
|
195
|
+
"vmla_u32" => ["NEON", "ASIMD"],
|
196
|
+
"vmlaq_u32" => ["NEON", "ASIMD"],
|
197
|
+
"vmla_f32" => ["NEON", "ASIMD"],
|
198
|
+
"vmlaq_f32" => ["NEON", "ASIMD"],
|
199
|
+
"vmla_f64" => ["ASIMD"],
|
200
|
+
"vmlaq_f64" => ["ASIMD"],
|
201
|
+
"vmlal_s8" => ["NEON", "ASIMD"],
|
202
|
+
"vmlal_s16" => ["NEON", "ASIMD"],
|
203
|
+
"vmlal_s32" => ["NEON", "ASIMD"],
|
204
|
+
"vmlal_u8" => ["NEON", "ASIMD"],
|
205
|
+
"vmlal_u16" => ["NEON", "ASIMD"],
|
206
|
+
"vmlal_u32" => ["NEON", "ASIMD"],
|
207
|
+
"vmlal_high_s8" => ["ASIMD"],
|
208
|
+
"vmlal_high_s16" => ["ASIMD"],
|
209
|
+
"vmlal_high_s32" => ["ASIMD"],
|
210
|
+
"vmlal_high_u8" => ["ASIMD"],
|
211
|
+
"vmlal_high_u16" => ["ASIMD"],
|
212
|
+
"vmlal_high_u32" => ["ASIMD"],
|
213
|
+
"vmls_s8" => ["NEON", "ASIMD"],
|
214
|
+
"vmlsq_s8" => ["NEON", "ASIMD"],
|
215
|
+
"vmls_s16" => ["NEON", "ASIMD"],
|
216
|
+
"vmlsq_s16" => ["NEON", "ASIMD"],
|
217
|
+
"vmls_s32" => ["NEON", "ASIMD"],
|
218
|
+
"vmlsq_s32" => ["NEON", "ASIMD"],
|
219
|
+
"vmls_u8" => ["NEON", "ASIMD"],
|
220
|
+
"vmlsq_u8" => ["NEON", "ASIMD"],
|
221
|
+
"vmls_u16" => ["NEON", "ASIMD"],
|
222
|
+
"vmlsq_u16" => ["NEON", "ASIMD"],
|
223
|
+
"vmls_u32" => ["NEON", "ASIMD"],
|
224
|
+
"vmlsq_u32" => ["NEON", "ASIMD"],
|
225
|
+
"vmls_f32" => ["NEON", "ASIMD"],
|
226
|
+
"vmlsq_f32" => ["NEON", "ASIMD"],
|
227
|
+
"vmls_f64" => ["ASIMD"],
|
228
|
+
"vmlsq_f64" => ["ASIMD"],
|
229
|
+
"vmlsl_s8" => ["NEON", "ASIMD"],
|
230
|
+
"vmlsl_s16" => ["NEON", "ASIMD"],
|
231
|
+
"vmlsl_s32" => ["NEON", "ASIMD"],
|
232
|
+
"vmlsl_u8" => ["NEON", "ASIMD"],
|
233
|
+
"vmlsl_u16" => ["NEON", "ASIMD"],
|
234
|
+
"vmlsl_u32" => ["NEON", "ASIMD"],
|
235
|
+
"vmlsl_high_s8" => ["ASIMD"],
|
236
|
+
"vmlsl_high_s16" => ["ASIMD"],
|
237
|
+
"vmlsl_high_s32" => ["ASIMD"],
|
238
|
+
"vmlsl_high_u8" => ["ASIMD"],
|
239
|
+
"vmlsl_high_u16" => ["ASIMD"],
|
240
|
+
"vmlsl_high_u32" => ["ASIMD"],
|
241
|
+
"vfma_f32" => ["NEON", "ASIMD"],
|
242
|
+
"vfmaq_f32" => ["NEON", "ASIMD"],
|
243
|
+
"vfma_f64" => ["ASIMD"],
|
244
|
+
"vfmaq_f64" => ["ASIMD"],
|
245
|
+
"vfma_lane_f32" => ["ASIMD"],
|
246
|
+
"vfmaq_lane_f32" => ["ASIMD"],
|
247
|
+
"vfma_lane_f64" => ["ASIMD"],
|
248
|
+
"vfmaq_lane_f64" => ["ASIMD"],
|
249
|
+
"vfmas_lane_f32" => ["ASIMD"],
|
250
|
+
"vfmad_lane_f64" => ["ASIMD"],
|
251
|
+
"vfma_laneq_f32" => ["ASIMD"],
|
252
|
+
"vfmaq_laneq_f32" => ["ASIMD"],
|
253
|
+
"vfma_laneq_f64" => ["ASIMD"],
|
254
|
+
"vfmaq_laneq_f64" => ["ASIMD"],
|
255
|
+
"vfmas_laneq_f32" => ["ASIMD"],
|
256
|
+
"vfmad_laneq_f64" => ["ASIMD"],
|
257
|
+
"vfms_f32" => ["NEON", "ASIMD"],
|
258
|
+
"vfmsq_f32" => ["NEON", "ASIMD"],
|
259
|
+
"vfms_f64" => ["ASIMD"],
|
260
|
+
"vfmsq_f64" => ["ASIMD"],
|
261
|
+
"vfms_lane_f32" => ["ASIMD"],
|
262
|
+
"vfmsq_lane_f32" => ["ASIMD"],
|
263
|
+
"vfms_lane_f64" => ["ASIMD"],
|
264
|
+
"vfmsq_lane_f64" => ["ASIMD"],
|
265
|
+
"vfmss_lane_f32" => ["ASIMD"],
|
266
|
+
"vfmsd_lane_f64" => ["ASIMD"],
|
267
|
+
"vfms_laneq_f32" => ["ASIMD"],
|
268
|
+
"vfmsq_laneq_f32" => ["ASIMD"],
|
269
|
+
"vfms_laneq_f64" => ["ASIMD"],
|
270
|
+
"vfmsq_laneq_f64" => ["ASIMD"],
|
271
|
+
"vfmss_laneq_f32" => ["ASIMD"],
|
272
|
+
"vfmsd_laneq_f64" => ["ASIMD"],
|
273
|
+
"vqdmulh_s16" => ["NEON", "ASIMD"],
|
274
|
+
"vqdmulhq_s16" => ["NEON", "ASIMD"],
|
275
|
+
"vqdmulh_s32" => ["NEON", "ASIMD"],
|
276
|
+
"vqdmulhq_s32" => ["NEON", "ASIMD"],
|
277
|
+
"vqdmulhh_s16" => ["ASIMD"],
|
278
|
+
"vqdmulhs_s32" => ["ASIMD"],
|
279
|
+
"vqrdmulh_s16" => ["NEON", "ASIMD"],
|
280
|
+
"vqrdmulhq_s16" => ["NEON", "ASIMD"],
|
281
|
+
"vqrdmulh_s32" => ["NEON", "ASIMD"],
|
282
|
+
"vqrdmulhq_s32" => ["NEON", "ASIMD"],
|
283
|
+
"vqrdmulhh_s16" => ["ASIMD"],
|
284
|
+
"vqrdmulhs_s32" => ["ASIMD"],
|
285
|
+
"vqrdmlah_s16" => ["ASIMD"],
|
286
|
+
"vqrdmlahq_s16" => ["ASIMD"],
|
287
|
+
"vqrdmlah_s32" => ["ASIMD"],
|
288
|
+
"vqrdmlahq_s32" => ["ASIMD"],
|
289
|
+
"vqrdmlahh_s16" => ["ASIMD"],
|
290
|
+
"vqrdmlahs_s32" => ["ASIMD"],
|
291
|
+
"vqrdmlsh_s16" => ["ASIMD"],
|
292
|
+
"vqrdmlshq_s16" => ["ASIMD"],
|
293
|
+
"vqrdmlsh_s32" => ["ASIMD"],
|
294
|
+
"vqrdmlshq_s32" => ["ASIMD"],
|
295
|
+
"vqrdmlshh_s16" => ["ASIMD"],
|
296
|
+
"vqrdmlshs_s32" => ["ASIMD"],
|
297
|
+
"vqdmlal_s16" => ["NEON", "ASIMD"],
|
298
|
+
"vqdmlal_s32" => ["NEON", "ASIMD"],
|
299
|
+
"vqdmlalh_s16" => ["ASIMD"],
|
300
|
+
"vqdmlals_s32" => ["ASIMD"],
|
301
|
+
"vqdmlal_high_s16" => ["ASIMD"],
|
302
|
+
"vqdmlal_high_s32" => ["ASIMD"],
|
303
|
+
"vqdmlsl_s16" => ["NEON", "ASIMD"],
|
304
|
+
"vqdmlsl_s32" => ["NEON", "ASIMD"],
|
305
|
+
"vqdmlslh_s16" => ["ASIMD"],
|
306
|
+
"vqdmlsls_s32" => ["ASIMD"],
|
307
|
+
"vqdmlsl_high_s16" => ["ASIMD"],
|
308
|
+
"vqdmlsl_high_s32" => ["ASIMD"],
|
309
|
+
"vmull_s8" => ["NEON", "ASIMD"],
|
310
|
+
"vmull_s16" => ["NEON", "ASIMD"],
|
311
|
+
"vmull_s32" => ["NEON", "ASIMD"],
|
312
|
+
"vmull_u8" => ["NEON", "ASIMD"],
|
313
|
+
"vmull_u16" => ["NEON", "ASIMD"],
|
314
|
+
"vmull_u32" => ["NEON", "ASIMD"],
|
315
|
+
"vmull_p8" => ["NEON", "ASIMD"],
|
316
|
+
"vmull_high_s8" => ["ASIMD"],
|
317
|
+
"vmull_high_s16" => ["ASIMD"],
|
318
|
+
"vmull_high_s32" => ["ASIMD"],
|
319
|
+
"vmull_high_u8" => ["ASIMD"],
|
320
|
+
"vmull_high_u16" => ["ASIMD"],
|
321
|
+
"vmull_high_u32" => ["ASIMD"],
|
322
|
+
"vmull_high_p8" => ["ASIMD"],
|
323
|
+
"vqdmull_s16" => ["NEON", "ASIMD"],
|
324
|
+
"vqdmull_s32" => ["NEON", "ASIMD"],
|
325
|
+
"vqdmullh_s16" => ["ASIMD"],
|
326
|
+
"vqdmulls_s32" => ["ASIMD"],
|
327
|
+
"vqdmull_high_s16" => ["ASIMD"],
|
328
|
+
"vqdmull_high_s32" => ["ASIMD"],
|
329
|
+
"vsub_s8" => ["NEON", "ASIMD"],
|
330
|
+
"vsubq_s8" => ["NEON", "ASIMD"],
|
331
|
+
"vsub_s16" => ["NEON", "ASIMD"],
|
332
|
+
"vsubq_s16" => ["NEON", "ASIMD"],
|
333
|
+
"vsub_s32" => ["NEON", "ASIMD"],
|
334
|
+
"vsubq_s32" => ["NEON", "ASIMD"],
|
335
|
+
"vsub_s64" => ["NEON", "ASIMD"],
|
336
|
+
"vsubq_s64" => ["NEON", "ASIMD"],
|
337
|
+
"vsub_u8" => ["NEON", "ASIMD"],
|
338
|
+
"vsubq_u8" => ["NEON", "ASIMD"],
|
339
|
+
"vsub_u16" => ["NEON", "ASIMD"],
|
340
|
+
"vsubq_u16" => ["NEON", "ASIMD"],
|
341
|
+
"vsub_u32" => ["NEON", "ASIMD"],
|
342
|
+
"vsubq_u32" => ["NEON", "ASIMD"],
|
343
|
+
"vsub_u64" => ["NEON", "ASIMD"],
|
344
|
+
"vsubq_u64" => ["NEON", "ASIMD"],
|
345
|
+
"vsub_f32" => ["NEON", "ASIMD"],
|
346
|
+
"vsubq_f32" => ["NEON", "ASIMD"],
|
347
|
+
"vsub_f64" => ["ASIMD"],
|
348
|
+
"vsubq_f64" => ["ASIMD"],
|
349
|
+
"vsubd_s64" => ["ASIMD"],
|
350
|
+
"vsubd_u64" => ["ASIMD"],
|
351
|
+
"vsubl_s8" => ["NEON", "ASIMD"],
|
352
|
+
"vsubl_s16" => ["NEON", "ASIMD"],
|
353
|
+
"vsubl_s32" => ["NEON", "ASIMD"],
|
354
|
+
"vsubl_u8" => ["NEON", "ASIMD"],
|
355
|
+
"vsubl_u16" => ["NEON", "ASIMD"],
|
356
|
+
"vsubl_u32" => ["NEON", "ASIMD"],
|
357
|
+
"vsubl_high_s8" => ["ASIMD"],
|
358
|
+
"vsubl_high_s16" => ["ASIMD"],
|
359
|
+
"vsubl_high_s32" => ["ASIMD"],
|
360
|
+
"vsubl_high_u8" => ["ASIMD"],
|
361
|
+
"vsubl_high_u16" => ["ASIMD"],
|
362
|
+
"vsubl_high_u32" => ["ASIMD"],
|
363
|
+
"vsubw_s8" => ["NEON", "ASIMD"],
|
364
|
+
"vsubw_s16" => ["NEON", "ASIMD"],
|
365
|
+
"vsubw_s32" => ["NEON", "ASIMD"],
|
366
|
+
"vsubw_u8" => ["NEON", "ASIMD"],
|
367
|
+
"vsubw_u16" => ["NEON", "ASIMD"],
|
368
|
+
"vsubw_u32" => ["NEON", "ASIMD"],
|
369
|
+
"vsubw_high_s8" => ["ASIMD"],
|
370
|
+
"vsubw_high_s16" => ["ASIMD"],
|
371
|
+
"vsubw_high_s32" => ["ASIMD"],
|
372
|
+
"vsubw_high_u8" => ["ASIMD"],
|
373
|
+
"vsubw_high_u16" => ["ASIMD"],
|
374
|
+
"vsubw_high_u32" => ["ASIMD"],
|
375
|
+
"vhsub_s8" => ["NEON", "ASIMD"],
|
376
|
+
"vhsubq_s8" => ["NEON", "ASIMD"],
|
377
|
+
"vhsub_s16" => ["NEON", "ASIMD"],
|
378
|
+
"vhsubq_s16" => ["NEON", "ASIMD"],
|
379
|
+
"vhsub_s32" => ["NEON", "ASIMD"],
|
380
|
+
"vhsubq_s32" => ["NEON", "ASIMD"],
|
381
|
+
"vhsub_u8" => ["NEON", "ASIMD"],
|
382
|
+
"vhsubq_u8" => ["NEON", "ASIMD"],
|
383
|
+
"vhsub_u16" => ["NEON", "ASIMD"],
|
384
|
+
"vhsubq_u16" => ["NEON", "ASIMD"],
|
385
|
+
"vhsub_u32" => ["NEON", "ASIMD"],
|
386
|
+
"vhsubq_u32" => ["NEON", "ASIMD"],
|
387
|
+
"vqsub_s8" => ["NEON", "ASIMD"],
|
388
|
+
"vqsubq_s8" => ["NEON", "ASIMD"],
|
389
|
+
"vqsub_s16" => ["NEON", "ASIMD"],
|
390
|
+
"vqsubq_s16" => ["NEON", "ASIMD"],
|
391
|
+
"vqsub_s32" => ["NEON", "ASIMD"],
|
392
|
+
"vqsubq_s32" => ["NEON", "ASIMD"],
|
393
|
+
"vqsub_s64" => ["NEON", "ASIMD"],
|
394
|
+
"vqsubq_s64" => ["NEON", "ASIMD"],
|
395
|
+
"vqsub_u8" => ["NEON", "ASIMD"],
|
396
|
+
"vqsubq_u8" => ["NEON", "ASIMD"],
|
397
|
+
"vqsub_u16" => ["NEON", "ASIMD"],
|
398
|
+
"vqsubq_u16" => ["NEON", "ASIMD"],
|
399
|
+
"vqsub_u32" => ["NEON", "ASIMD"],
|
400
|
+
"vqsubq_u32" => ["NEON", "ASIMD"],
|
401
|
+
"vqsub_u64" => ["NEON", "ASIMD"],
|
402
|
+
"vqsubq_u64" => ["NEON", "ASIMD"],
|
403
|
+
"vqsubb_s8" => ["ASIMD"],
|
404
|
+
"vqsubh_s16" => ["ASIMD"],
|
405
|
+
"vqsubs_s32" => ["ASIMD"],
|
406
|
+
"vqsubd_s64" => ["ASIMD"],
|
407
|
+
"vqsubb_u8" => ["ASIMD"],
|
408
|
+
"vqsubh_u16" => ["ASIMD"],
|
409
|
+
"vqsubs_u32" => ["ASIMD"],
|
410
|
+
"vqsubd_u64" => ["ASIMD"],
|
411
|
+
"vsubhn_s16" => ["NEON", "ASIMD"],
|
412
|
+
"vsubhn_s32" => ["NEON", "ASIMD"],
|
413
|
+
"vsubhn_s64" => ["NEON", "ASIMD"],
|
414
|
+
"vsubhn_u16" => ["NEON", "ASIMD"],
|
415
|
+
"vsubhn_u32" => ["NEON", "ASIMD"],
|
416
|
+
"vsubhn_u64" => ["NEON", "ASIMD"],
|
417
|
+
"vsubhn_high_s16" => ["ASIMD"],
|
418
|
+
"vsubhn_high_s32" => ["ASIMD"],
|
419
|
+
"vsubhn_high_s64" => ["ASIMD"],
|
420
|
+
"vsubhn_high_u16" => ["ASIMD"],
|
421
|
+
"vsubhn_high_u32" => ["ASIMD"],
|
422
|
+
"vsubhn_high_u64" => ["ASIMD"],
|
423
|
+
"vrsubhn_s16" => ["NEON", "ASIMD"],
|
424
|
+
"vrsubhn_s32" => ["NEON", "ASIMD"],
|
425
|
+
"vrsubhn_s64" => ["NEON", "ASIMD"],
|
426
|
+
"vrsubhn_u16" => ["NEON", "ASIMD"],
|
427
|
+
"vrsubhn_u32" => ["NEON", "ASIMD"],
|
428
|
+
"vrsubhn_u64" => ["NEON", "ASIMD"],
|
429
|
+
"vrsubhn_high_s16" => ["ASIMD"],
|
430
|
+
"vrsubhn_high_s32" => ["ASIMD"],
|
431
|
+
"vrsubhn_high_s64" => ["ASIMD"],
|
432
|
+
"vrsubhn_high_u16" => ["ASIMD"],
|
433
|
+
"vrsubhn_high_u32" => ["ASIMD"],
|
434
|
+
"vrsubhn_high_u64" => ["ASIMD"],
|
435
|
+
"vceq_s8" => ["NEON", "ASIMD"],
|
436
|
+
"vceqq_s8" => ["NEON", "ASIMD"],
|
437
|
+
"vceq_s16" => ["NEON", "ASIMD"],
|
438
|
+
"vceqq_s16" => ["NEON", "ASIMD"],
|
439
|
+
"vceq_s32" => ["NEON", "ASIMD"],
|
440
|
+
"vceqq_s32" => ["NEON", "ASIMD"],
|
441
|
+
"vceq_u8" => ["NEON", "ASIMD"],
|
442
|
+
"vceqq_u8" => ["NEON", "ASIMD"],
|
443
|
+
"vceq_u16" => ["NEON", "ASIMD"],
|
444
|
+
"vceqq_u16" => ["NEON", "ASIMD"],
|
445
|
+
"vceq_u32" => ["NEON", "ASIMD"],
|
446
|
+
"vceqq_u32" => ["NEON", "ASIMD"],
|
447
|
+
"vceq_f32" => ["NEON", "ASIMD"],
|
448
|
+
"vceqq_f32" => ["NEON", "ASIMD"],
|
449
|
+
"vceq_p8" => ["NEON", "ASIMD"],
|
450
|
+
"vceqq_p8" => ["NEON", "ASIMD"],
|
451
|
+
"vceq_s64" => ["ASIMD"],
|
452
|
+
"vceqq_s64" => ["ASIMD"],
|
453
|
+
"vceq_u64" => ["ASIMD"],
|
454
|
+
"vceqq_u64" => ["ASIMD"],
|
455
|
+
"vceq_p64" => ["ASIMD"],
|
456
|
+
"vceqq_p64" => ["ASIMD"],
|
457
|
+
"vceq_f64" => ["ASIMD"],
|
458
|
+
"vceqq_f64" => ["ASIMD"],
|
459
|
+
"vceqd_s64" => ["ASIMD"],
|
460
|
+
"vceqd_u64" => ["ASIMD"],
|
461
|
+
"vceqs_f32" => ["ASIMD"],
|
462
|
+
"vceqd_f64" => ["ASIMD"],
|
463
|
+
"vceqz_s8" => ["ASIMD"],
|
464
|
+
"vceqzq_s8" => ["ASIMD"],
|
465
|
+
"vceqz_s16" => ["ASIMD"],
|
466
|
+
"vceqzq_s16" => ["ASIMD"],
|
467
|
+
"vceqz_s32" => ["ASIMD"],
|
468
|
+
"vceqzq_s32" => ["ASIMD"],
|
469
|
+
"vceqz_u8" => ["ASIMD"],
|
470
|
+
"vceqzq_u8" => ["ASIMD"],
|
471
|
+
"vceqz_u16" => ["ASIMD"],
|
472
|
+
"vceqzq_u16" => ["ASIMD"],
|
473
|
+
"vceqz_u32" => ["ASIMD"],
|
474
|
+
"vceqzq_u32" => ["ASIMD"],
|
475
|
+
"vceqz_f32" => ["ASIMD"],
|
476
|
+
"vceqzq_f32" => ["ASIMD"],
|
477
|
+
"vceqz_p8" => ["ASIMD"],
|
478
|
+
"vceqzq_p8" => ["ASIMD"],
|
479
|
+
"vceqz_s64" => ["ASIMD"],
|
480
|
+
"vceqzq_s64" => ["ASIMD"],
|
481
|
+
"vceqz_u64" => ["ASIMD"],
|
482
|
+
"vceqzq_u64" => ["ASIMD"],
|
483
|
+
"vceqz_p64" => ["ASIMD"],
|
484
|
+
"vceqzq_p64" => ["ASIMD"],
|
485
|
+
"vceqz_f64" => ["ASIMD"],
|
486
|
+
"vceqzq_f64" => ["ASIMD"],
|
487
|
+
"vceqzd_s64" => ["ASIMD"],
|
488
|
+
"vceqzd_u64" => ["ASIMD"],
|
489
|
+
"vceqzs_f32" => ["ASIMD"],
|
490
|
+
"vceqzd_f64" => ["ASIMD"],
|
491
|
+
"vcge_s8" => ["NEON", "ASIMD"],
|
492
|
+
"vcgeq_s8" => ["NEON", "ASIMD"],
|
493
|
+
"vcge_s16" => ["NEON", "ASIMD"],
|
494
|
+
"vcgeq_s16" => ["NEON", "ASIMD"],
|
495
|
+
"vcge_s32" => ["NEON", "ASIMD"],
|
496
|
+
"vcgeq_s32" => ["NEON", "ASIMD"],
|
497
|
+
"vcge_u8" => ["NEON", "ASIMD"],
|
498
|
+
"vcgeq_u8" => ["NEON", "ASIMD"],
|
499
|
+
"vcge_u16" => ["NEON", "ASIMD"],
|
500
|
+
"vcgeq_u16" => ["NEON", "ASIMD"],
|
501
|
+
"vcge_u32" => ["NEON", "ASIMD"],
|
502
|
+
"vcgeq_u32" => ["NEON", "ASIMD"],
|
503
|
+
"vcge_f32" => ["NEON", "ASIMD"],
|
504
|
+
"vcgeq_f32" => ["NEON", "ASIMD"],
|
505
|
+
"vcge_s64" => ["ASIMD"],
|
506
|
+
"vcgeq_s64" => ["ASIMD"],
|
507
|
+
"vcge_u64" => ["ASIMD"],
|
508
|
+
"vcgeq_u64" => ["ASIMD"],
|
509
|
+
"vcge_f64" => ["ASIMD"],
|
510
|
+
"vcgeq_f64" => ["ASIMD"],
|
511
|
+
"vcged_s64" => ["ASIMD"],
|
512
|
+
"vcged_u64" => ["ASIMD"],
|
513
|
+
"vcges_f32" => ["ASIMD"],
|
514
|
+
"vcged_f64" => ["ASIMD"],
|
515
|
+
"vcgez_s8" => ["ASIMD"],
|
516
|
+
"vcgezq_s8" => ["ASIMD"],
|
517
|
+
"vcgez_s16" => ["ASIMD"],
|
518
|
+
"vcgezq_s16" => ["ASIMD"],
|
519
|
+
"vcgez_s32" => ["ASIMD"],
|
520
|
+
"vcgezq_s32" => ["ASIMD"],
|
521
|
+
"vcgez_s64" => ["ASIMD"],
|
522
|
+
"vcgezq_s64" => ["ASIMD"],
|
523
|
+
"vcgez_f32" => ["ASIMD"],
|
524
|
+
"vcgezq_f32" => ["ASIMD"],
|
525
|
+
"vcgez_f64" => ["ASIMD"],
|
526
|
+
"vcgezq_f64" => ["ASIMD"],
|
527
|
+
"vcgezd_s64" => ["ASIMD"],
|
528
|
+
"vcgezs_f32" => ["ASIMD"],
|
529
|
+
"vcgezd_f64" => ["ASIMD"],
|
530
|
+
"vcle_s8" => ["NEON", "ASIMD"],
|
531
|
+
"vcleq_s8" => ["NEON", "ASIMD"],
|
532
|
+
"vcle_s16" => ["NEON", "ASIMD"],
|
533
|
+
"vcleq_s16" => ["NEON", "ASIMD"],
|
534
|
+
"vcle_s32" => ["NEON", "ASIMD"],
|
535
|
+
"vcleq_s32" => ["NEON", "ASIMD"],
|
536
|
+
"vcle_u8" => ["NEON", "ASIMD"],
|
537
|
+
"vcleq_u8" => ["NEON", "ASIMD"],
|
538
|
+
"vcle_u16" => ["NEON", "ASIMD"],
|
539
|
+
"vcleq_u16" => ["NEON", "ASIMD"],
|
540
|
+
"vcle_u32" => ["NEON", "ASIMD"],
|
541
|
+
"vcleq_u32" => ["NEON", "ASIMD"],
|
542
|
+
"vcle_f32" => ["NEON", "ASIMD"],
|
543
|
+
"vcleq_f32" => ["NEON", "ASIMD"],
|
544
|
+
"vcle_s64" => ["ASIMD"],
|
545
|
+
"vcleq_s64" => ["ASIMD"],
|
546
|
+
"vcle_u64" => ["ASIMD"],
|
547
|
+
"vcleq_u64" => ["ASIMD"],
|
548
|
+
"vcle_f64" => ["ASIMD"],
|
549
|
+
"vcleq_f64" => ["ASIMD"],
|
550
|
+
"vcled_s64" => ["ASIMD"],
|
551
|
+
"vcled_u64" => ["ASIMD"],
|
552
|
+
"vcles_f32" => ["ASIMD"],
|
553
|
+
"vcled_f64" => ["ASIMD"],
|
554
|
+
"vclez_s8" => ["ASIMD"],
|
555
|
+
"vclezq_s8" => ["ASIMD"],
|
556
|
+
"vclez_s16" => ["ASIMD"],
|
557
|
+
"vclezq_s16" => ["ASIMD"],
|
558
|
+
"vclez_s32" => ["ASIMD"],
|
559
|
+
"vclezq_s32" => ["ASIMD"],
|
560
|
+
"vclez_s64" => ["ASIMD"],
|
561
|
+
"vclezq_s64" => ["ASIMD"],
|
562
|
+
"vclez_f32" => ["ASIMD"],
|
563
|
+
"vclezq_f32" => ["ASIMD"],
|
564
|
+
"vclez_f64" => ["ASIMD"],
|
565
|
+
"vclezq_f64" => ["ASIMD"],
|
566
|
+
"vclezd_s64" => ["ASIMD"],
|
567
|
+
"vclezs_f32" => ["ASIMD"],
|
568
|
+
"vclezd_f64" => ["ASIMD"],
|
569
|
+
"vcgt_s8" => ["NEON", "ASIMD"],
|
570
|
+
"vcgtq_s8" => ["NEON", "ASIMD"],
|
571
|
+
"vcgt_s16" => ["NEON", "ASIMD"],
|
572
|
+
"vcgtq_s16" => ["NEON", "ASIMD"],
|
573
|
+
"vcgt_s32" => ["NEON", "ASIMD"],
|
574
|
+
"vcgtq_s32" => ["NEON", "ASIMD"],
|
575
|
+
"vcgt_u8" => ["NEON", "ASIMD"],
|
576
|
+
"vcgtq_u8" => ["NEON", "ASIMD"],
|
577
|
+
"vcgt_u16" => ["NEON", "ASIMD"],
|
578
|
+
"vcgtq_u16" => ["NEON", "ASIMD"],
|
579
|
+
"vcgt_u32" => ["NEON", "ASIMD"],
|
580
|
+
"vcgtq_u32" => ["NEON", "ASIMD"],
|
581
|
+
"vcgt_f32" => ["NEON", "ASIMD"],
|
582
|
+
"vcgtq_f32" => ["NEON", "ASIMD"],
|
583
|
+
"vcgt_s64" => ["ASIMD"],
|
584
|
+
"vcgtq_s64" => ["ASIMD"],
|
585
|
+
"vcgt_u64" => ["ASIMD"],
|
586
|
+
"vcgtq_u64" => ["ASIMD"],
|
587
|
+
"vcgt_f64" => ["ASIMD"],
|
588
|
+
"vcgtq_f64" => ["ASIMD"],
|
589
|
+
"vcgtd_s64" => ["ASIMD"],
|
590
|
+
"vcgtd_u64" => ["ASIMD"],
|
591
|
+
"vcgts_f32" => ["ASIMD"],
|
592
|
+
"vcgtd_f64" => ["ASIMD"],
|
593
|
+
"vcgtz_s8" => ["ASIMD"],
|
594
|
+
"vcgtzq_s8" => ["ASIMD"],
|
595
|
+
"vcgtz_s16" => ["ASIMD"],
|
596
|
+
"vcgtzq_s16" => ["ASIMD"],
|
597
|
+
"vcgtz_s32" => ["ASIMD"],
|
598
|
+
"vcgtzq_s32" => ["ASIMD"],
|
599
|
+
"vcgtz_s64" => ["ASIMD"],
|
600
|
+
"vcgtzq_s64" => ["ASIMD"],
|
601
|
+
"vcgtz_f32" => ["ASIMD"],
|
602
|
+
"vcgtzq_f32" => ["ASIMD"],
|
603
|
+
"vcgtz_f64" => ["ASIMD"],
|
604
|
+
"vcgtzq_f64" => ["ASIMD"],
|
605
|
+
"vcgtzd_s64" => ["ASIMD"],
|
606
|
+
"vcgtzs_f32" => ["ASIMD"],
|
607
|
+
"vcgtzd_f64" => ["ASIMD"],
|
608
|
+
"vclt_s8" => ["NEON", "ASIMD"],
|
609
|
+
"vcltq_s8" => ["NEON", "ASIMD"],
|
610
|
+
"vclt_s16" => ["NEON", "ASIMD"],
|
611
|
+
"vcltq_s16" => ["NEON", "ASIMD"],
|
612
|
+
"vclt_s32" => ["NEON", "ASIMD"],
|
613
|
+
"vcltq_s32" => ["NEON", "ASIMD"],
|
614
|
+
"vclt_u8" => ["NEON", "ASIMD"],
|
615
|
+
"vcltq_u8" => ["NEON", "ASIMD"],
|
616
|
+
"vclt_u16" => ["NEON", "ASIMD"],
|
617
|
+
"vcltq_u16" => ["NEON", "ASIMD"],
|
618
|
+
"vclt_u32" => ["NEON", "ASIMD"],
|
619
|
+
"vcltq_u32" => ["NEON", "ASIMD"],
|
620
|
+
"vclt_f32" => ["NEON", "ASIMD"],
|
621
|
+
"vcltq_f32" => ["NEON", "ASIMD"],
|
622
|
+
"vclt_s64" => ["ASIMD"],
|
623
|
+
"vcltq_s64" => ["ASIMD"],
|
624
|
+
"vclt_u64" => ["ASIMD"],
|
625
|
+
"vcltq_u64" => ["ASIMD"],
|
626
|
+
"vclt_f64" => ["ASIMD"],
|
627
|
+
"vcltq_f64" => ["ASIMD"],
|
628
|
+
"vcltd_s64" => ["ASIMD"],
|
629
|
+
"vcltd_u64" => ["ASIMD"],
|
630
|
+
"vclts_f32" => ["ASIMD"],
|
631
|
+
"vcltd_f64" => ["ASIMD"],
|
632
|
+
"vcltz_s8" => ["ASIMD"],
|
633
|
+
"vcltzq_s8" => ["ASIMD"],
|
634
|
+
"vcltz_s16" => ["ASIMD"],
|
635
|
+
"vcltzq_s16" => ["ASIMD"],
|
636
|
+
"vcltz_s32" => ["ASIMD"],
|
637
|
+
"vcltzq_s32" => ["ASIMD"],
|
638
|
+
"vcltz_s64" => ["ASIMD"],
|
639
|
+
"vcltzq_s64" => ["ASIMD"],
|
640
|
+
"vcltz_f32" => ["ASIMD"],
|
641
|
+
"vcltzq_f32" => ["ASIMD"],
|
642
|
+
"vcltz_f64" => ["ASIMD"],
|
643
|
+
"vcltzq_f64" => ["ASIMD"],
|
644
|
+
"vcltzd_s64" => ["ASIMD"],
|
645
|
+
"vcltzs_f32" => ["ASIMD"],
|
646
|
+
"vcltzd_f64" => ["ASIMD"],
|
647
|
+
"vcage_f32" => ["NEON", "ASIMD"],
|
648
|
+
"vcageq_f32" => ["NEON", "ASIMD"],
|
649
|
+
"vcage_f64" => ["ASIMD"],
|
650
|
+
"vcageq_f64" => ["ASIMD"],
|
651
|
+
"vcages_f32" => ["ASIMD"],
|
652
|
+
"vcaged_f64" => ["ASIMD"],
|
653
|
+
"vcale_f32" => ["NEON", "ASIMD"],
|
654
|
+
"vcaleq_f32" => ["NEON", "ASIMD"],
|
655
|
+
"vcale_f64" => ["ASIMD"],
|
656
|
+
"vcaleq_f64" => ["ASIMD"],
|
657
|
+
"vcales_f32" => ["ASIMD"],
|
658
|
+
"vcaled_f64" => ["ASIMD"],
|
659
|
+
"vcagt_f32" => ["NEON", "ASIMD"],
|
660
|
+
"vcagtq_f32" => ["NEON", "ASIMD"],
|
661
|
+
"vcagt_f64" => ["ASIMD"],
|
662
|
+
"vcagtq_f64" => ["ASIMD"],
|
663
|
+
"vcagts_f32" => ["ASIMD"],
|
664
|
+
"vcagtd_f64" => ["ASIMD"],
|
665
|
+
"vcalt_f32" => ["NEON", "ASIMD"],
|
666
|
+
"vcaltq_f32" => ["NEON", "ASIMD"],
|
667
|
+
"vcalt_f64" => ["ASIMD"],
|
668
|
+
"vcaltq_f64" => ["ASIMD"],
|
669
|
+
"vcalts_f32" => ["ASIMD"],
|
670
|
+
"vcaltd_f64" => ["ASIMD"],
|
671
|
+
"vtst_s8" => ["NEON", "ASIMD"],
|
672
|
+
"vtstq_s8" => ["NEON", "ASIMD"],
|
673
|
+
"vtst_s16" => ["NEON", "ASIMD"],
|
674
|
+
"vtstq_s16" => ["NEON", "ASIMD"],
|
675
|
+
"vtst_s32" => ["NEON", "ASIMD"],
|
676
|
+
"vtstq_s32" => ["NEON", "ASIMD"],
|
677
|
+
"vtst_u8" => ["NEON", "ASIMD"],
|
678
|
+
"vtstq_u8" => ["NEON", "ASIMD"],
|
679
|
+
"vtst_u16" => ["NEON", "ASIMD"],
|
680
|
+
"vtstq_u16" => ["NEON", "ASIMD"],
|
681
|
+
"vtst_u32" => ["NEON", "ASIMD"],
|
682
|
+
"vtstq_u32" => ["NEON", "ASIMD"],
|
683
|
+
"vtst_p8" => ["NEON", "ASIMD"],
|
684
|
+
"vtstq_p8" => ["NEON", "ASIMD"],
|
685
|
+
"vtst_p16" => ["NEON", "ASIMD"],
|
686
|
+
"vtstq_p16" => ["NEON", "ASIMD"],
|
687
|
+
"vtst_s64" => ["ASIMD"],
|
688
|
+
"vtstq_s64" => ["ASIMD"],
|
689
|
+
"vtst_u64" => ["ASIMD"],
|
690
|
+
"vtstq_u64" => ["ASIMD"],
|
691
|
+
"vtst_p64" => ["ASIMD"],
|
692
|
+
"vtstq_p64" => ["ASIMD"],
|
693
|
+
"vtstd_s64" => ["ASIMD"],
|
694
|
+
"vtstd_u64" => ["ASIMD"],
|
695
|
+
"vabd_s8" => ["NEON", "ASIMD"],
|
696
|
+
"vabdq_s8" => ["NEON", "ASIMD"],
|
697
|
+
"vabd_s16" => ["NEON", "ASIMD"],
|
698
|
+
"vabdq_s16" => ["NEON", "ASIMD"],
|
699
|
+
"vabd_s32" => ["NEON", "ASIMD"],
|
700
|
+
"vabdq_s32" => ["NEON", "ASIMD"],
|
701
|
+
"vabd_u8" => ["NEON", "ASIMD"],
|
702
|
+
"vabdq_u8" => ["NEON", "ASIMD"],
|
703
|
+
"vabd_u16" => ["NEON", "ASIMD"],
|
704
|
+
"vabdq_u16" => ["NEON", "ASIMD"],
|
705
|
+
"vabd_u32" => ["NEON", "ASIMD"],
|
706
|
+
"vabdq_u32" => ["NEON", "ASIMD"],
|
707
|
+
"vabd_f32" => ["NEON", "ASIMD"],
|
708
|
+
"vabdq_f32" => ["NEON", "ASIMD"],
|
709
|
+
"vabd_f64" => ["ASIMD"],
|
710
|
+
"vabdq_f64" => ["ASIMD"],
|
711
|
+
"vabds_f32" => ["ASIMD"],
|
712
|
+
"vabdd_f64" => ["ASIMD"],
|
713
|
+
"vabdl_s8" => ["NEON", "ASIMD"],
|
714
|
+
"vabdl_s16" => ["NEON", "ASIMD"],
|
715
|
+
"vabdl_s32" => ["NEON", "ASIMD"],
|
716
|
+
"vabdl_u8" => ["NEON", "ASIMD"],
|
717
|
+
"vabdl_u16" => ["NEON", "ASIMD"],
|
718
|
+
"vabdl_u32" => ["NEON", "ASIMD"],
|
719
|
+
"vabdl_high_s8" => ["ASIMD"],
|
720
|
+
"vabdl_high_s16" => ["ASIMD"],
|
721
|
+
"vabdl_high_s32" => ["ASIMD"],
|
722
|
+
"vabdl_high_u8" => ["ASIMD"],
|
723
|
+
"vabdl_high_u16" => ["ASIMD"],
|
724
|
+
"vabdl_high_u32" => ["ASIMD"],
|
725
|
+
"vaba_s8" => ["NEON", "ASIMD"],
|
726
|
+
"vabaq_s8" => ["NEON", "ASIMD"],
|
727
|
+
"vaba_s16" => ["NEON", "ASIMD"],
|
728
|
+
"vabaq_s16" => ["NEON", "ASIMD"],
|
729
|
+
"vaba_s32" => ["NEON", "ASIMD"],
|
730
|
+
"vabaq_s32" => ["NEON", "ASIMD"],
|
731
|
+
"vaba_u8" => ["NEON", "ASIMD"],
|
732
|
+
"vabaq_u8" => ["NEON", "ASIMD"],
|
733
|
+
"vaba_u16" => ["NEON", "ASIMD"],
|
734
|
+
"vabaq_u16" => ["NEON", "ASIMD"],
|
735
|
+
"vaba_u32" => ["NEON", "ASIMD"],
|
736
|
+
"vabaq_u32" => ["NEON", "ASIMD"],
|
737
|
+
"vabal_s8" => ["NEON", "ASIMD"],
|
738
|
+
"vabal_s16" => ["NEON", "ASIMD"],
|
739
|
+
"vabal_s32" => ["NEON", "ASIMD"],
|
740
|
+
"vabal_u8" => ["NEON", "ASIMD"],
|
741
|
+
"vabal_u16" => ["NEON", "ASIMD"],
|
742
|
+
"vabal_u32" => ["NEON", "ASIMD"],
|
743
|
+
"vabal_high_s8" => ["ASIMD"],
|
744
|
+
"vabal_high_s16" => ["ASIMD"],
|
745
|
+
"vabal_high_s32" => ["ASIMD"],
|
746
|
+
"vabal_high_u8" => ["ASIMD"],
|
747
|
+
"vabal_high_u16" => ["ASIMD"],
|
748
|
+
"vabal_high_u32" => ["ASIMD"],
|
749
|
+
"vmax_s8" => ["NEON", "ASIMD"],
|
750
|
+
"vmaxq_s8" => ["NEON", "ASIMD"],
|
751
|
+
"vmax_s16" => ["NEON", "ASIMD"],
|
752
|
+
"vmaxq_s16" => ["NEON", "ASIMD"],
|
753
|
+
"vmax_s32" => ["NEON", "ASIMD"],
|
754
|
+
"vmaxq_s32" => ["NEON", "ASIMD"],
|
755
|
+
"vmax_u8" => ["NEON", "ASIMD"],
|
756
|
+
"vmaxq_u8" => ["NEON", "ASIMD"],
|
757
|
+
"vmax_u16" => ["NEON", "ASIMD"],
|
758
|
+
"vmaxq_u16" => ["NEON", "ASIMD"],
|
759
|
+
"vmax_u32" => ["NEON", "ASIMD"],
|
760
|
+
"vmaxq_u32" => ["NEON", "ASIMD"],
|
761
|
+
"vmax_f32" => ["NEON", "ASIMD"],
|
762
|
+
"vmaxq_f32" => ["NEON", "ASIMD"],
|
763
|
+
"vmax_f64" => ["ASIMD"],
|
764
|
+
"vmaxq_f64" => ["ASIMD"],
|
765
|
+
"vmin_s8" => ["NEON", "ASIMD"],
|
766
|
+
"vminq_s8" => ["NEON", "ASIMD"],
|
767
|
+
"vmin_s16" => ["NEON", "ASIMD"],
|
768
|
+
"vminq_s16" => ["NEON", "ASIMD"],
|
769
|
+
"vmin_s32" => ["NEON", "ASIMD"],
|
770
|
+
"vminq_s32" => ["NEON", "ASIMD"],
|
771
|
+
"vmin_u8" => ["NEON", "ASIMD"],
|
772
|
+
"vminq_u8" => ["NEON", "ASIMD"],
|
773
|
+
"vmin_u16" => ["NEON", "ASIMD"],
|
774
|
+
"vminq_u16" => ["NEON", "ASIMD"],
|
775
|
+
"vmin_u32" => ["NEON", "ASIMD"],
|
776
|
+
"vminq_u32" => ["NEON", "ASIMD"],
|
777
|
+
"vmin_f32" => ["NEON", "ASIMD"],
|
778
|
+
"vminq_f32" => ["NEON", "ASIMD"],
|
779
|
+
"vmin_f64" => ["ASIMD"],
|
780
|
+
"vminq_f64" => ["ASIMD"],
|
781
|
+
"vmaxnm_f32" => ["ASIMD"],
|
782
|
+
"vmaxnmq_f32" => ["ASIMD"],
|
783
|
+
"vmaxnm_f64" => ["ASIMD"],
|
784
|
+
"vmaxnmq_f64" => ["ASIMD"],
|
785
|
+
"vminnm_f32" => ["ASIMD"],
|
786
|
+
"vminnmq_f32" => ["ASIMD"],
|
787
|
+
"vminnm_f64" => ["ASIMD"],
|
788
|
+
"vminnmq_f64" => ["ASIMD"],
|
789
|
+
"vshl_s8" => ["NEON", "ASIMD"],
|
790
|
+
"vshlq_s8" => ["NEON", "ASIMD"],
|
791
|
+
"vshl_s16" => ["NEON", "ASIMD"],
|
792
|
+
"vshlq_s16" => ["NEON", "ASIMD"],
|
793
|
+
"vshl_s32" => ["NEON", "ASIMD"],
|
794
|
+
"vshlq_s32" => ["NEON", "ASIMD"],
|
795
|
+
"vshl_s64" => ["NEON", "ASIMD"],
|
796
|
+
"vshlq_s64" => ["NEON", "ASIMD"],
|
797
|
+
"vshl_u8" => ["NEON", "ASIMD"],
|
798
|
+
"vshlq_u8" => ["NEON", "ASIMD"],
|
799
|
+
"vshl_u16" => ["NEON", "ASIMD"],
|
800
|
+
"vshlq_u16" => ["NEON", "ASIMD"],
|
801
|
+
"vshl_u32" => ["NEON", "ASIMD"],
|
802
|
+
"vshlq_u32" => ["NEON", "ASIMD"],
|
803
|
+
"vshl_u64" => ["NEON", "ASIMD"],
|
804
|
+
"vshlq_u64" => ["NEON", "ASIMD"],
|
805
|
+
"vshld_s64" => ["ASIMD"],
|
806
|
+
"vshld_u64" => ["ASIMD"],
|
807
|
+
"vqshl_s8" => ["NEON", "ASIMD"],
|
808
|
+
"vqshlq_s8" => ["NEON", "ASIMD"],
|
809
|
+
"vqshl_s16" => ["NEON", "ASIMD"],
|
810
|
+
"vqshlq_s16" => ["NEON", "ASIMD"],
|
811
|
+
"vqshl_s32" => ["NEON", "ASIMD"],
|
812
|
+
"vqshlq_s32" => ["NEON", "ASIMD"],
|
813
|
+
"vqshl_s64" => ["NEON", "ASIMD"],
|
814
|
+
"vqshlq_s64" => ["NEON", "ASIMD"],
|
815
|
+
"vqshl_u8" => ["NEON", "ASIMD"],
|
816
|
+
"vqshlq_u8" => ["NEON", "ASIMD"],
|
817
|
+
"vqshl_u16" => ["NEON", "ASIMD"],
|
818
|
+
"vqshlq_u16" => ["NEON", "ASIMD"],
|
819
|
+
"vqshl_u32" => ["NEON", "ASIMD"],
|
820
|
+
"vqshlq_u32" => ["NEON", "ASIMD"],
|
821
|
+
"vqshl_u64" => ["NEON", "ASIMD"],
|
822
|
+
"vqshlq_u64" => ["NEON", "ASIMD"],
|
823
|
+
"vqshlb_s8" => ["ASIMD"],
|
824
|
+
"vqshlh_s16" => ["ASIMD"],
|
825
|
+
"vqshls_s32" => ["ASIMD"],
|
826
|
+
"vqshld_s64" => ["ASIMD"],
|
827
|
+
"vqshlb_u8" => ["ASIMD"],
|
828
|
+
"vqshlh_u16" => ["ASIMD"],
|
829
|
+
"vqshls_u32" => ["ASIMD"],
|
830
|
+
"vqshld_u64" => ["ASIMD"],
|
831
|
+
"vrshl_s8" => ["NEON", "ASIMD"],
|
832
|
+
"vrshlq_s8" => ["NEON", "ASIMD"],
|
833
|
+
"vrshl_s16" => ["NEON", "ASIMD"],
|
834
|
+
"vrshlq_s16" => ["NEON", "ASIMD"],
|
835
|
+
"vrshl_s32" => ["NEON", "ASIMD"],
|
836
|
+
"vrshlq_s32" => ["NEON", "ASIMD"],
|
837
|
+
"vrshl_s64" => ["NEON", "ASIMD"],
|
838
|
+
"vrshlq_s64" => ["NEON", "ASIMD"],
|
839
|
+
"vrshl_u8" => ["NEON", "ASIMD"],
|
840
|
+
"vrshlq_u8" => ["NEON", "ASIMD"],
|
841
|
+
"vrshl_u16" => ["NEON", "ASIMD"],
|
842
|
+
"vrshlq_u16" => ["NEON", "ASIMD"],
|
843
|
+
"vrshl_u32" => ["NEON", "ASIMD"],
|
844
|
+
"vrshlq_u32" => ["NEON", "ASIMD"],
|
845
|
+
"vrshl_u64" => ["NEON", "ASIMD"],
|
846
|
+
"vrshlq_u64" => ["NEON", "ASIMD"],
|
847
|
+
"vrshld_s64" => ["ASIMD"],
|
848
|
+
"vrshld_u64" => ["ASIMD"],
|
849
|
+
"vqrshl_s8" => ["NEON", "ASIMD"],
|
850
|
+
"vqrshlq_s8" => ["NEON", "ASIMD"],
|
851
|
+
"vqrshl_s16" => ["NEON", "ASIMD"],
|
852
|
+
"vqrshlq_s16" => ["NEON", "ASIMD"],
|
853
|
+
"vqrshl_s32" => ["NEON", "ASIMD"],
|
854
|
+
"vqrshlq_s32" => ["NEON", "ASIMD"],
|
855
|
+
"vqrshl_s64" => ["NEON", "ASIMD"],
|
856
|
+
"vqrshlq_s64" => ["NEON", "ASIMD"],
|
857
|
+
"vqrshl_u8" => ["NEON", "ASIMD"],
|
858
|
+
"vqrshlq_u8" => ["NEON", "ASIMD"],
|
859
|
+
"vqrshl_u16" => ["NEON", "ASIMD"],
|
860
|
+
"vqrshlq_u16" => ["NEON", "ASIMD"],
|
861
|
+
"vqrshl_u32" => ["NEON", "ASIMD"],
|
862
|
+
"vqrshlq_u32" => ["NEON", "ASIMD"],
|
863
|
+
"vqrshl_u64" => ["NEON", "ASIMD"],
|
864
|
+
"vqrshlq_u64" => ["NEON", "ASIMD"],
|
865
|
+
"vqrshlb_s8" => ["ASIMD"],
|
866
|
+
"vqrshlh_s16" => ["ASIMD"],
|
867
|
+
"vqrshls_s32" => ["ASIMD"],
|
868
|
+
"vqrshld_s64" => ["ASIMD"],
|
869
|
+
"vqrshlb_u8" => ["ASIMD"],
|
870
|
+
"vqrshlh_u16" => ["ASIMD"],
|
871
|
+
"vqrshls_u32" => ["ASIMD"],
|
872
|
+
"vqrshld_u64" => ["ASIMD"],
|
873
|
+
"vshr_n_s8" => ["NEON", "ASIMD"],
|
874
|
+
"vshrq_n_s8" => ["NEON", "ASIMD"],
|
875
|
+
"vshr_n_s16" => ["NEON", "ASIMD"],
|
876
|
+
"vshrq_n_s16" => ["NEON", "ASIMD"],
|
877
|
+
"vshr_n_s32" => ["NEON", "ASIMD"],
|
878
|
+
"vshrq_n_s32" => ["NEON", "ASIMD"],
|
879
|
+
"vshr_n_s64" => ["NEON", "ASIMD"],
|
880
|
+
"vshrq_n_s64" => ["NEON", "ASIMD"],
|
881
|
+
"vshr_n_u8" => ["NEON", "ASIMD"],
|
882
|
+
"vshrq_n_u8" => ["NEON", "ASIMD"],
|
883
|
+
"vshr_n_u16" => ["NEON", "ASIMD"],
|
884
|
+
"vshrq_n_u16" => ["NEON", "ASIMD"],
|
885
|
+
"vshr_n_u32" => ["NEON", "ASIMD"],
|
886
|
+
"vshrq_n_u32" => ["NEON", "ASIMD"],
|
887
|
+
"vshr_n_u64" => ["NEON", "ASIMD"],
|
888
|
+
"vshrq_n_u64" => ["NEON", "ASIMD"],
|
889
|
+
"vshrd_n_s64" => ["ASIMD"],
|
890
|
+
"vshrd_n_u64" => ["ASIMD"],
|
891
|
+
"vshl_n_s8" => ["NEON", "ASIMD"],
|
892
|
+
"vshlq_n_s8" => ["NEON", "ASIMD"],
|
893
|
+
"vshl_n_s16" => ["NEON", "ASIMD"],
|
894
|
+
"vshlq_n_s16" => ["NEON", "ASIMD"],
|
895
|
+
"vshl_n_s32" => ["NEON", "ASIMD"],
|
896
|
+
"vshlq_n_s32" => ["NEON", "ASIMD"],
|
897
|
+
"vshl_n_s64" => ["NEON", "ASIMD"],
|
898
|
+
"vshlq_n_s64" => ["NEON", "ASIMD"],
|
899
|
+
"vshl_n_u8" => ["NEON", "ASIMD"],
|
900
|
+
"vshlq_n_u8" => ["NEON", "ASIMD"],
|
901
|
+
"vshl_n_u16" => ["NEON", "ASIMD"],
|
902
|
+
"vshlq_n_u16" => ["NEON", "ASIMD"],
|
903
|
+
"vshl_n_u32" => ["NEON", "ASIMD"],
|
904
|
+
"vshlq_n_u32" => ["NEON", "ASIMD"],
|
905
|
+
"vshl_n_u64" => ["NEON", "ASIMD"],
|
906
|
+
"vshlq_n_u64" => ["NEON", "ASIMD"],
|
907
|
+
"vshld_n_s64" => ["ASIMD"],
|
908
|
+
"vshld_n_u64" => ["ASIMD"],
|
909
|
+
"vrshr_n_s8" => ["NEON", "ASIMD"],
|
910
|
+
"vrshrq_n_s8" => ["NEON", "ASIMD"],
|
911
|
+
"vrshr_n_s16" => ["NEON", "ASIMD"],
|
912
|
+
"vrshrq_n_s16" => ["NEON", "ASIMD"],
|
913
|
+
"vrshr_n_s32" => ["NEON", "ASIMD"],
|
914
|
+
"vrshrq_n_s32" => ["NEON", "ASIMD"],
|
915
|
+
"vrshr_n_s64" => ["NEON", "ASIMD"],
|
916
|
+
"vrshrq_n_s64" => ["NEON", "ASIMD"],
|
917
|
+
"vrshr_n_u8" => ["NEON", "ASIMD"],
|
918
|
+
"vrshrq_n_u8" => ["NEON", "ASIMD"],
|
919
|
+
"vrshr_n_u16" => ["NEON", "ASIMD"],
|
920
|
+
"vrshrq_n_u16" => ["NEON", "ASIMD"],
|
921
|
+
"vrshr_n_u32" => ["NEON", "ASIMD"],
|
922
|
+
"vrshrq_n_u32" => ["NEON", "ASIMD"],
|
923
|
+
"vrshr_n_u64" => ["NEON", "ASIMD"],
|
924
|
+
"vrshrq_n_u64" => ["NEON", "ASIMD"],
|
925
|
+
"vrshrd_n_s64" => ["ASIMD"],
|
926
|
+
"vrshrd_n_u64" => ["ASIMD"],
|
927
|
+
"vsra_n_s8" => ["NEON", "ASIMD"],
|
928
|
+
"vsraq_n_s8" => ["NEON", "ASIMD"],
|
929
|
+
"vsra_n_s16" => ["NEON", "ASIMD"],
|
930
|
+
"vsraq_n_s16" => ["NEON", "ASIMD"],
|
931
|
+
"vsra_n_s32" => ["NEON", "ASIMD"],
|
932
|
+
"vsraq_n_s32" => ["NEON", "ASIMD"],
|
933
|
+
"vsra_n_s64" => ["NEON", "ASIMD"],
|
934
|
+
"vsraq_n_s64" => ["NEON", "ASIMD"],
|
935
|
+
"vsra_n_u8" => ["NEON", "ASIMD"],
|
936
|
+
"vsraq_n_u8" => ["NEON", "ASIMD"],
|
937
|
+
"vsra_n_u16" => ["NEON", "ASIMD"],
|
938
|
+
"vsraq_n_u16" => ["NEON", "ASIMD"],
|
939
|
+
"vsra_n_u32" => ["NEON", "ASIMD"],
|
940
|
+
"vsraq_n_u32" => ["NEON", "ASIMD"],
|
941
|
+
"vsra_n_u64" => ["NEON", "ASIMD"],
|
942
|
+
"vsraq_n_u64" => ["NEON", "ASIMD"],
|
943
|
+
"vsrad_n_s64" => ["ASIMD"],
|
944
|
+
"vsrad_n_u64" => ["ASIMD"],
|
945
|
+
"vrsra_n_s8" => ["NEON", "ASIMD"],
|
946
|
+
"vrsraq_n_s8" => ["NEON", "ASIMD"],
|
947
|
+
"vrsra_n_s16" => ["NEON", "ASIMD"],
|
948
|
+
"vrsraq_n_s16" => ["NEON", "ASIMD"],
|
949
|
+
"vrsra_n_s32" => ["NEON", "ASIMD"],
|
950
|
+
"vrsraq_n_s32" => ["NEON", "ASIMD"],
|
951
|
+
"vrsra_n_s64" => ["NEON", "ASIMD"],
|
952
|
+
"vrsraq_n_s64" => ["NEON", "ASIMD"],
|
953
|
+
"vrsra_n_u8" => ["NEON", "ASIMD"],
|
954
|
+
"vrsraq_n_u8" => ["NEON", "ASIMD"],
|
955
|
+
"vrsra_n_u16" => ["NEON", "ASIMD"],
|
956
|
+
"vrsraq_n_u16" => ["NEON", "ASIMD"],
|
957
|
+
"vrsra_n_u32" => ["NEON", "ASIMD"],
|
958
|
+
"vrsraq_n_u32" => ["NEON", "ASIMD"],
|
959
|
+
"vrsra_n_u64" => ["NEON", "ASIMD"],
|
960
|
+
"vrsraq_n_u64" => ["NEON", "ASIMD"],
|
961
|
+
"vrsrad_n_s64" => ["ASIMD"],
|
962
|
+
"vrsrad_n_u64" => ["ASIMD"],
|
963
|
+
"vqshl_n_s8" => ["NEON", "ASIMD"],
|
964
|
+
"vqshlq_n_s8" => ["NEON", "ASIMD"],
|
965
|
+
"vqshl_n_s16" => ["NEON", "ASIMD"],
|
966
|
+
"vqshlq_n_s16" => ["NEON", "ASIMD"],
|
967
|
+
"vqshl_n_s32" => ["NEON", "ASIMD"],
|
968
|
+
"vqshlq_n_s32" => ["NEON", "ASIMD"],
|
969
|
+
"vqshl_n_s64" => ["NEON", "ASIMD"],
|
970
|
+
"vqshlq_n_s64" => ["NEON", "ASIMD"],
|
971
|
+
"vqshl_n_u8" => ["NEON", "ASIMD"],
|
972
|
+
"vqshlq_n_u8" => ["NEON", "ASIMD"],
|
973
|
+
"vqshl_n_u16" => ["NEON", "ASIMD"],
|
974
|
+
"vqshlq_n_u16" => ["NEON", "ASIMD"],
|
975
|
+
"vqshl_n_u32" => ["NEON", "ASIMD"],
|
976
|
+
"vqshlq_n_u32" => ["NEON", "ASIMD"],
|
977
|
+
"vqshl_n_u64" => ["NEON", "ASIMD"],
|
978
|
+
"vqshlq_n_u64" => ["NEON", "ASIMD"],
|
979
|
+
"vqshlb_n_s8" => ["ASIMD"],
|
980
|
+
"vqshlh_n_s16" => ["ASIMD"],
|
981
|
+
"vqshls_n_s32" => ["ASIMD"],
|
982
|
+
"vqshld_n_s64" => ["ASIMD"],
|
983
|
+
"vqshlb_n_u8" => ["ASIMD"],
|
984
|
+
"vqshlh_n_u16" => ["ASIMD"],
|
985
|
+
"vqshls_n_u32" => ["ASIMD"],
|
986
|
+
"vqshld_n_u64" => ["ASIMD"],
|
987
|
+
"vqshlu_n_s8" => ["NEON", "ASIMD"],
|
988
|
+
"vqshluq_n_s8" => ["NEON", "ASIMD"],
|
989
|
+
"vqshlu_n_s16" => ["NEON", "ASIMD"],
|
990
|
+
"vqshluq_n_s16" => ["NEON", "ASIMD"],
|
991
|
+
"vqshlu_n_s32" => ["NEON", "ASIMD"],
|
992
|
+
"vqshluq_n_s32" => ["NEON", "ASIMD"],
|
993
|
+
"vqshlu_n_s64" => ["NEON", "ASIMD"],
|
994
|
+
"vqshluq_n_s64" => ["NEON", "ASIMD"],
|
995
|
+
"vqshlub_n_s8" => ["ASIMD"],
|
996
|
+
"vqshluh_n_s16" => ["ASIMD"],
|
997
|
+
"vqshlus_n_s32" => ["ASIMD"],
|
998
|
+
"vqshlud_n_s64" => ["ASIMD"],
|
999
|
+
"vshrn_n_s16" => ["NEON", "ASIMD"],
|
1000
|
+
"vshrn_n_s32" => ["NEON", "ASIMD"],
|
1001
|
+
"vshrn_n_s64" => ["NEON", "ASIMD"],
|
1002
|
+
"vshrn_n_u16" => ["NEON", "ASIMD"],
|
1003
|
+
"vshrn_n_u32" => ["NEON", "ASIMD"],
|
1004
|
+
"vshrn_n_u64" => ["NEON", "ASIMD"],
|
1005
|
+
"vshrn_high_n_s16" => ["ASIMD"],
|
1006
|
+
"vshrn_high_n_s32" => ["ASIMD"],
|
1007
|
+
"vshrn_high_n_s64" => ["ASIMD"],
|
1008
|
+
"vshrn_high_n_u16" => ["ASIMD"],
|
1009
|
+
"vshrn_high_n_u32" => ["ASIMD"],
|
1010
|
+
"vshrn_high_n_u64" => ["ASIMD"],
|
1011
|
+
"vqshrun_n_s16" => ["NEON", "ASIMD"],
|
1012
|
+
"vqshrun_n_s32" => ["NEON", "ASIMD"],
|
1013
|
+
"vqshrun_n_s64" => ["NEON", "ASIMD"],
|
1014
|
+
"vqshrunh_n_s16" => ["ASIMD"],
|
1015
|
+
"vqshruns_n_s32" => ["ASIMD"],
|
1016
|
+
"vqshrund_n_s64" => ["ASIMD"],
|
1017
|
+
"vqshrun_high_n_s16" => ["ASIMD"],
|
1018
|
+
"vqshrun_high_n_s32" => ["ASIMD"],
|
1019
|
+
"vqshrun_high_n_s64" => ["ASIMD"],
|
1020
|
+
"vqrshrun_n_s16" => ["NEON", "ASIMD"],
|
1021
|
+
"vqrshrun_n_s32" => ["NEON", "ASIMD"],
|
1022
|
+
"vqrshrun_n_s64" => ["NEON", "ASIMD"],
|
1023
|
+
"vqrshrunh_n_s16" => ["ASIMD"],
|
1024
|
+
"vqrshruns_n_s32" => ["ASIMD"],
|
1025
|
+
"vqrshrund_n_s64" => ["ASIMD"],
|
1026
|
+
"vqrshrun_high_n_s16" => ["ASIMD"],
|
1027
|
+
"vqrshrun_high_n_s32" => ["ASIMD"],
|
1028
|
+
"vqrshrun_high_n_s64" => ["ASIMD"],
|
1029
|
+
"vqshrn_n_s16" => ["NEON", "ASIMD"],
|
1030
|
+
"vqshrn_n_s32" => ["NEON", "ASIMD"],
|
1031
|
+
"vqshrn_n_s64" => ["NEON", "ASIMD"],
|
1032
|
+
"vqshrn_n_u16" => ["NEON", "ASIMD"],
|
1033
|
+
"vqshrn_n_u32" => ["NEON", "ASIMD"],
|
1034
|
+
"vqshrn_n_u64" => ["NEON", "ASIMD"],
|
1035
|
+
"vqshrnh_n_s16" => ["ASIMD"],
|
1036
|
+
"vqshrns_n_s32" => ["ASIMD"],
|
1037
|
+
"vqshrnd_n_s64" => ["ASIMD"],
|
1038
|
+
"vqshrnh_n_u16" => ["ASIMD"],
|
1039
|
+
"vqshrns_n_u32" => ["ASIMD"],
|
1040
|
+
"vqshrnd_n_u64" => ["ASIMD"],
|
1041
|
+
"vqshrn_high_n_s16" => ["ASIMD"],
|
1042
|
+
"vqshrn_high_n_s32" => ["ASIMD"],
|
1043
|
+
"vqshrn_high_n_s64" => ["ASIMD"],
|
1044
|
+
"vqshrn_high_n_u16" => ["ASIMD"],
|
1045
|
+
"vqshrn_high_n_u32" => ["ASIMD"],
|
1046
|
+
"vqshrn_high_n_u64" => ["ASIMD"],
|
1047
|
+
"vrshrn_n_s16" => ["NEON", "ASIMD"],
|
1048
|
+
"vrshrn_n_s32" => ["NEON", "ASIMD"],
|
1049
|
+
"vrshrn_n_s64" => ["NEON", "ASIMD"],
|
1050
|
+
"vrshrn_n_u16" => ["NEON", "ASIMD"],
|
1051
|
+
"vrshrn_n_u32" => ["NEON", "ASIMD"],
|
1052
|
+
"vrshrn_n_u64" => ["NEON", "ASIMD"],
|
1053
|
+
"vrshrn_high_n_s16" => ["ASIMD"],
|
1054
|
+
"vrshrn_high_n_s32" => ["ASIMD"],
|
1055
|
+
"vrshrn_high_n_s64" => ["ASIMD"],
|
1056
|
+
"vrshrn_high_n_u16" => ["ASIMD"],
|
1057
|
+
"vrshrn_high_n_u32" => ["ASIMD"],
|
1058
|
+
"vrshrn_high_n_u64" => ["ASIMD"],
|
1059
|
+
"vqrshrn_n_s16" => ["NEON", "ASIMD"],
|
1060
|
+
"vqrshrn_n_s32" => ["NEON", "ASIMD"],
|
1061
|
+
"vqrshrn_n_s64" => ["NEON", "ASIMD"],
|
1062
|
+
"vqrshrn_n_u16" => ["NEON", "ASIMD"],
|
1063
|
+
"vqrshrn_n_u32" => ["NEON", "ASIMD"],
|
1064
|
+
"vqrshrn_n_u64" => ["NEON", "ASIMD"],
|
1065
|
+
"vqrshrnh_n_s16" => ["ASIMD"],
|
1066
|
+
"vqrshrns_n_s32" => ["ASIMD"],
|
1067
|
+
"vqrshrnd_n_s64" => ["ASIMD"],
|
1068
|
+
"vqrshrnh_n_u16" => ["ASIMD"],
|
1069
|
+
"vqrshrns_n_u32" => ["ASIMD"],
|
1070
|
+
"vqrshrnd_n_u64" => ["ASIMD"],
|
1071
|
+
"vqrshrn_high_n_s16" => ["ASIMD"],
|
1072
|
+
"vqrshrn_high_n_s32" => ["ASIMD"],
|
1073
|
+
"vqrshrn_high_n_s64" => ["ASIMD"],
|
1074
|
+
"vqrshrn_high_n_u16" => ["ASIMD"],
|
1075
|
+
"vqrshrn_high_n_u32" => ["ASIMD"],
|
1076
|
+
"vqrshrn_high_n_u64" => ["ASIMD"],
|
1077
|
+
"vshll_n_s8" => ["NEON", "ASIMD"],
|
1078
|
+
"vshll_n_s16" => ["NEON", "ASIMD"],
|
1079
|
+
"vshll_n_s32" => ["NEON", "ASIMD"],
|
1080
|
+
"vshll_n_u8" => ["NEON", "ASIMD"],
|
1081
|
+
"vshll_n_u16" => ["NEON", "ASIMD"],
|
1082
|
+
"vshll_n_u32" => ["NEON", "ASIMD"],
|
1083
|
+
"vshll_high_n_s8" => ["ASIMD"],
|
1084
|
+
"vshll_high_n_s16" => ["ASIMD"],
|
1085
|
+
"vshll_high_n_s32" => ["ASIMD"],
|
1086
|
+
"vshll_high_n_u8" => ["ASIMD"],
|
1087
|
+
"vshll_high_n_u16" => ["ASIMD"],
|
1088
|
+
"vshll_high_n_u32" => ["ASIMD"],
|
1089
|
+
"vsri_n_s8" => ["NEON", "ASIMD"],
|
1090
|
+
"vsriq_n_s8" => ["NEON", "ASIMD"],
|
1091
|
+
"vsri_n_s16" => ["NEON", "ASIMD"],
|
1092
|
+
"vsriq_n_s16" => ["NEON", "ASIMD"],
|
1093
|
+
"vsri_n_s32" => ["NEON", "ASIMD"],
|
1094
|
+
"vsriq_n_s32" => ["NEON", "ASIMD"],
|
1095
|
+
"vsri_n_s64" => ["NEON", "ASIMD"],
|
1096
|
+
"vsriq_n_s64" => ["NEON", "ASIMD"],
|
1097
|
+
"vsri_n_u8" => ["NEON", "ASIMD"],
|
1098
|
+
"vsriq_n_u8" => ["NEON", "ASIMD"],
|
1099
|
+
"vsri_n_u16" => ["NEON", "ASIMD"],
|
1100
|
+
"vsriq_n_u16" => ["NEON", "ASIMD"],
|
1101
|
+
"vsri_n_u32" => ["NEON", "ASIMD"],
|
1102
|
+
"vsriq_n_u32" => ["NEON", "ASIMD"],
|
1103
|
+
"vsri_n_u64" => ["NEON", "ASIMD"],
|
1104
|
+
"vsriq_n_u64" => ["NEON", "ASIMD"],
|
1105
|
+
"vsri_n_p64" => ["ASIMD"],
|
1106
|
+
"vsriq_n_p64" => ["ASIMD"],
|
1107
|
+
"vsri_n_p8" => ["NEON", "ASIMD"],
|
1108
|
+
"vsriq_n_p8" => ["NEON", "ASIMD"],
|
1109
|
+
"vsri_n_p16" => ["NEON", "ASIMD"],
|
1110
|
+
"vsriq_n_p16" => ["NEON", "ASIMD"],
|
1111
|
+
"vsrid_n_s64" => ["ASIMD"],
|
1112
|
+
"vsrid_n_u64" => ["ASIMD"],
|
1113
|
+
"vsli_n_s8" => ["NEON", "ASIMD"],
|
1114
|
+
"vsliq_n_s8" => ["NEON", "ASIMD"],
|
1115
|
+
"vsli_n_s16" => ["NEON", "ASIMD"],
|
1116
|
+
"vsliq_n_s16" => ["NEON", "ASIMD"],
|
1117
|
+
"vsli_n_s32" => ["NEON", "ASIMD"],
|
1118
|
+
"vsliq_n_s32" => ["NEON", "ASIMD"],
|
1119
|
+
"vsli_n_s64" => ["NEON", "ASIMD"],
|
1120
|
+
"vsliq_n_s64" => ["NEON", "ASIMD"],
|
1121
|
+
"vsli_n_u8" => ["NEON", "ASIMD"],
|
1122
|
+
"vsliq_n_u8" => ["NEON", "ASIMD"],
|
1123
|
+
"vsli_n_u16" => ["NEON", "ASIMD"],
|
1124
|
+
"vsliq_n_u16" => ["NEON", "ASIMD"],
|
1125
|
+
"vsli_n_u32" => ["NEON", "ASIMD"],
|
1126
|
+
"vsliq_n_u32" => ["NEON", "ASIMD"],
|
1127
|
+
"vsli_n_u64" => ["NEON", "ASIMD"],
|
1128
|
+
"vsliq_n_u64" => ["NEON", "ASIMD"],
|
1129
|
+
"vsli_n_p64" => ["ASIMD"],
|
1130
|
+
"vsliq_n_p64" => ["ASIMD"],
|
1131
|
+
"vsli_n_p8" => ["NEON", "ASIMD"],
|
1132
|
+
"vsliq_n_p8" => ["NEON", "ASIMD"],
|
1133
|
+
"vsli_n_p16" => ["NEON", "ASIMD"],
|
1134
|
+
"vsliq_n_p16" => ["NEON", "ASIMD"],
|
1135
|
+
"vslid_n_s64" => ["ASIMD"],
|
1136
|
+
"vslid_n_u64" => ["ASIMD"],
|
1137
|
+
"vcvt_s32_f32" => ["NEON", "ASIMD"],
|
1138
|
+
"vcvtq_s32_f32" => ["NEON", "ASIMD"],
|
1139
|
+
"vcvt_u32_f32" => ["NEON", "ASIMD"],
|
1140
|
+
"vcvtq_u32_f32" => ["NEON", "ASIMD"],
|
1141
|
+
"vcvtn_s32_f32" => ["ASIMD"],
|
1142
|
+
"vcvtnq_s32_f32" => ["ASIMD"],
|
1143
|
+
"vcvtn_u32_f32" => ["ASIMD"],
|
1144
|
+
"vcvtnq_u32_f32" => ["ASIMD"],
|
1145
|
+
"vcvtm_s32_f32" => ["ASIMD"],
|
1146
|
+
"vcvtmq_s32_f32" => ["ASIMD"],
|
1147
|
+
"vcvtm_u32_f32" => ["ASIMD"],
|
1148
|
+
"vcvtmq_u32_f32" => ["ASIMD"],
|
1149
|
+
"vcvtp_s32_f32" => ["ASIMD"],
|
1150
|
+
"vcvtpq_s32_f32" => ["ASIMD"],
|
1151
|
+
"vcvtp_u32_f32" => ["ASIMD"],
|
1152
|
+
"vcvtpq_u32_f32" => ["ASIMD"],
|
1153
|
+
"vcvta_s32_f32" => ["ASIMD"],
|
1154
|
+
"vcvtaq_s32_f32" => ["ASIMD"],
|
1155
|
+
"vcvta_u32_f32" => ["ASIMD"],
|
1156
|
+
"vcvtaq_u32_f32" => ["ASIMD"],
|
1157
|
+
"vcvts_s32_f32" => ["ASIMD"],
|
1158
|
+
"vcvts_u32_f32" => ["ASIMD"],
|
1159
|
+
"vcvtns_s32_f32" => ["ASIMD"],
|
1160
|
+
"vcvtns_u32_f32" => ["ASIMD"],
|
1161
|
+
"vcvtms_s32_f32" => ["ASIMD"],
|
1162
|
+
"vcvtms_u32_f32" => ["ASIMD"],
|
1163
|
+
"vcvtps_s32_f32" => ["ASIMD"],
|
1164
|
+
"vcvtps_u32_f32" => ["ASIMD"],
|
1165
|
+
"vcvtas_s32_f32" => ["ASIMD"],
|
1166
|
+
"vcvtas_u32_f32" => ["ASIMD"],
|
1167
|
+
"vcvt_s64_f64" => ["ASIMD"],
|
1168
|
+
"vcvtq_s64_f64" => ["ASIMD"],
|
1169
|
+
"vcvt_u64_f64" => ["ASIMD"],
|
1170
|
+
"vcvtq_u64_f64" => ["ASIMD"],
|
1171
|
+
"vcvtn_s64_f64" => ["ASIMD"],
|
1172
|
+
"vcvtnq_s64_f64" => ["ASIMD"],
|
1173
|
+
"vcvtn_u64_f64" => ["ASIMD"],
|
1174
|
+
"vcvtnq_u64_f64" => ["ASIMD"],
|
1175
|
+
"vcvtm_s64_f64" => ["ASIMD"],
|
1176
|
+
"vcvtmq_s64_f64" => ["ASIMD"],
|
1177
|
+
"vcvtm_u64_f64" => ["ASIMD"],
|
1178
|
+
"vcvtmq_u64_f64" => ["ASIMD"],
|
1179
|
+
"vcvtp_s64_f64" => ["ASIMD"],
|
1180
|
+
"vcvtpq_s64_f64" => ["ASIMD"],
|
1181
|
+
"vcvtp_u64_f64" => ["ASIMD"],
|
1182
|
+
"vcvtpq_u64_f64" => ["ASIMD"],
|
1183
|
+
"vcvta_s64_f64" => ["ASIMD"],
|
1184
|
+
"vcvtaq_s64_f64" => ["ASIMD"],
|
1185
|
+
"vcvta_u64_f64" => ["ASIMD"],
|
1186
|
+
"vcvtaq_u64_f64" => ["ASIMD"],
|
1187
|
+
"vcvtd_s64_f64" => ["ASIMD"],
|
1188
|
+
"vcvtd_u64_f64" => ["ASIMD"],
|
1189
|
+
"vcvtnd_s64_f64" => ["ASIMD"],
|
1190
|
+
"vcvtnd_u64_f64" => ["ASIMD"],
|
1191
|
+
"vcvtmd_s64_f64" => ["ASIMD"],
|
1192
|
+
"vcvtmd_u64_f64" => ["ASIMD"],
|
1193
|
+
"vcvtpd_s64_f64" => ["ASIMD"],
|
1194
|
+
"vcvtpd_u64_f64" => ["ASIMD"],
|
1195
|
+
"vcvtad_s64_f64" => ["ASIMD"],
|
1196
|
+
"vcvtad_u64_f64" => ["ASIMD"],
|
1197
|
+
"vcvt_n_s32_f32" => ["NEON", "ASIMD"],
|
1198
|
+
"vcvtq_n_s32_f32" => ["NEON", "ASIMD"],
|
1199
|
+
"vcvt_n_u32_f32" => ["NEON", "ASIMD"],
|
1200
|
+
"vcvtq_n_u32_f32" => ["NEON", "ASIMD"],
|
1201
|
+
"vcvts_n_s32_f32" => ["ASIMD"],
|
1202
|
+
"vcvts_n_u32_f32" => ["ASIMD"],
|
1203
|
+
"vcvt_n_s64_f64" => ["ASIMD"],
|
1204
|
+
"vcvtq_n_s64_f64" => ["ASIMD"],
|
1205
|
+
"vcvt_n_u64_f64" => ["ASIMD"],
|
1206
|
+
"vcvtq_n_u64_f64" => ["ASIMD"],
|
1207
|
+
"vcvtd_n_s64_f64" => ["ASIMD"],
|
1208
|
+
"vcvtd_n_u64_f64" => ["ASIMD"],
|
1209
|
+
"vcvt_f32_s32" => ["NEON", "ASIMD"],
|
1210
|
+
"vcvtq_f32_s32" => ["NEON", "ASIMD"],
|
1211
|
+
"vcvt_f32_u32" => ["NEON", "ASIMD"],
|
1212
|
+
"vcvtq_f32_u32" => ["NEON", "ASIMD"],
|
1213
|
+
"vcvts_f32_s32" => ["ASIMD"],
|
1214
|
+
"vcvts_f32_u32" => ["ASIMD"],
|
1215
|
+
"vcvt_f64_s64" => ["ASIMD"],
|
1216
|
+
"vcvtq_f64_s64" => ["ASIMD"],
|
1217
|
+
"vcvt_f64_u64" => ["ASIMD"],
|
1218
|
+
"vcvtq_f64_u64" => ["ASIMD"],
|
1219
|
+
"vcvtd_f64_s64" => ["ASIMD"],
|
1220
|
+
"vcvtd_f64_u64" => ["ASIMD"],
|
1221
|
+
"vcvt_n_f32_s32" => ["NEON", "ASIMD"],
|
1222
|
+
"vcvtq_n_f32_s32" => ["NEON", "ASIMD"],
|
1223
|
+
"vcvt_n_f32_u32" => ["NEON", "ASIMD"],
|
1224
|
+
"vcvtq_n_f32_u32" => ["NEON", "ASIMD"],
|
1225
|
+
"vcvts_n_f32_s32" => ["ASIMD"],
|
1226
|
+
"vcvts_n_f32_u32" => ["ASIMD"],
|
1227
|
+
"vcvt_n_f64_s64" => ["ASIMD"],
|
1228
|
+
"vcvtq_n_f64_s64" => ["ASIMD"],
|
1229
|
+
"vcvt_n_f64_u64" => ["ASIMD"],
|
1230
|
+
"vcvtq_n_f64_u64" => ["ASIMD"],
|
1231
|
+
"vcvtd_n_f64_s64" => ["ASIMD"],
|
1232
|
+
"vcvtd_n_f64_u64" => ["ASIMD"],
|
1233
|
+
"vcvt_f16_f32" => ["NEON", "ASIMD"],
|
1234
|
+
"vcvt_high_f16_f32" => ["ASIMD"],
|
1235
|
+
"vcvt_f32_f64" => ["ASIMD"],
|
1236
|
+
"vcvt_high_f32_f64" => ["ASIMD"],
|
1237
|
+
"vcvt_f32_f16" => ["NEON", "ASIMD"],
|
1238
|
+
"vcvt_high_f32_f16" => ["ASIMD"],
|
1239
|
+
"vcvt_f64_f32" => ["ASIMD"],
|
1240
|
+
"vcvt_high_f64_f32" => ["ASIMD"],
|
1241
|
+
"vcvtx_f32_f64" => ["ASIMD"],
|
1242
|
+
"vcvtxd_f32_f64" => ["ASIMD"],
|
1243
|
+
"vcvtx_high_f32_f64" => ["ASIMD"],
|
1244
|
+
"vrnd_f32" => ["ASIMD"],
|
1245
|
+
"vrndq_f32" => ["ASIMD"],
|
1246
|
+
"vrnd_f64" => ["ASIMD"],
|
1247
|
+
"vrndq_f64" => ["ASIMD"],
|
1248
|
+
"vrndn_f32" => ["ASIMD"],
|
1249
|
+
"vrndnq_f32" => ["ASIMD"],
|
1250
|
+
"vrndn_f64" => ["ASIMD"],
|
1251
|
+
"vrndnq_f64" => ["ASIMD"],
|
1252
|
+
"vrndns_f32" => ["ASIMD"],
|
1253
|
+
"vrndm_f32" => ["ASIMD"],
|
1254
|
+
"vrndmq_f32" => ["ASIMD"],
|
1255
|
+
"vrndm_f64" => ["ASIMD"],
|
1256
|
+
"vrndmq_f64" => ["ASIMD"],
|
1257
|
+
"vrndp_f32" => ["ASIMD"],
|
1258
|
+
"vrndpq_f32" => ["ASIMD"],
|
1259
|
+
"vrndp_f64" => ["ASIMD"],
|
1260
|
+
"vrndpq_f64" => ["ASIMD"],
|
1261
|
+
"vrnda_f32" => ["ASIMD"],
|
1262
|
+
"vrndaq_f32" => ["ASIMD"],
|
1263
|
+
"vrnda_f64" => ["ASIMD"],
|
1264
|
+
"vrndaq_f64" => ["ASIMD"],
|
1265
|
+
"vrndi_f32" => ["ASIMD"],
|
1266
|
+
"vrndiq_f32" => ["ASIMD"],
|
1267
|
+
"vrndi_f64" => ["ASIMD"],
|
1268
|
+
"vrndiq_f64" => ["ASIMD"],
|
1269
|
+
"vrndx_f32" => ["ASIMD"],
|
1270
|
+
"vrndxq_f32" => ["ASIMD"],
|
1271
|
+
"vrndx_f64" => ["ASIMD"],
|
1272
|
+
"vrndxq_f64" => ["ASIMD"],
|
1273
|
+
"vmovn_s16" => ["NEON", "ASIMD"],
|
1274
|
+
"vmovn_s32" => ["NEON", "ASIMD"],
|
1275
|
+
"vmovn_s64" => ["NEON", "ASIMD"],
|
1276
|
+
"vmovn_u16" => ["NEON", "ASIMD"],
|
1277
|
+
"vmovn_u32" => ["NEON", "ASIMD"],
|
1278
|
+
"vmovn_u64" => ["NEON", "ASIMD"],
|
1279
|
+
"vmovn_high_s16" => ["ASIMD"],
|
1280
|
+
"vmovn_high_s32" => ["ASIMD"],
|
1281
|
+
"vmovn_high_s64" => ["ASIMD"],
|
1282
|
+
"vmovn_high_u16" => ["ASIMD"],
|
1283
|
+
"vmovn_high_u32" => ["ASIMD"],
|
1284
|
+
"vmovn_high_u64" => ["ASIMD"],
|
1285
|
+
"vmovl_s8" => ["NEON", "ASIMD"],
|
1286
|
+
"vmovl_s16" => ["NEON", "ASIMD"],
|
1287
|
+
"vmovl_s32" => ["NEON", "ASIMD"],
|
1288
|
+
"vmovl_u8" => ["NEON", "ASIMD"],
|
1289
|
+
"vmovl_u16" => ["NEON", "ASIMD"],
|
1290
|
+
"vmovl_u32" => ["NEON", "ASIMD"],
|
1291
|
+
"vmovl_high_s8" => ["ASIMD"],
|
1292
|
+
"vmovl_high_s16" => ["ASIMD"],
|
1293
|
+
"vmovl_high_s32" => ["ASIMD"],
|
1294
|
+
"vmovl_high_u8" => ["ASIMD"],
|
1295
|
+
"vmovl_high_u16" => ["ASIMD"],
|
1296
|
+
"vmovl_high_u32" => ["ASIMD"],
|
1297
|
+
"vqmovn_s16" => ["NEON", "ASIMD"],
|
1298
|
+
"vqmovn_s32" => ["NEON", "ASIMD"],
|
1299
|
+
"vqmovn_s64" => ["NEON", "ASIMD"],
|
1300
|
+
"vqmovn_u16" => ["NEON", "ASIMD"],
|
1301
|
+
"vqmovn_u32" => ["NEON", "ASIMD"],
|
1302
|
+
"vqmovn_u64" => ["NEON", "ASIMD"],
|
1303
|
+
"vqmovnh_s16" => ["ASIMD"],
|
1304
|
+
"vqmovns_s32" => ["ASIMD"],
|
1305
|
+
"vqmovnd_s64" => ["ASIMD"],
|
1306
|
+
"vqmovnh_u16" => ["ASIMD"],
|
1307
|
+
"vqmovns_u32" => ["ASIMD"],
|
1308
|
+
"vqmovnd_u64" => ["ASIMD"],
|
1309
|
+
"vqmovn_high_s16" => ["ASIMD"],
|
1310
|
+
"vqmovn_high_s32" => ["ASIMD"],
|
1311
|
+
"vqmovn_high_s64" => ["ASIMD"],
|
1312
|
+
"vqmovn_high_u16" => ["ASIMD"],
|
1313
|
+
"vqmovn_high_u32" => ["ASIMD"],
|
1314
|
+
"vqmovn_high_u64" => ["ASIMD"],
|
1315
|
+
"vqmovun_s16" => ["NEON", "ASIMD"],
|
1316
|
+
"vqmovun_s32" => ["NEON", "ASIMD"],
|
1317
|
+
"vqmovun_s64" => ["NEON", "ASIMD"],
|
1318
|
+
"vqmovunh_s16" => ["ASIMD"],
|
1319
|
+
"vqmovuns_s32" => ["ASIMD"],
|
1320
|
+
"vqmovund_s64" => ["ASIMD"],
|
1321
|
+
"vqmovun_high_s16" => ["ASIMD"],
|
1322
|
+
"vqmovun_high_s32" => ["ASIMD"],
|
1323
|
+
"vqmovun_high_s64" => ["ASIMD"],
|
1324
|
+
"vmla_lane_s16" => ["NEON", "ASIMD"],
|
1325
|
+
"vmlaq_lane_s16" => ["NEON", "ASIMD"],
|
1326
|
+
"vmla_lane_s32" => ["NEON", "ASIMD"],
|
1327
|
+
"vmlaq_lane_s32" => ["NEON", "ASIMD"],
|
1328
|
+
"vmla_lane_u16" => ["NEON", "ASIMD"],
|
1329
|
+
"vmlaq_lane_u16" => ["NEON", "ASIMD"],
|
1330
|
+
"vmla_lane_u32" => ["NEON", "ASIMD"],
|
1331
|
+
"vmlaq_lane_u32" => ["NEON", "ASIMD"],
|
1332
|
+
"vmla_lane_f32" => ["NEON", "ASIMD"],
|
1333
|
+
"vmlaq_lane_f32" => ["NEON", "ASIMD"],
|
1334
|
+
"vmla_laneq_s16" => ["ASIMD"],
|
1335
|
+
"vmlaq_laneq_s16" => ["ASIMD"],
|
1336
|
+
"vmla_laneq_s32" => ["ASIMD"],
|
1337
|
+
"vmlaq_laneq_s32" => ["ASIMD"],
|
1338
|
+
"vmla_laneq_u16" => ["ASIMD"],
|
1339
|
+
"vmlaq_laneq_u16" => ["ASIMD"],
|
1340
|
+
"vmla_laneq_u32" => ["ASIMD"],
|
1341
|
+
"vmlaq_laneq_u32" => ["ASIMD"],
|
1342
|
+
"vmla_laneq_f32" => ["ASIMD"],
|
1343
|
+
"vmlaq_laneq_f32" => ["ASIMD"],
|
1344
|
+
"vmlal_lane_s16" => ["NEON", "ASIMD"],
|
1345
|
+
"vmlal_lane_s32" => ["NEON", "ASIMD"],
|
1346
|
+
"vmlal_lane_u16" => ["NEON", "ASIMD"],
|
1347
|
+
"vmlal_lane_u32" => ["NEON", "ASIMD"],
|
1348
|
+
"vmlal_high_lane_s16" => ["ASIMD"],
|
1349
|
+
"vmlal_high_lane_s32" => ["ASIMD"],
|
1350
|
+
"vmlal_high_lane_u16" => ["ASIMD"],
|
1351
|
+
"vmlal_high_lane_u32" => ["ASIMD"],
|
1352
|
+
"vmlal_laneq_s16" => ["ASIMD"],
|
1353
|
+
"vmlal_laneq_s32" => ["ASIMD"],
|
1354
|
+
"vmlal_laneq_u16" => ["ASIMD"],
|
1355
|
+
"vmlal_laneq_u32" => ["ASIMD"],
|
1356
|
+
"vmlal_high_laneq_s16" => ["ASIMD"],
|
1357
|
+
"vmlal_high_laneq_s32" => ["ASIMD"],
|
1358
|
+
"vmlal_high_laneq_u16" => ["ASIMD"],
|
1359
|
+
"vmlal_high_laneq_u32" => ["ASIMD"],
|
1360
|
+
"vqdmlal_lane_s16" => ["NEON", "ASIMD"],
|
1361
|
+
"vqdmlal_lane_s32" => ["NEON", "ASIMD"],
|
1362
|
+
"vqdmlalh_lane_s16" => ["ASIMD"],
|
1363
|
+
"vqdmlals_lane_s32" => ["ASIMD"],
|
1364
|
+
"vqdmlal_high_lane_s16" => ["ASIMD"],
|
1365
|
+
"vqdmlal_high_lane_s32" => ["ASIMD"],
|
1366
|
+
"vqdmlal_laneq_s16" => ["ASIMD"],
|
1367
|
+
"vqdmlal_laneq_s32" => ["ASIMD"],
|
1368
|
+
"vqdmlalh_laneq_s16" => ["ASIMD"],
|
1369
|
+
"vqdmlals_laneq_s32" => ["ASIMD"],
|
1370
|
+
"vqdmlal_high_laneq_s16" => ["ASIMD"],
|
1371
|
+
"vqdmlal_high_laneq_s32" => ["ASIMD"],
|
1372
|
+
"vmls_lane_s16" => ["NEON", "ASIMD"],
|
1373
|
+
"vmlsq_lane_s16" => ["NEON", "ASIMD"],
|
1374
|
+
"vmls_lane_s32" => ["NEON", "ASIMD"],
|
1375
|
+
"vmlsq_lane_s32" => ["NEON", "ASIMD"],
|
1376
|
+
"vmls_lane_u16" => ["NEON", "ASIMD"],
|
1377
|
+
"vmlsq_lane_u16" => ["NEON", "ASIMD"],
|
1378
|
+
"vmls_lane_u32" => ["NEON", "ASIMD"],
|
1379
|
+
"vmlsq_lane_u32" => ["NEON", "ASIMD"],
|
1380
|
+
"vmls_lane_f32" => ["NEON", "ASIMD"],
|
1381
|
+
"vmlsq_lane_f32" => ["NEON", "ASIMD"],
|
1382
|
+
"vmls_laneq_s16" => ["ASIMD"],
|
1383
|
+
"vmlsq_laneq_s16" => ["ASIMD"],
|
1384
|
+
"vmls_laneq_s32" => ["ASIMD"],
|
1385
|
+
"vmlsq_laneq_s32" => ["ASIMD"],
|
1386
|
+
"vmls_laneq_u16" => ["ASIMD"],
|
1387
|
+
"vmlsq_laneq_u16" => ["ASIMD"],
|
1388
|
+
"vmls_laneq_u32" => ["ASIMD"],
|
1389
|
+
"vmlsq_laneq_u32" => ["ASIMD"],
|
1390
|
+
"vmls_laneq_f32" => ["ASIMD"],
|
1391
|
+
"vmlsq_laneq_f32" => ["ASIMD"],
|
1392
|
+
"vmlsl_lane_s16" => ["NEON", "ASIMD"],
|
1393
|
+
"vmlsl_lane_s32" => ["NEON", "ASIMD"],
|
1394
|
+
"vmlsl_lane_u16" => ["NEON", "ASIMD"],
|
1395
|
+
"vmlsl_lane_u32" => ["NEON", "ASIMD"],
|
1396
|
+
"vmlsl_high_lane_s16" => ["ASIMD"],
|
1397
|
+
"vmlsl_high_lane_s32" => ["ASIMD"],
|
1398
|
+
"vmlsl_high_lane_u16" => ["ASIMD"],
|
1399
|
+
"vmlsl_high_lane_u32" => ["ASIMD"],
|
1400
|
+
"vmlsl_laneq_s16" => ["ASIMD"],
|
1401
|
+
"vmlsl_laneq_s32" => ["ASIMD"],
|
1402
|
+
"vmlsl_laneq_u16" => ["ASIMD"],
|
1403
|
+
"vmlsl_laneq_u32" => ["ASIMD"],
|
1404
|
+
"vmlsl_high_laneq_s16" => ["ASIMD"],
|
1405
|
+
"vmlsl_high_laneq_s32" => ["ASIMD"],
|
1406
|
+
"vmlsl_high_laneq_u16" => ["ASIMD"],
|
1407
|
+
"vmlsl_high_laneq_u32" => ["ASIMD"],
|
1408
|
+
"vqdmlsl_lane_s16" => ["NEON", "ASIMD"],
|
1409
|
+
"vqdmlsl_lane_s32" => ["NEON", "ASIMD"],
|
1410
|
+
"vqdmlslh_lane_s16" => ["ASIMD"],
|
1411
|
+
"vqdmlsls_lane_s32" => ["ASIMD"],
|
1412
|
+
"vqdmlsl_high_lane_s16" => ["ASIMD"],
|
1413
|
+
"vqdmlsl_high_lane_s32" => ["ASIMD"],
|
1414
|
+
"vqdmlsl_laneq_s16" => ["ASIMD"],
|
1415
|
+
"vqdmlsl_laneq_s32" => ["ASIMD"],
|
1416
|
+
"vqdmlslh_laneq_s16" => ["ASIMD"],
|
1417
|
+
"vqdmlsls_laneq_s32" => ["ASIMD"],
|
1418
|
+
"vqdmlsl_high_laneq_s16" => ["ASIMD"],
|
1419
|
+
"vqdmlsl_high_laneq_s32" => ["ASIMD"],
|
1420
|
+
"vmul_n_s16" => ["NEON", "ASIMD"],
|
1421
|
+
"vmulq_n_s16" => ["NEON", "ASIMD"],
|
1422
|
+
"vmul_n_s32" => ["NEON", "ASIMD"],
|
1423
|
+
"vmulq_n_s32" => ["NEON", "ASIMD"],
|
1424
|
+
"vmul_n_u16" => ["NEON", "ASIMD"],
|
1425
|
+
"vmulq_n_u16" => ["NEON", "ASIMD"],
|
1426
|
+
"vmul_n_u32" => ["NEON", "ASIMD"],
|
1427
|
+
"vmulq_n_u32" => ["NEON", "ASIMD"],
|
1428
|
+
"vmul_n_f32" => ["NEON", "ASIMD"],
|
1429
|
+
"vmulq_n_f32" => ["NEON", "ASIMD"],
|
1430
|
+
"vmul_n_f64" => ["ASIMD"],
|
1431
|
+
"vmulq_n_f64" => ["ASIMD"],
|
1432
|
+
"vmul_lane_s16" => ["NEON", "ASIMD"],
|
1433
|
+
"vmulq_lane_s16" => ["NEON", "ASIMD"],
|
1434
|
+
"vmul_lane_s32" => ["NEON", "ASIMD"],
|
1435
|
+
"vmulq_lane_s32" => ["NEON", "ASIMD"],
|
1436
|
+
"vmul_lane_u16" => ["NEON", "ASIMD"],
|
1437
|
+
"vmulq_lane_u16" => ["NEON", "ASIMD"],
|
1438
|
+
"vmul_lane_u32" => ["NEON", "ASIMD"],
|
1439
|
+
"vmulq_lane_u32" => ["NEON", "ASIMD"],
|
1440
|
+
"vmul_lane_f32" => ["NEON", "ASIMD"],
|
1441
|
+
"vmulq_lane_f32" => ["NEON", "ASIMD"],
|
1442
|
+
"vmul_lane_f64" => ["ASIMD"],
|
1443
|
+
"vmulq_lane_f64" => ["ASIMD"],
|
1444
|
+
"vmuls_lane_f32" => ["ASIMD"],
|
1445
|
+
"vmuld_lane_f64" => ["ASIMD"],
|
1446
|
+
"vmul_laneq_s16" => ["ASIMD"],
|
1447
|
+
"vmulq_laneq_s16" => ["ASIMD"],
|
1448
|
+
"vmul_laneq_s32" => ["ASIMD"],
|
1449
|
+
"vmulq_laneq_s32" => ["ASIMD"],
|
1450
|
+
"vmul_laneq_u16" => ["ASIMD"],
|
1451
|
+
"vmulq_laneq_u16" => ["ASIMD"],
|
1452
|
+
"vmul_laneq_u32" => ["ASIMD"],
|
1453
|
+
"vmulq_laneq_u32" => ["ASIMD"],
|
1454
|
+
"vmul_laneq_f32" => ["ASIMD"],
|
1455
|
+
"vmulq_laneq_f32" => ["ASIMD"],
|
1456
|
+
"vmul_laneq_f64" => ["ASIMD"],
|
1457
|
+
"vmulq_laneq_f64" => ["ASIMD"],
|
1458
|
+
"vmuls_laneq_f32" => ["ASIMD"],
|
1459
|
+
"vmuld_laneq_f64" => ["ASIMD"],
|
1460
|
+
"vmull_n_s16" => ["NEON", "ASIMD"],
|
1461
|
+
"vmull_n_s32" => ["NEON", "ASIMD"],
|
1462
|
+
"vmull_n_u16" => ["NEON", "ASIMD"],
|
1463
|
+
"vmull_n_u32" => ["NEON", "ASIMD"],
|
1464
|
+
"vmull_high_n_s16" => ["ASIMD"],
|
1465
|
+
"vmull_high_n_s32" => ["ASIMD"],
|
1466
|
+
"vmull_high_n_u16" => ["ASIMD"],
|
1467
|
+
"vmull_high_n_u32" => ["ASIMD"],
|
1468
|
+
"vmull_lane_s16" => ["NEON", "ASIMD"],
|
1469
|
+
"vmull_lane_s32" => ["NEON", "ASIMD"],
|
1470
|
+
"vmull_lane_u16" => ["NEON", "ASIMD"],
|
1471
|
+
"vmull_lane_u32" => ["NEON", "ASIMD"],
|
1472
|
+
"vmull_high_lane_s16" => ["ASIMD"],
|
1473
|
+
"vmull_high_lane_s32" => ["ASIMD"],
|
1474
|
+
"vmull_high_lane_u16" => ["ASIMD"],
|
1475
|
+
"vmull_high_lane_u32" => ["ASIMD"],
|
1476
|
+
"vmull_laneq_s16" => ["ASIMD"],
|
1477
|
+
"vmull_laneq_s32" => ["ASIMD"],
|
1478
|
+
"vmull_laneq_u16" => ["ASIMD"],
|
1479
|
+
"vmull_laneq_u32" => ["ASIMD"],
|
1480
|
+
"vmull_high_laneq_s16" => ["ASIMD"],
|
1481
|
+
"vmull_high_laneq_s32" => ["ASIMD"],
|
1482
|
+
"vmull_high_laneq_u16" => ["ASIMD"],
|
1483
|
+
"vmull_high_laneq_u32" => ["ASIMD"],
|
1484
|
+
"vqdmull_n_s16" => ["NEON", "ASIMD"],
|
1485
|
+
"vqdmull_n_s32" => ["NEON", "ASIMD"],
|
1486
|
+
"vqdmull_high_n_s16" => ["ASIMD"],
|
1487
|
+
"vqdmull_high_n_s32" => ["ASIMD"],
|
1488
|
+
"vqdmull_lane_s16" => ["NEON", "ASIMD"],
|
1489
|
+
"vqdmull_lane_s32" => ["NEON", "ASIMD"],
|
1490
|
+
"vqdmullh_lane_s16" => ["ASIMD"],
|
1491
|
+
"vqdmulls_lane_s32" => ["ASIMD"],
|
1492
|
+
"vqdmull_high_lane_s16" => ["ASIMD"],
|
1493
|
+
"vqdmull_high_lane_s32" => ["ASIMD"],
|
1494
|
+
"vqdmull_laneq_s16" => ["ASIMD"],
|
1495
|
+
"vqdmull_laneq_s32" => ["ASIMD"],
|
1496
|
+
"vqdmullh_laneq_s16" => ["ASIMD"],
|
1497
|
+
"vqdmulls_laneq_s32" => ["ASIMD"],
|
1498
|
+
"vqdmull_high_laneq_s16" => ["ASIMD"],
|
1499
|
+
"vqdmull_high_laneq_s32" => ["ASIMD"],
|
1500
|
+
"vqdmulh_n_s16" => ["NEON", "ASIMD"],
|
1501
|
+
"vqdmulhq_n_s16" => ["NEON", "ASIMD"],
|
1502
|
+
"vqdmulh_n_s32" => ["NEON", "ASIMD"],
|
1503
|
+
"vqdmulhq_n_s32" => ["NEON", "ASIMD"],
|
1504
|
+
"vqdmlah_n_s16" => ["ASIMD"],
|
1505
|
+
"vqdmlahq_n_s16" => ["ASIMD"],
|
1506
|
+
"vqdmlah_n_s32" => ["ASIMD"],
|
1507
|
+
"vqdmlahq_n_s32" => ["ASIMD"],
|
1508
|
+
"vqdmlsh_n_s16" => ["ASIMD"],
|
1509
|
+
"vqdmlshq_n_s16" => ["ASIMD"],
|
1510
|
+
"vqdmlsh_n_s32" => ["ASIMD"],
|
1511
|
+
"vqdmlshq_n_s32" => ["ASIMD"],
|
1512
|
+
"vqdmulh_lane_s16" => ["NEON", "ASIMD"],
|
1513
|
+
"vqdmulhq_lane_s16" => ["NEON", "ASIMD"],
|
1514
|
+
"vqdmulh_lane_s32" => ["NEON", "ASIMD"],
|
1515
|
+
"vqdmulhq_lane_s32" => ["NEON", "ASIMD"],
|
1516
|
+
"vqdmulhh_lane_s16" => ["ASIMD"],
|
1517
|
+
"vqdmulhs_lane_s32" => ["ASIMD"],
|
1518
|
+
"vqdmulh_laneq_s16" => ["ASIMD"],
|
1519
|
+
"vqdmulhq_laneq_s16" => ["ASIMD"],
|
1520
|
+
"vqdmulh_laneq_s32" => ["ASIMD"],
|
1521
|
+
"vqdmulhq_laneq_s32" => ["ASIMD"],
|
1522
|
+
"vqdmulhh_laneq_s16" => ["ASIMD"],
|
1523
|
+
"vqdmulhs_laneq_s32" => ["ASIMD"],
|
1524
|
+
"vqrdmulh_n_s16" => ["NEON", "ASIMD"],
|
1525
|
+
"vqrdmulhq_n_s16" => ["NEON", "ASIMD"],
|
1526
|
+
"vqrdmulh_n_s32" => ["NEON", "ASIMD"],
|
1527
|
+
"vqrdmulhq_n_s32" => ["NEON", "ASIMD"],
|
1528
|
+
"vqrdmulh_lane_s16" => ["NEON", "ASIMD"],
|
1529
|
+
"vqrdmulhq_lane_s16" => ["NEON", "ASIMD"],
|
1530
|
+
"vqrdmulh_lane_s32" => ["NEON", "ASIMD"],
|
1531
|
+
"vqrdmulhq_lane_s32" => ["NEON", "ASIMD"],
|
1532
|
+
"vqrdmulhh_lane_s16" => ["ASIMD"],
|
1533
|
+
"vqrdmulhs_lane_s32" => ["ASIMD"],
|
1534
|
+
"vqrdmulh_laneq_s16" => ["ASIMD"],
|
1535
|
+
"vqrdmulhq_laneq_s16" => ["ASIMD"],
|
1536
|
+
"vqrdmulh_laneq_s32" => ["ASIMD"],
|
1537
|
+
"vqrdmulhq_laneq_s32" => ["ASIMD"],
|
1538
|
+
"vqrdmulhh_laneq_s16" => ["ASIMD"],
|
1539
|
+
"vqrdmulhs_laneq_s32" => ["ASIMD"],
|
1540
|
+
"vqrdmlah_lane_s16" => ["ASIMD"],
|
1541
|
+
"vqrdmlahq_lane_s16" => ["ASIMD"],
|
1542
|
+
"vqrdmlah_lane_s32" => ["ASIMD"],
|
1543
|
+
"vqrdmlahq_lane_s32" => ["ASIMD"],
|
1544
|
+
"vqrdmlahh_lane_s16" => ["ASIMD"],
|
1545
|
+
"vqrdmlahs_lane_s32" => ["ASIMD"],
|
1546
|
+
"vqrdmlah_laneq_s16" => ["ASIMD"],
|
1547
|
+
"vqrdmlahq_laneq_s16" => ["ASIMD"],
|
1548
|
+
"vqrdmlah_laneq_s32" => ["ASIMD"],
|
1549
|
+
"vqrdmlahq_laneq_s32" => ["ASIMD"],
|
1550
|
+
"vqrdmlahh_laneq_s16" => ["ASIMD"],
|
1551
|
+
"vqrdmlahs_laneq_s32" => ["ASIMD"],
|
1552
|
+
"vqrdmlsh_lane_s16" => ["ASIMD"],
|
1553
|
+
"vqrdmlshq_lane_s16" => ["ASIMD"],
|
1554
|
+
"vqrdmlsh_lane_s32" => ["ASIMD"],
|
1555
|
+
"vqrdmlshq_lane_s32" => ["ASIMD"],
|
1556
|
+
"vqrdmlshh_lane_s16" => ["ASIMD"],
|
1557
|
+
"vqrdmlshs_lane_s32" => ["ASIMD"],
|
1558
|
+
"vqrdmlsh_laneq_s16" => ["ASIMD"],
|
1559
|
+
"vqrdmlshq_laneq_s16" => ["ASIMD"],
|
1560
|
+
"vqrdmlsh_laneq_s32" => ["ASIMD"],
|
1561
|
+
"vqrdmlshq_laneq_s32" => ["ASIMD"],
|
1562
|
+
"vqrdmlshh_laneq_s16" => ["ASIMD"],
|
1563
|
+
"vqrdmlshs_laneq_s32" => ["ASIMD"],
|
1564
|
+
"vmla_n_s16" => ["NEON", "ASIMD"],
|
1565
|
+
"vmlaq_n_s16" => ["NEON", "ASIMD"],
|
1566
|
+
"vmla_n_s32" => ["NEON", "ASIMD"],
|
1567
|
+
"vmlaq_n_s32" => ["NEON", "ASIMD"],
|
1568
|
+
"vmla_n_u16" => ["NEON", "ASIMD"],
|
1569
|
+
"vmlaq_n_u16" => ["NEON", "ASIMD"],
|
1570
|
+
"vmla_n_u32" => ["NEON", "ASIMD"],
|
1571
|
+
"vmlaq_n_u32" => ["NEON", "ASIMD"],
|
1572
|
+
"vmla_n_f32" => ["NEON", "ASIMD"],
|
1573
|
+
"vmlaq_n_f32" => ["NEON", "ASIMD"],
|
1574
|
+
"vmlal_n_s16" => ["NEON", "ASIMD"],
|
1575
|
+
"vmlal_n_s32" => ["NEON", "ASIMD"],
|
1576
|
+
"vmlal_n_u16" => ["NEON", "ASIMD"],
|
1577
|
+
"vmlal_n_u32" => ["NEON", "ASIMD"],
|
1578
|
+
"vmlal_high_n_s16" => ["ASIMD"],
|
1579
|
+
"vmlal_high_n_s32" => ["ASIMD"],
|
1580
|
+
"vmlal_high_n_u16" => ["ASIMD"],
|
1581
|
+
"vmlal_high_n_u32" => ["ASIMD"],
|
1582
|
+
"vqdmlal_n_s16" => ["NEON", "ASIMD"],
|
1583
|
+
"vqdmlal_n_s32" => ["NEON", "ASIMD"],
|
1584
|
+
"vqdmlal_high_n_s16" => ["ASIMD"],
|
1585
|
+
"vqdmlal_high_n_s32" => ["ASIMD"],
|
1586
|
+
"vmls_n_s16" => ["NEON", "ASIMD"],
|
1587
|
+
"vmlsq_n_s16" => ["NEON", "ASIMD"],
|
1588
|
+
"vmls_n_s32" => ["NEON", "ASIMD"],
|
1589
|
+
"vmlsq_n_s32" => ["NEON", "ASIMD"],
|
1590
|
+
"vmls_n_u16" => ["NEON", "ASIMD"],
|
1591
|
+
"vmlsq_n_u16" => ["NEON", "ASIMD"],
|
1592
|
+
"vmls_n_u32" => ["NEON", "ASIMD"],
|
1593
|
+
"vmlsq_n_u32" => ["NEON", "ASIMD"],
|
1594
|
+
"vmls_n_f32" => ["NEON", "ASIMD"],
|
1595
|
+
"vmlsq_n_f32" => ["NEON", "ASIMD"],
|
1596
|
+
"vmlsl_n_s16" => ["NEON", "ASIMD"],
|
1597
|
+
"vmlsl_n_s32" => ["NEON", "ASIMD"],
|
1598
|
+
"vmlsl_n_u16" => ["NEON", "ASIMD"],
|
1599
|
+
"vmlsl_n_u32" => ["NEON", "ASIMD"],
|
1600
|
+
"vmlsl_high_n_s16" => ["ASIMD"],
|
1601
|
+
"vmlsl_high_n_s32" => ["ASIMD"],
|
1602
|
+
"vmlsl_high_n_u16" => ["ASIMD"],
|
1603
|
+
"vmlsl_high_n_u32" => ["ASIMD"],
|
1604
|
+
"vqdmlsl_n_s16" => ["NEON", "ASIMD"],
|
1605
|
+
"vqdmlsl_n_s32" => ["NEON", "ASIMD"],
|
1606
|
+
"vqdmlsl_high_n_s16" => ["ASIMD"],
|
1607
|
+
"vqdmlsl_high_n_s32" => ["ASIMD"],
|
1608
|
+
"vabs_s8" => ["NEON", "ASIMD"],
|
1609
|
+
"vabsq_s8" => ["NEON", "ASIMD"],
|
1610
|
+
"vabs_s16" => ["NEON", "ASIMD"],
|
1611
|
+
"vabsq_s16" => ["NEON", "ASIMD"],
|
1612
|
+
"vabs_s32" => ["NEON", "ASIMD"],
|
1613
|
+
"vabsq_s32" => ["NEON", "ASIMD"],
|
1614
|
+
"vabs_f32" => ["NEON", "ASIMD"],
|
1615
|
+
"vabsq_f32" => ["NEON", "ASIMD"],
|
1616
|
+
"vabs_s64" => ["ASIMD"],
|
1617
|
+
"vabsd_s64" => ["ASIMD"],
|
1618
|
+
"vabsq_s64" => ["ASIMD"],
|
1619
|
+
"vabs_f64" => ["ASIMD"],
|
1620
|
+
"vabsq_f64" => ["ASIMD"],
|
1621
|
+
"vqabs_s8" => ["NEON", "ASIMD"],
|
1622
|
+
"vqabsq_s8" => ["NEON", "ASIMD"],
|
1623
|
+
"vqabs_s16" => ["NEON", "ASIMD"],
|
1624
|
+
"vqabsq_s16" => ["NEON", "ASIMD"],
|
1625
|
+
"vqabs_s32" => ["NEON", "ASIMD"],
|
1626
|
+
"vqabsq_s32" => ["NEON", "ASIMD"],
|
1627
|
+
"vqabs_s64" => ["ASIMD"],
|
1628
|
+
"vqabsq_s64" => ["ASIMD"],
|
1629
|
+
"vqabsb_s8" => ["ASIMD"],
|
1630
|
+
"vqabsh_s16" => ["ASIMD"],
|
1631
|
+
"vqabss_s32" => ["ASIMD"],
|
1632
|
+
"vqabsd_s64" => ["ASIMD"],
|
1633
|
+
"vneg_s8" => ["NEON", "ASIMD"],
|
1634
|
+
"vnegq_s8" => ["NEON", "ASIMD"],
|
1635
|
+
"vneg_s16" => ["NEON", "ASIMD"],
|
1636
|
+
"vnegq_s16" => ["NEON", "ASIMD"],
|
1637
|
+
"vneg_s32" => ["NEON", "ASIMD"],
|
1638
|
+
"vnegq_s32" => ["NEON", "ASIMD"],
|
1639
|
+
"vneg_f32" => ["NEON", "ASIMD"],
|
1640
|
+
"vnegq_f32" => ["NEON", "ASIMD"],
|
1641
|
+
"vneg_s64" => ["ASIMD"],
|
1642
|
+
"vnegd_s64" => ["ASIMD"],
|
1643
|
+
"vnegq_s64" => ["ASIMD"],
|
1644
|
+
"vneg_f64" => ["ASIMD"],
|
1645
|
+
"vnegq_f64" => ["ASIMD"],
|
1646
|
+
"vqneg_s8" => ["NEON", "ASIMD"],
|
1647
|
+
"vqnegq_s8" => ["NEON", "ASIMD"],
|
1648
|
+
"vqneg_s16" => ["NEON", "ASIMD"],
|
1649
|
+
"vqnegq_s16" => ["NEON", "ASIMD"],
|
1650
|
+
"vqneg_s32" => ["NEON", "ASIMD"],
|
1651
|
+
"vqnegq_s32" => ["NEON", "ASIMD"],
|
1652
|
+
"vqneg_s64" => ["ASIMD"],
|
1653
|
+
"vqnegq_s64" => ["ASIMD"],
|
1654
|
+
"vqnegb_s8" => ["ASIMD"],
|
1655
|
+
"vqnegh_s16" => ["ASIMD"],
|
1656
|
+
"vqnegs_s32" => ["ASIMD"],
|
1657
|
+
"vqnegd_s64" => ["ASIMD"],
|
1658
|
+
"vcls_s8" => ["NEON", "ASIMD"],
|
1659
|
+
"vclsq_s8" => ["NEON", "ASIMD"],
|
1660
|
+
"vcls_s16" => ["NEON", "ASIMD"],
|
1661
|
+
"vclsq_s16" => ["NEON", "ASIMD"],
|
1662
|
+
"vcls_s32" => ["NEON", "ASIMD"],
|
1663
|
+
"vclsq_s32" => ["NEON", "ASIMD"],
|
1664
|
+
"vclz_s8" => ["NEON", "ASIMD"],
|
1665
|
+
"vclzq_s8" => ["NEON", "ASIMD"],
|
1666
|
+
"vclz_s16" => ["NEON", "ASIMD"],
|
1667
|
+
"vclzq_s16" => ["NEON", "ASIMD"],
|
1668
|
+
"vclz_s32" => ["NEON", "ASIMD"],
|
1669
|
+
"vclzq_s32" => ["NEON", "ASIMD"],
|
1670
|
+
"vclz_u8" => ["NEON", "ASIMD"],
|
1671
|
+
"vclzq_u8" => ["NEON", "ASIMD"],
|
1672
|
+
"vclz_u16" => ["NEON", "ASIMD"],
|
1673
|
+
"vclzq_u16" => ["NEON", "ASIMD"],
|
1674
|
+
"vclz_u32" => ["NEON", "ASIMD"],
|
1675
|
+
"vclzq_u32" => ["NEON", "ASIMD"],
|
1676
|
+
"vcnt_s8" => ["NEON", "ASIMD"],
|
1677
|
+
"vcntq_s8" => ["NEON", "ASIMD"],
|
1678
|
+
"vcnt_u8" => ["NEON", "ASIMD"],
|
1679
|
+
"vcntq_u8" => ["NEON", "ASIMD"],
|
1680
|
+
"vcnt_p8" => ["NEON", "ASIMD"],
|
1681
|
+
"vcntq_p8" => ["NEON", "ASIMD"],
|
1682
|
+
"vrecpe_u32" => ["NEON", "ASIMD"],
|
1683
|
+
"vrecpeq_u32" => ["NEON", "ASIMD"],
|
1684
|
+
"vrecpe_f32" => ["NEON", "ASIMD"],
|
1685
|
+
"vrecpeq_f32" => ["NEON", "ASIMD"],
|
1686
|
+
"vrecpe_f64" => ["ASIMD"],
|
1687
|
+
"vrecpeq_f64" => ["ASIMD"],
|
1688
|
+
"vrecpes_f32" => ["ASIMD"],
|
1689
|
+
"vrecped_f64" => ["ASIMD"],
|
1690
|
+
"vrecps_f32" => ["NEON", "ASIMD"],
|
1691
|
+
"vrecpsq_f32" => ["NEON", "ASIMD"],
|
1692
|
+
"vrecps_f64" => ["ASIMD"],
|
1693
|
+
"vrecpsq_f64" => ["ASIMD"],
|
1694
|
+
"vrecpss_f32" => ["ASIMD"],
|
1695
|
+
"vrecpsd_f64" => ["ASIMD"],
|
1696
|
+
"vsqrt_f32" => ["ASIMD"],
|
1697
|
+
"vsqrtq_f32" => ["ASIMD"],
|
1698
|
+
"vsqrt_f64" => ["ASIMD"],
|
1699
|
+
"vsqrtq_f64" => ["ASIMD"],
|
1700
|
+
"vrsqrte_u32" => ["NEON", "ASIMD"],
|
1701
|
+
"vrsqrteq_u32" => ["NEON", "ASIMD"],
|
1702
|
+
"vrsqrte_f32" => ["NEON", "ASIMD"],
|
1703
|
+
"vrsqrteq_f32" => ["NEON", "ASIMD"],
|
1704
|
+
"vrsqrte_f64" => ["ASIMD"],
|
1705
|
+
"vrsqrteq_f64" => ["ASIMD"],
|
1706
|
+
"vrsqrtes_f32" => ["ASIMD"],
|
1707
|
+
"vrsqrted_f64" => ["ASIMD"],
|
1708
|
+
"vrsqrts_f32" => ["NEON", "ASIMD"],
|
1709
|
+
"vrsqrtsq_f32" => ["NEON", "ASIMD"],
|
1710
|
+
"vrsqrts_f64" => ["ASIMD"],
|
1711
|
+
"vrsqrtsq_f64" => ["ASIMD"],
|
1712
|
+
"vrsqrtss_f32" => ["ASIMD"],
|
1713
|
+
"vrsqrtsd_f64" => ["ASIMD"],
|
1714
|
+
"vmvn_s8" => ["NEON", "ASIMD"],
|
1715
|
+
"vmvnq_s8" => ["NEON", "ASIMD"],
|
1716
|
+
"vmvn_s16" => ["NEON", "ASIMD"],
|
1717
|
+
"vmvnq_s16" => ["NEON", "ASIMD"],
|
1718
|
+
"vmvn_s32" => ["NEON", "ASIMD"],
|
1719
|
+
"vmvnq_s32" => ["NEON", "ASIMD"],
|
1720
|
+
"vmvn_u8" => ["NEON", "ASIMD"],
|
1721
|
+
"vmvnq_u8" => ["NEON", "ASIMD"],
|
1722
|
+
"vmvn_u16" => ["NEON", "ASIMD"],
|
1723
|
+
"vmvnq_u16" => ["NEON", "ASIMD"],
|
1724
|
+
"vmvn_u32" => ["NEON", "ASIMD"],
|
1725
|
+
"vmvnq_u32" => ["NEON", "ASIMD"],
|
1726
|
+
"vmvn_p8" => ["NEON", "ASIMD"],
|
1727
|
+
"vmvnq_p8" => ["NEON", "ASIMD"],
|
1728
|
+
"vand_s8" => ["NEON", "ASIMD"],
|
1729
|
+
"vandq_s8" => ["NEON", "ASIMD"],
|
1730
|
+
"vand_s16" => ["NEON", "ASIMD"],
|
1731
|
+
"vandq_s16" => ["NEON", "ASIMD"],
|
1732
|
+
"vand_s32" => ["NEON", "ASIMD"],
|
1733
|
+
"vandq_s32" => ["NEON", "ASIMD"],
|
1734
|
+
"vand_s64" => ["NEON", "ASIMD"],
|
1735
|
+
"vandq_s64" => ["NEON", "ASIMD"],
|
1736
|
+
"vand_u8" => ["NEON", "ASIMD"],
|
1737
|
+
"vandq_u8" => ["NEON", "ASIMD"],
|
1738
|
+
"vand_u16" => ["NEON", "ASIMD"],
|
1739
|
+
"vandq_u16" => ["NEON", "ASIMD"],
|
1740
|
+
"vand_u32" => ["NEON", "ASIMD"],
|
1741
|
+
"vandq_u32" => ["NEON", "ASIMD"],
|
1742
|
+
"vand_u64" => ["NEON", "ASIMD"],
|
1743
|
+
"vandq_u64" => ["NEON", "ASIMD"],
|
1744
|
+
"vorr_s8" => ["NEON", "ASIMD"],
|
1745
|
+
"vorrq_s8" => ["NEON", "ASIMD"],
|
1746
|
+
"vorr_s16" => ["NEON", "ASIMD"],
|
1747
|
+
"vorrq_s16" => ["NEON", "ASIMD"],
|
1748
|
+
"vorr_s32" => ["NEON", "ASIMD"],
|
1749
|
+
"vorrq_s32" => ["NEON", "ASIMD"],
|
1750
|
+
"vorr_s64" => ["NEON", "ASIMD"],
|
1751
|
+
"vorrq_s64" => ["NEON", "ASIMD"],
|
1752
|
+
"vorr_u8" => ["NEON", "ASIMD"],
|
1753
|
+
"vorrq_u8" => ["NEON", "ASIMD"],
|
1754
|
+
"vorr_u16" => ["NEON", "ASIMD"],
|
1755
|
+
"vorrq_u16" => ["NEON", "ASIMD"],
|
1756
|
+
"vorr_u32" => ["NEON", "ASIMD"],
|
1757
|
+
"vorrq_u32" => ["NEON", "ASIMD"],
|
1758
|
+
"vorr_u64" => ["NEON", "ASIMD"],
|
1759
|
+
"vorrq_u64" => ["NEON", "ASIMD"],
|
1760
|
+
"veor_s8" => ["NEON", "ASIMD"],
|
1761
|
+
"veorq_s8" => ["NEON", "ASIMD"],
|
1762
|
+
"veor_s16" => ["NEON", "ASIMD"],
|
1763
|
+
"veorq_s16" => ["NEON", "ASIMD"],
|
1764
|
+
"veor_s32" => ["NEON", "ASIMD"],
|
1765
|
+
"veorq_s32" => ["NEON", "ASIMD"],
|
1766
|
+
"veor_s64" => ["NEON", "ASIMD"],
|
1767
|
+
"veorq_s64" => ["NEON", "ASIMD"],
|
1768
|
+
"veor_u8" => ["NEON", "ASIMD"],
|
1769
|
+
"veorq_u8" => ["NEON", "ASIMD"],
|
1770
|
+
"veor_u16" => ["NEON", "ASIMD"],
|
1771
|
+
"veorq_u16" => ["NEON", "ASIMD"],
|
1772
|
+
"veor_u32" => ["NEON", "ASIMD"],
|
1773
|
+
"veorq_u32" => ["NEON", "ASIMD"],
|
1774
|
+
"veor_u64" => ["NEON", "ASIMD"],
|
1775
|
+
"veorq_u64" => ["NEON", "ASIMD"],
|
1776
|
+
"vbic_s8" => ["NEON", "ASIMD"],
|
1777
|
+
"vbicq_s8" => ["NEON", "ASIMD"],
|
1778
|
+
"vbic_s16" => ["NEON", "ASIMD"],
|
1779
|
+
"vbicq_s16" => ["NEON", "ASIMD"],
|
1780
|
+
"vbic_s32" => ["NEON", "ASIMD"],
|
1781
|
+
"vbicq_s32" => ["NEON", "ASIMD"],
|
1782
|
+
"vbic_s64" => ["NEON", "ASIMD"],
|
1783
|
+
"vbicq_s64" => ["NEON", "ASIMD"],
|
1784
|
+
"vbic_u8" => ["NEON", "ASIMD"],
|
1785
|
+
"vbicq_u8" => ["NEON", "ASIMD"],
|
1786
|
+
"vbic_u16" => ["NEON", "ASIMD"],
|
1787
|
+
"vbicq_u16" => ["NEON", "ASIMD"],
|
1788
|
+
"vbic_u32" => ["NEON", "ASIMD"],
|
1789
|
+
"vbicq_u32" => ["NEON", "ASIMD"],
|
1790
|
+
"vbic_u64" => ["NEON", "ASIMD"],
|
1791
|
+
"vbicq_u64" => ["NEON", "ASIMD"],
|
1792
|
+
"vorn_s8" => ["NEON", "ASIMD"],
|
1793
|
+
"vornq_s8" => ["NEON", "ASIMD"],
|
1794
|
+
"vorn_s16" => ["NEON", "ASIMD"],
|
1795
|
+
"vornq_s16" => ["NEON", "ASIMD"],
|
1796
|
+
"vorn_s32" => ["NEON", "ASIMD"],
|
1797
|
+
"vornq_s32" => ["NEON", "ASIMD"],
|
1798
|
+
"vorn_s64" => ["NEON", "ASIMD"],
|
1799
|
+
"vornq_s64" => ["NEON", "ASIMD"],
|
1800
|
+
"vorn_u8" => ["NEON", "ASIMD"],
|
1801
|
+
"vornq_u8" => ["NEON", "ASIMD"],
|
1802
|
+
"vorn_u16" => ["NEON", "ASIMD"],
|
1803
|
+
"vornq_u16" => ["NEON", "ASIMD"],
|
1804
|
+
"vorn_u32" => ["NEON", "ASIMD"],
|
1805
|
+
"vornq_u32" => ["NEON", "ASIMD"],
|
1806
|
+
"vorn_u64" => ["NEON", "ASIMD"],
|
1807
|
+
"vornq_u64" => ["NEON", "ASIMD"],
|
1808
|
+
"vbsl_s8" => ["NEON", "ASIMD"],
|
1809
|
+
"vbslq_s8" => ["NEON", "ASIMD"],
|
1810
|
+
"vbsl_s16" => ["NEON", "ASIMD"],
|
1811
|
+
"vbslq_s16" => ["NEON", "ASIMD"],
|
1812
|
+
"vbsl_s32" => ["NEON", "ASIMD"],
|
1813
|
+
"vbslq_s32" => ["NEON", "ASIMD"],
|
1814
|
+
"vbsl_s64" => ["NEON", "ASIMD"],
|
1815
|
+
"vbslq_s64" => ["NEON", "ASIMD"],
|
1816
|
+
"vbsl_u8" => ["NEON", "ASIMD"],
|
1817
|
+
"vbslq_u8" => ["NEON", "ASIMD"],
|
1818
|
+
"vbsl_u16" => ["NEON", "ASIMD"],
|
1819
|
+
"vbslq_u16" => ["NEON", "ASIMD"],
|
1820
|
+
"vbsl_u32" => ["NEON", "ASIMD"],
|
1821
|
+
"vbslq_u32" => ["NEON", "ASIMD"],
|
1822
|
+
"vbsl_u64" => ["NEON", "ASIMD"],
|
1823
|
+
"vbslq_u64" => ["NEON", "ASIMD"],
|
1824
|
+
"vbsl_p64" => ["ASIMD"],
|
1825
|
+
"vbslq_p64" => ["ASIMD"],
|
1826
|
+
"vbsl_f32" => ["NEON", "ASIMD"],
|
1827
|
+
"vbslq_f32" => ["NEON", "ASIMD"],
|
1828
|
+
"vbsl_p8" => ["NEON", "ASIMD"],
|
1829
|
+
"vbslq_p8" => ["NEON", "ASIMD"],
|
1830
|
+
"vbsl_p16" => ["NEON", "ASIMD"],
|
1831
|
+
"vbslq_p16" => ["NEON", "ASIMD"],
|
1832
|
+
"vbsl_f64" => ["ASIMD"],
|
1833
|
+
"vbslq_f64" => ["ASIMD"],
|
1834
|
+
"vcopy_lane_s8" => ["ASIMD"],
|
1835
|
+
"vcopyq_lane_s8" => ["ASIMD"],
|
1836
|
+
"vcopy_lane_s16" => ["ASIMD"],
|
1837
|
+
"vcopyq_lane_s16" => ["ASIMD"],
|
1838
|
+
"vcopy_lane_s32" => ["ASIMD"],
|
1839
|
+
"vcopyq_lane_s32" => ["ASIMD"],
|
1840
|
+
"vcopy_lane_s64" => ["ASIMD"],
|
1841
|
+
"vcopyq_lane_s64" => ["ASIMD"],
|
1842
|
+
"vcopy_lane_u8" => ["ASIMD"],
|
1843
|
+
"vcopyq_lane_u8" => ["ASIMD"],
|
1844
|
+
"vcopy_lane_u16" => ["ASIMD"],
|
1845
|
+
"vcopyq_lane_u16" => ["ASIMD"],
|
1846
|
+
"vcopy_lane_u32" => ["ASIMD"],
|
1847
|
+
"vcopyq_lane_u32" => ["ASIMD"],
|
1848
|
+
"vcopy_lane_u64" => ["ASIMD"],
|
1849
|
+
"vcopyq_lane_u64" => ["ASIMD"],
|
1850
|
+
"vcopy_lane_p64" => ["ASIMD"],
|
1851
|
+
"vcopyq_lane_p64" => ["ASIMD"],
|
1852
|
+
"vcopy_lane_f32" => ["ASIMD"],
|
1853
|
+
"vcopyq_lane_f32" => ["ASIMD"],
|
1854
|
+
"vcopy_lane_f64" => ["ASIMD"],
|
1855
|
+
"vcopyq_lane_f64" => ["ASIMD"],
|
1856
|
+
"vcopy_lane_p8" => ["ASIMD"],
|
1857
|
+
"vcopyq_lane_p8" => ["ASIMD"],
|
1858
|
+
"vcopy_lane_p16" => ["ASIMD"],
|
1859
|
+
"vcopyq_lane_p16" => ["ASIMD"],
|
1860
|
+
"vcopy_laneq_s8" => ["ASIMD"],
|
1861
|
+
"vcopyq_laneq_s8" => ["ASIMD"],
|
1862
|
+
"vcopy_laneq_s16" => ["ASIMD"],
|
1863
|
+
"vcopyq_laneq_s16" => ["ASIMD"],
|
1864
|
+
"vcopy_laneq_s32" => ["ASIMD"],
|
1865
|
+
"vcopyq_laneq_s32" => ["ASIMD"],
|
1866
|
+
"vcopy_laneq_s64" => ["ASIMD"],
|
1867
|
+
"vcopyq_laneq_s64" => ["ASIMD"],
|
1868
|
+
"vcopy_laneq_u8" => ["ASIMD"],
|
1869
|
+
"vcopyq_laneq_u8" => ["ASIMD"],
|
1870
|
+
"vcopy_laneq_u16" => ["ASIMD"],
|
1871
|
+
"vcopyq_laneq_u16" => ["ASIMD"],
|
1872
|
+
"vcopy_laneq_u32" => ["ASIMD"],
|
1873
|
+
"vcopyq_laneq_u32" => ["ASIMD"],
|
1874
|
+
"vcopy_laneq_u64" => ["ASIMD"],
|
1875
|
+
"vcopyq_laneq_u64" => ["ASIMD"],
|
1876
|
+
"vcopy_laneq_p64" => ["ASIMD"],
|
1877
|
+
"vcopyq_laneq_p64" => ["ASIMD"],
|
1878
|
+
"vcopy_laneq_f32" => ["ASIMD"],
|
1879
|
+
"vcopyq_laneq_f32" => ["ASIMD"],
|
1880
|
+
"vcopy_laneq_f64" => ["ASIMD"],
|
1881
|
+
"vcopyq_laneq_f64" => ["ASIMD"],
|
1882
|
+
"vcopy_laneq_p8" => ["ASIMD"],
|
1883
|
+
"vcopyq_laneq_p8" => ["ASIMD"],
|
1884
|
+
"vcopy_laneq_p16" => ["ASIMD"],
|
1885
|
+
"vcopyq_laneq_p16" => ["ASIMD"],
|
1886
|
+
"vrbit_s8" => ["ASIMD"],
|
1887
|
+
"vrbitq_s8" => ["ASIMD"],
|
1888
|
+
"vrbit_u8" => ["ASIMD"],
|
1889
|
+
"vrbitq_u8" => ["ASIMD"],
|
1890
|
+
"vrbit_p8" => ["ASIMD"],
|
1891
|
+
"vrbitq_p8" => ["ASIMD"],
|
1892
|
+
"vcreate_s8" => ["NEON", "ASIMD"],
|
1893
|
+
"vcreate_s16" => ["NEON", "ASIMD"],
|
1894
|
+
"vcreate_s32" => ["NEON", "ASIMD"],
|
1895
|
+
"vcreate_s64" => ["NEON", "ASIMD"],
|
1896
|
+
"vcreate_u8" => ["NEON", "ASIMD"],
|
1897
|
+
"vcreate_u16" => ["NEON", "ASIMD"],
|
1898
|
+
"vcreate_u32" => ["NEON", "ASIMD"],
|
1899
|
+
"vcreate_u64" => ["NEON", "ASIMD"],
|
1900
|
+
"vcreate_p64" => ["ASIMD"],
|
1901
|
+
"vcreate_f16" => ["NEON", "ASIMD"],
|
1902
|
+
"vcreate_f32" => ["NEON", "ASIMD"],
|
1903
|
+
"vcreate_p8" => ["NEON", "ASIMD"],
|
1904
|
+
"vcreate_p16" => ["NEON", "ASIMD"],
|
1905
|
+
"vcreate_f64" => ["ASIMD"],
|
1906
|
+
"vdup_n_s8" => ["NEON", "ASIMD"],
|
1907
|
+
"vdupq_n_s8" => ["NEON", "ASIMD"],
|
1908
|
+
"vdup_n_s16" => ["NEON", "ASIMD"],
|
1909
|
+
"vdupq_n_s16" => ["NEON", "ASIMD"],
|
1910
|
+
"vdup_n_s32" => ["NEON", "ASIMD"],
|
1911
|
+
"vdupq_n_s32" => ["NEON", "ASIMD"],
|
1912
|
+
"vdup_n_s64" => ["NEON", "ASIMD"],
|
1913
|
+
"vdupq_n_s64" => ["NEON", "ASIMD"],
|
1914
|
+
"vdup_n_u8" => ["NEON", "ASIMD"],
|
1915
|
+
"vdupq_n_u8" => ["NEON", "ASIMD"],
|
1916
|
+
"vdup_n_u16" => ["NEON", "ASIMD"],
|
1917
|
+
"vdupq_n_u16" => ["NEON", "ASIMD"],
|
1918
|
+
"vdup_n_u32" => ["NEON", "ASIMD"],
|
1919
|
+
"vdupq_n_u32" => ["NEON", "ASIMD"],
|
1920
|
+
"vdup_n_u64" => ["NEON", "ASIMD"],
|
1921
|
+
"vdupq_n_u64" => ["NEON", "ASIMD"],
|
1922
|
+
"vdup_n_p64" => ["ASIMD"],
|
1923
|
+
"vdupq_n_p64" => ["ASIMD"],
|
1924
|
+
"vdup_n_f32" => ["NEON", "ASIMD"],
|
1925
|
+
"vdupq_n_f32" => ["NEON", "ASIMD"],
|
1926
|
+
"vdup_n_p8" => ["NEON", "ASIMD"],
|
1927
|
+
"vdupq_n_p8" => ["NEON", "ASIMD"],
|
1928
|
+
"vdup_n_p16" => ["NEON", "ASIMD"],
|
1929
|
+
"vdupq_n_p16" => ["NEON", "ASIMD"],
|
1930
|
+
"vdup_n_f64" => ["ASIMD"],
|
1931
|
+
"vdupq_n_f64" => ["ASIMD"],
|
1932
|
+
"vmov_n_s8" => ["NEON", "ASIMD"],
|
1933
|
+
"vmovq_n_s8" => ["NEON", "ASIMD"],
|
1934
|
+
"vmov_n_s16" => ["NEON", "ASIMD"],
|
1935
|
+
"vmovq_n_s16" => ["NEON", "ASIMD"],
|
1936
|
+
"vmov_n_s32" => ["NEON", "ASIMD"],
|
1937
|
+
"vmovq_n_s32" => ["NEON", "ASIMD"],
|
1938
|
+
"vmov_n_s64" => ["NEON", "ASIMD"],
|
1939
|
+
"vmovq_n_s64" => ["NEON", "ASIMD"],
|
1940
|
+
"vmov_n_u8" => ["NEON", "ASIMD"],
|
1941
|
+
"vmovq_n_u8" => ["NEON", "ASIMD"],
|
1942
|
+
"vmov_n_u16" => ["NEON", "ASIMD"],
|
1943
|
+
"vmovq_n_u16" => ["NEON", "ASIMD"],
|
1944
|
+
"vmov_n_u32" => ["NEON", "ASIMD"],
|
1945
|
+
"vmovq_n_u32" => ["NEON", "ASIMD"],
|
1946
|
+
"vmov_n_u64" => ["NEON", "ASIMD"],
|
1947
|
+
"vmovq_n_u64" => ["NEON", "ASIMD"],
|
1948
|
+
"vmov_n_f32" => ["NEON", "ASIMD"],
|
1949
|
+
"vmovq_n_f32" => ["NEON", "ASIMD"],
|
1950
|
+
"vmov_n_p8" => ["NEON", "ASIMD"],
|
1951
|
+
"vmovq_n_p8" => ["NEON", "ASIMD"],
|
1952
|
+
"vmov_n_p16" => ["NEON", "ASIMD"],
|
1953
|
+
"vmovq_n_p16" => ["NEON", "ASIMD"],
|
1954
|
+
"vmov_n_p64" => ["ASIMD"],
|
1955
|
+
"vmovq_n_p64" => ["ASIMD"],
|
1956
|
+
"vmov_n_f64" => ["ASIMD"],
|
1957
|
+
"vmovq_n_f64" => ["ASIMD"],
|
1958
|
+
"vdup_lane_s8" => ["NEON", "ASIMD"],
|
1959
|
+
"vdupq_lane_s8" => ["NEON", "ASIMD"],
|
1960
|
+
"vdup_lane_s16" => ["NEON", "ASIMD"],
|
1961
|
+
"vdupq_lane_s16" => ["NEON", "ASIMD"],
|
1962
|
+
"vdup_lane_s32" => ["NEON", "ASIMD"],
|
1963
|
+
"vdupq_lane_s32" => ["NEON", "ASIMD"],
|
1964
|
+
"vdup_lane_s64" => ["NEON", "ASIMD"],
|
1965
|
+
"vdupq_lane_s64" => ["NEON", "ASIMD"],
|
1966
|
+
"vdup_lane_u8" => ["NEON", "ASIMD"],
|
1967
|
+
"vdupq_lane_u8" => ["NEON", "ASIMD"],
|
1968
|
+
"vdup_lane_u16" => ["NEON", "ASIMD"],
|
1969
|
+
"vdupq_lane_u16" => ["NEON", "ASIMD"],
|
1970
|
+
"vdup_lane_u32" => ["NEON", "ASIMD"],
|
1971
|
+
"vdupq_lane_u32" => ["NEON", "ASIMD"],
|
1972
|
+
"vdup_lane_u64" => ["NEON", "ASIMD"],
|
1973
|
+
"vdupq_lane_u64" => ["NEON", "ASIMD"],
|
1974
|
+
"vdup_lane_p64" => ["ASIMD"],
|
1975
|
+
"vdupq_lane_p64" => ["ASIMD"],
|
1976
|
+
"vdup_lane_f32" => ["NEON", "ASIMD"],
|
1977
|
+
"vdupq_lane_f32" => ["NEON", "ASIMD"],
|
1978
|
+
"vdup_lane_p8" => ["NEON", "ASIMD"],
|
1979
|
+
"vdupq_lane_p8" => ["NEON", "ASIMD"],
|
1980
|
+
"vdup_lane_p16" => ["NEON", "ASIMD"],
|
1981
|
+
"vdupq_lane_p16" => ["NEON", "ASIMD"],
|
1982
|
+
"vdup_lane_f64" => ["ASIMD"],
|
1983
|
+
"vdupq_lane_f64" => ["ASIMD"],
|
1984
|
+
"vdup_laneq_s8" => ["ASIMD"],
|
1985
|
+
"vdupq_laneq_s8" => ["ASIMD"],
|
1986
|
+
"vdup_laneq_s16" => ["ASIMD"],
|
1987
|
+
"vdupq_laneq_s16" => ["ASIMD"],
|
1988
|
+
"vdup_laneq_s32" => ["ASIMD"],
|
1989
|
+
"vdupq_laneq_s32" => ["ASIMD"],
|
1990
|
+
"vdup_laneq_s64" => ["ASIMD"],
|
1991
|
+
"vdupq_laneq_s64" => ["ASIMD"],
|
1992
|
+
"vdup_laneq_u8" => ["ASIMD"],
|
1993
|
+
"vdupq_laneq_u8" => ["ASIMD"],
|
1994
|
+
"vdup_laneq_u16" => ["ASIMD"],
|
1995
|
+
"vdupq_laneq_u16" => ["ASIMD"],
|
1996
|
+
"vdup_laneq_u32" => ["ASIMD"],
|
1997
|
+
"vdupq_laneq_u32" => ["ASIMD"],
|
1998
|
+
"vdup_laneq_u64" => ["ASIMD"],
|
1999
|
+
"vdupq_laneq_u64" => ["ASIMD"],
|
2000
|
+
"vdup_laneq_p64" => ["ASIMD"],
|
2001
|
+
"vdupq_laneq_p64" => ["ASIMD"],
|
2002
|
+
"vdup_laneq_f32" => ["ASIMD"],
|
2003
|
+
"vdupq_laneq_f32" => ["ASIMD"],
|
2004
|
+
"vdup_laneq_p8" => ["ASIMD"],
|
2005
|
+
"vdupq_laneq_p8" => ["ASIMD"],
|
2006
|
+
"vdup_laneq_p16" => ["ASIMD"],
|
2007
|
+
"vdupq_laneq_p16" => ["ASIMD"],
|
2008
|
+
"vdup_laneq_f64" => ["ASIMD"],
|
2009
|
+
"vdupq_laneq_f64" => ["ASIMD"],
|
2010
|
+
"vcombine_s8" => ["NEON", "ASIMD"],
|
2011
|
+
"vcombine_s16" => ["NEON", "ASIMD"],
|
2012
|
+
"vcombine_s32" => ["NEON", "ASIMD"],
|
2013
|
+
"vcombine_s64" => ["NEON", "ASIMD"],
|
2014
|
+
"vcombine_u8" => ["NEON", "ASIMD"],
|
2015
|
+
"vcombine_u16" => ["NEON", "ASIMD"],
|
2016
|
+
"vcombine_u32" => ["NEON", "ASIMD"],
|
2017
|
+
"vcombine_u64" => ["NEON", "ASIMD"],
|
2018
|
+
"vcombine_p64" => ["ASIMD"],
|
2019
|
+
"vcombine_f16" => ["NEON", "ASIMD"],
|
2020
|
+
"vcombine_f32" => ["NEON", "ASIMD"],
|
2021
|
+
"vcombine_p8" => ["NEON", "ASIMD"],
|
2022
|
+
"vcombine_p16" => ["NEON", "ASIMD"],
|
2023
|
+
"vcombine_f64" => ["ASIMD"],
|
2024
|
+
"vget_high_s8" => ["NEON", "ASIMD"],
|
2025
|
+
"vget_high_s16" => ["NEON", "ASIMD"],
|
2026
|
+
"vget_high_s32" => ["NEON", "ASIMD"],
|
2027
|
+
"vget_high_s64" => ["NEON", "ASIMD"],
|
2028
|
+
"vget_high_u8" => ["NEON", "ASIMD"],
|
2029
|
+
"vget_high_u16" => ["NEON", "ASIMD"],
|
2030
|
+
"vget_high_u32" => ["NEON", "ASIMD"],
|
2031
|
+
"vget_high_u64" => ["NEON", "ASIMD"],
|
2032
|
+
"vget_high_p64" => ["ASIMD"],
|
2033
|
+
"vget_high_f16" => ["ASIMD"],
|
2034
|
+
"vget_high_f32" => ["NEON", "ASIMD"],
|
2035
|
+
"vget_high_p8" => ["NEON", "ASIMD"],
|
2036
|
+
"vget_high_p16" => ["NEON", "ASIMD"],
|
2037
|
+
"vget_high_f64" => ["ASIMD"],
|
2038
|
+
"vget_low_s8" => ["NEON", "ASIMD"],
|
2039
|
+
"vget_low_s16" => ["NEON", "ASIMD"],
|
2040
|
+
"vget_low_s32" => ["NEON", "ASIMD"],
|
2041
|
+
"vget_low_s64" => ["NEON", "ASIMD"],
|
2042
|
+
"vget_low_u8" => ["NEON", "ASIMD"],
|
2043
|
+
"vget_low_u16" => ["NEON", "ASIMD"],
|
2044
|
+
"vget_low_u32" => ["NEON", "ASIMD"],
|
2045
|
+
"vget_low_u64" => ["NEON", "ASIMD"],
|
2046
|
+
"vget_low_p64" => ["ASIMD"],
|
2047
|
+
"vget_low_f16" => ["ASIMD"],
|
2048
|
+
"vget_low_f32" => ["NEON", "ASIMD"],
|
2049
|
+
"vget_low_p8" => ["NEON", "ASIMD"],
|
2050
|
+
"vget_low_p16" => ["NEON", "ASIMD"],
|
2051
|
+
"vget_low_f64" => ["ASIMD"],
|
2052
|
+
"vdupb_lane_s8" => ["ASIMD"],
|
2053
|
+
"vduph_lane_s16" => ["ASIMD"],
|
2054
|
+
"vdups_lane_s32" => ["ASIMD"],
|
2055
|
+
"vdupd_lane_s64" => ["ASIMD"],
|
2056
|
+
"vdupb_lane_u8" => ["ASIMD"],
|
2057
|
+
"vduph_lane_u16" => ["ASIMD"],
|
2058
|
+
"vdups_lane_u32" => ["ASIMD"],
|
2059
|
+
"vdupd_lane_u64" => ["ASIMD"],
|
2060
|
+
"vdups_lane_f32" => ["ASIMD"],
|
2061
|
+
"vdupd_lane_f64" => ["ASIMD"],
|
2062
|
+
"vdupb_lane_p8" => ["ASIMD"],
|
2063
|
+
"vduph_lane_p16" => ["ASIMD"],
|
2064
|
+
"vdupb_laneq_s8" => ["ASIMD"],
|
2065
|
+
"vduph_laneq_s16" => ["ASIMD"],
|
2066
|
+
"vdups_laneq_s32" => ["ASIMD"],
|
2067
|
+
"vdupd_laneq_s64" => ["ASIMD"],
|
2068
|
+
"vdupb_laneq_u8" => ["ASIMD"],
|
2069
|
+
"vduph_laneq_u16" => ["ASIMD"],
|
2070
|
+
"vdups_laneq_u32" => ["ASIMD"],
|
2071
|
+
"vdupd_laneq_u64" => ["ASIMD"],
|
2072
|
+
"vdups_laneq_f32" => ["ASIMD"],
|
2073
|
+
"vdupd_laneq_f64" => ["ASIMD"],
|
2074
|
+
"vdupb_laneq_p8" => ["ASIMD"],
|
2075
|
+
"vduph_laneq_p16" => ["ASIMD"],
|
2076
|
+
"vld1_s8" => ["NEON", "ASIMD"],
|
2077
|
+
"vld1q_s8" => ["NEON", "ASIMD"],
|
2078
|
+
"vld1_s16" => ["NEON", "ASIMD"],
|
2079
|
+
"vld1q_s16" => ["NEON", "ASIMD"],
|
2080
|
+
"vld1_s32" => ["NEON", "ASIMD"],
|
2081
|
+
"vld1q_s32" => ["NEON", "ASIMD"],
|
2082
|
+
"vld1_s64" => ["NEON", "ASIMD"],
|
2083
|
+
"vld1q_s64" => ["NEON", "ASIMD"],
|
2084
|
+
"vld1_u8" => ["NEON", "ASIMD"],
|
2085
|
+
"vld1q_u8" => ["NEON", "ASIMD"],
|
2086
|
+
"vld1_u16" => ["NEON", "ASIMD"],
|
2087
|
+
"vld1q_u16" => ["NEON", "ASIMD"],
|
2088
|
+
"vld1_u32" => ["NEON", "ASIMD"],
|
2089
|
+
"vld1q_u32" => ["NEON", "ASIMD"],
|
2090
|
+
"vld1_u64" => ["NEON", "ASIMD"],
|
2091
|
+
"vld1q_u64" => ["NEON", "ASIMD"],
|
2092
|
+
"vld1_p64" => ["ASIMD"],
|
2093
|
+
"vld1q_p64" => ["ASIMD"],
|
2094
|
+
"vld1_f16" => ["NEON", "ASIMD"],
|
2095
|
+
"vld1q_f16" => ["NEON", "ASIMD"],
|
2096
|
+
"vld1_f32" => ["NEON", "ASIMD"],
|
2097
|
+
"vld1q_f32" => ["NEON", "ASIMD"],
|
2098
|
+
"vld1_p8" => ["NEON", "ASIMD"],
|
2099
|
+
"vld1q_p8" => ["NEON", "ASIMD"],
|
2100
|
+
"vld1_p16" => ["NEON", "ASIMD"],
|
2101
|
+
"vld1q_p16" => ["NEON", "ASIMD"],
|
2102
|
+
"vld1_f64" => ["ASIMD"],
|
2103
|
+
"vld1q_f64" => ["ASIMD"],
|
2104
|
+
"vld1_lane_s8" => ["NEON", "ASIMD"],
|
2105
|
+
"vld1q_lane_s8" => ["NEON", "ASIMD"],
|
2106
|
+
"vld1_lane_s16" => ["NEON", "ASIMD"],
|
2107
|
+
"vld1q_lane_s16" => ["NEON", "ASIMD"],
|
2108
|
+
"vld1_lane_s32" => ["NEON", "ASIMD"],
|
2109
|
+
"vld1q_lane_s32" => ["NEON", "ASIMD"],
|
2110
|
+
"vld1_lane_s64" => ["NEON", "ASIMD"],
|
2111
|
+
"vld1q_lane_s64" => ["NEON", "ASIMD"],
|
2112
|
+
"vld1_lane_u8" => ["NEON", "ASIMD"],
|
2113
|
+
"vld1q_lane_u8" => ["NEON", "ASIMD"],
|
2114
|
+
"vld1_lane_u16" => ["NEON", "ASIMD"],
|
2115
|
+
"vld1q_lane_u16" => ["NEON", "ASIMD"],
|
2116
|
+
"vld1_lane_u32" => ["NEON", "ASIMD"],
|
2117
|
+
"vld1q_lane_u32" => ["NEON", "ASIMD"],
|
2118
|
+
"vld1_lane_u64" => ["NEON", "ASIMD"],
|
2119
|
+
"vld1q_lane_u64" => ["NEON", "ASIMD"],
|
2120
|
+
"vld1_lane_p64" => ["ASIMD"],
|
2121
|
+
"vld1q_lane_p64" => ["ASIMD"],
|
2122
|
+
"vld1_lane_f16" => ["NEON", "ASIMD"],
|
2123
|
+
"vld1q_lane_f16" => ["NEON", "ASIMD"],
|
2124
|
+
"vld1_lane_f32" => ["NEON", "ASIMD"],
|
2125
|
+
"vld1q_lane_f32" => ["NEON", "ASIMD"],
|
2126
|
+
"vld1_lane_p8" => ["NEON", "ASIMD"],
|
2127
|
+
"vld1q_lane_p8" => ["NEON", "ASIMD"],
|
2128
|
+
"vld1_lane_p16" => ["NEON", "ASIMD"],
|
2129
|
+
"vld1q_lane_p16" => ["NEON", "ASIMD"],
|
2130
|
+
"vld1_lane_f64" => ["ASIMD"],
|
2131
|
+
"vld1q_lane_f64" => ["ASIMD"],
|
2132
|
+
"vld1_dup_s8" => ["NEON", "ASIMD"],
|
2133
|
+
"vld1q_dup_s8" => ["NEON", "ASIMD"],
|
2134
|
+
"vld1_dup_s16" => ["NEON", "ASIMD"],
|
2135
|
+
"vld1q_dup_s16" => ["NEON", "ASIMD"],
|
2136
|
+
"vld1_dup_s32" => ["NEON", "ASIMD"],
|
2137
|
+
"vld1q_dup_s32" => ["NEON", "ASIMD"],
|
2138
|
+
"vld1_dup_s64" => ["NEON", "ASIMD"],
|
2139
|
+
"vld1q_dup_s64" => ["NEON", "ASIMD"],
|
2140
|
+
"vld1_dup_u8" => ["NEON", "ASIMD"],
|
2141
|
+
"vld1q_dup_u8" => ["NEON", "ASIMD"],
|
2142
|
+
"vld1_dup_u16" => ["NEON", "ASIMD"],
|
2143
|
+
"vld1q_dup_u16" => ["NEON", "ASIMD"],
|
2144
|
+
"vld1_dup_u32" => ["NEON", "ASIMD"],
|
2145
|
+
"vld1q_dup_u32" => ["NEON", "ASIMD"],
|
2146
|
+
"vld1_dup_u64" => ["NEON", "ASIMD"],
|
2147
|
+
"vld1q_dup_u64" => ["NEON", "ASIMD"],
|
2148
|
+
"vld1_dup_p64" => ["ASIMD"],
|
2149
|
+
"vld1q_dup_p64" => ["ASIMD"],
|
2150
|
+
"vld1_dup_f16" => ["NEON", "ASIMD"],
|
2151
|
+
"vld1q_dup_f16" => ["NEON", "ASIMD"],
|
2152
|
+
"vld1_dup_f32" => ["NEON", "ASIMD"],
|
2153
|
+
"vld1q_dup_f32" => ["NEON", "ASIMD"],
|
2154
|
+
"vld1_dup_p8" => ["NEON", "ASIMD"],
|
2155
|
+
"vld1q_dup_p8" => ["NEON", "ASIMD"],
|
2156
|
+
"vld1_dup_p16" => ["NEON", "ASIMD"],
|
2157
|
+
"vld1q_dup_p16" => ["NEON", "ASIMD"],
|
2158
|
+
"vld1_dup_f64" => ["ASIMD"],
|
2159
|
+
"vld1q_dup_f64" => ["ASIMD"],
|
2160
|
+
"vst1_s8" => ["NEON", "ASIMD"],
|
2161
|
+
"vst1q_s8" => ["NEON", "ASIMD"],
|
2162
|
+
"vst1_s16" => ["NEON", "ASIMD"],
|
2163
|
+
"vst1q_s16" => ["NEON", "ASIMD"],
|
2164
|
+
"vst1_s32" => ["NEON", "ASIMD"],
|
2165
|
+
"vst1q_s32" => ["NEON", "ASIMD"],
|
2166
|
+
"vst1_s64" => ["NEON", "ASIMD"],
|
2167
|
+
"vst1q_s64" => ["NEON", "ASIMD"],
|
2168
|
+
"vst1_u8" => ["NEON", "ASIMD"],
|
2169
|
+
"vst1q_u8" => ["NEON", "ASIMD"],
|
2170
|
+
"vst1_u16" => ["NEON", "ASIMD"],
|
2171
|
+
"vst1q_u16" => ["NEON", "ASIMD"],
|
2172
|
+
"vst1_u32" => ["NEON", "ASIMD"],
|
2173
|
+
"vst1q_u32" => ["NEON", "ASIMD"],
|
2174
|
+
"vst1_u64" => ["NEON", "ASIMD"],
|
2175
|
+
"vst1q_u64" => ["NEON", "ASIMD"],
|
2176
|
+
"vst1_p64" => ["ASIMD"],
|
2177
|
+
"vst1q_p64" => ["ASIMD"],
|
2178
|
+
"vst1_f16" => ["NEON", "ASIMD"],
|
2179
|
+
"vst1q_f16" => ["NEON", "ASIMD"],
|
2180
|
+
"vst1_f32" => ["NEON", "ASIMD"],
|
2181
|
+
"vst1q_f32" => ["NEON", "ASIMD"],
|
2182
|
+
"vst1_p8" => ["NEON", "ASIMD"],
|
2183
|
+
"vst1q_p8" => ["NEON", "ASIMD"],
|
2184
|
+
"vst1_p16" => ["NEON", "ASIMD"],
|
2185
|
+
"vst1q_p16" => ["NEON", "ASIMD"],
|
2186
|
+
"vst1_f64" => ["ASIMD"],
|
2187
|
+
"vst1q_f64" => ["ASIMD"],
|
2188
|
+
"vst1_lane_s8" => ["NEON", "ASIMD"],
|
2189
|
+
"vst1q_lane_s8" => ["NEON", "ASIMD"],
|
2190
|
+
"vst1_lane_s16" => ["NEON", "ASIMD"],
|
2191
|
+
"vst1q_lane_s16" => ["NEON", "ASIMD"],
|
2192
|
+
"vst1_lane_s32" => ["NEON", "ASIMD"],
|
2193
|
+
"vst1q_lane_s32" => ["NEON", "ASIMD"],
|
2194
|
+
"vst1_lane_s64" => ["NEON", "ASIMD"],
|
2195
|
+
"vst1q_lane_s64" => ["NEON", "ASIMD"],
|
2196
|
+
"vst1_lane_u8" => ["NEON", "ASIMD"],
|
2197
|
+
"vst1q_lane_u8" => ["NEON", "ASIMD"],
|
2198
|
+
"vst1_lane_u16" => ["NEON", "ASIMD"],
|
2199
|
+
"vst1q_lane_u16" => ["NEON", "ASIMD"],
|
2200
|
+
"vst1_lane_u32" => ["NEON", "ASIMD"],
|
2201
|
+
"vst1q_lane_u32" => ["NEON", "ASIMD"],
|
2202
|
+
"vst1_lane_u64" => ["NEON", "ASIMD"],
|
2203
|
+
"vst1q_lane_u64" => ["NEON", "ASIMD"],
|
2204
|
+
"vst1_lane_p64" => ["ASIMD"],
|
2205
|
+
"vst1q_lane_p64" => ["ASIMD"],
|
2206
|
+
"vst1_lane_f16" => ["NEON", "ASIMD"],
|
2207
|
+
"vst1q_lane_f16" => ["NEON", "ASIMD"],
|
2208
|
+
"vst1_lane_f32" => ["NEON", "ASIMD"],
|
2209
|
+
"vst1q_lane_f32" => ["NEON", "ASIMD"],
|
2210
|
+
"vst1_lane_p8" => ["NEON", "ASIMD"],
|
2211
|
+
"vst1q_lane_p8" => ["NEON", "ASIMD"],
|
2212
|
+
"vst1_lane_p16" => ["NEON", "ASIMD"],
|
2213
|
+
"vst1q_lane_p16" => ["NEON", "ASIMD"],
|
2214
|
+
"vst1_lane_f64" => ["ASIMD"],
|
2215
|
+
"vst1q_lane_f64" => ["ASIMD"],
|
2216
|
+
"vld2_s8" => ["NEON", "ASIMD"],
|
2217
|
+
"vld2q_s8" => ["NEON", "ASIMD"],
|
2218
|
+
"vld2_s16" => ["NEON", "ASIMD"],
|
2219
|
+
"vld2q_s16" => ["NEON", "ASIMD"],
|
2220
|
+
"vld2_s32" => ["NEON", "ASIMD"],
|
2221
|
+
"vld2q_s32" => ["NEON", "ASIMD"],
|
2222
|
+
"vld2_u8" => ["NEON", "ASIMD"],
|
2223
|
+
"vld2q_u8" => ["NEON", "ASIMD"],
|
2224
|
+
"vld2_u16" => ["NEON", "ASIMD"],
|
2225
|
+
"vld2q_u16" => ["NEON", "ASIMD"],
|
2226
|
+
"vld2_u32" => ["NEON", "ASIMD"],
|
2227
|
+
"vld2q_u32" => ["NEON", "ASIMD"],
|
2228
|
+
"vld2_f16" => ["NEON", "ASIMD"],
|
2229
|
+
"vld2q_f16" => ["NEON", "ASIMD"],
|
2230
|
+
"vld2_f32" => ["NEON", "ASIMD"],
|
2231
|
+
"vld2q_f32" => ["NEON", "ASIMD"],
|
2232
|
+
"vld2_p8" => ["NEON", "ASIMD"],
|
2233
|
+
"vld2q_p8" => ["NEON", "ASIMD"],
|
2234
|
+
"vld2_p16" => ["NEON", "ASIMD"],
|
2235
|
+
"vld2q_p16" => ["NEON", "ASIMD"],
|
2236
|
+
"vld2_s64" => ["NEON", "ASIMD"],
|
2237
|
+
"vld2_u64" => ["ASIMD"],
|
2238
|
+
"vld2_p64" => ["ASIMD"],
|
2239
|
+
"vld2q_s64" => ["ASIMD"],
|
2240
|
+
"vld2q_u64" => ["ASIMD"],
|
2241
|
+
"vld2q_p64" => ["ASIMD"],
|
2242
|
+
"vld2_f64" => ["ASIMD"],
|
2243
|
+
"vld2q_f64" => ["NEON", "ASIMD"],
|
2244
|
+
"vld3_s8" => ["NEON", "ASIMD"],
|
2245
|
+
"vld3q_s8" => ["NEON", "ASIMD"],
|
2246
|
+
"vld3_s16" => ["NEON", "ASIMD"],
|
2247
|
+
"vld3q_s16" => ["NEON", "ASIMD"],
|
2248
|
+
"vld3_s32" => ["NEON", "ASIMD"],
|
2249
|
+
"vld3q_s32" => ["NEON", "ASIMD"],
|
2250
|
+
"vld3_u8" => ["NEON", "ASIMD"],
|
2251
|
+
"vld3q_u8" => ["NEON", "ASIMD"],
|
2252
|
+
"vld3_u16" => ["NEON", "ASIMD"],
|
2253
|
+
"vld3q_u16" => ["NEON", "ASIMD"],
|
2254
|
+
"vld3_u32" => ["NEON", "ASIMD"],
|
2255
|
+
"vld3q_u32" => ["NEON", "ASIMD"],
|
2256
|
+
"vld3_f16" => ["NEON", "ASIMD"],
|
2257
|
+
"vld3q_f16" => ["NEON", "ASIMD"],
|
2258
|
+
"vld3_f32" => ["NEON", "ASIMD"],
|
2259
|
+
"vld3q_f32" => ["NEON", "ASIMD"],
|
2260
|
+
"vld3_p8" => ["NEON", "ASIMD"],
|
2261
|
+
"vld3q_p8" => ["NEON", "ASIMD"],
|
2262
|
+
"vld3_p16" => ["NEON", "ASIMD"],
|
2263
|
+
"vld3q_p16" => ["NEON", "ASIMD"],
|
2264
|
+
"vld3_s64" => ["NEON", "ASIMD"],
|
2265
|
+
"vld3_u64" => ["ASIMD"],
|
2266
|
+
"vld3_p64" => ["ASIMD"],
|
2267
|
+
"vld3q_s64" => ["ASIMD"],
|
2268
|
+
"vld3q_u64" => ["ASIMD"],
|
2269
|
+
"vld3q_p64" => ["ASIMD"],
|
2270
|
+
"vld3_f64" => ["ASIMD"],
|
2271
|
+
"vld3q_f64" => ["NEON", "ASIMD"],
|
2272
|
+
"vld4_s8" => ["NEON", "ASIMD"],
|
2273
|
+
"vld4q_s8" => ["NEON", "ASIMD"],
|
2274
|
+
"vld4_s16" => ["NEON", "ASIMD"],
|
2275
|
+
"vld4q_s16" => ["NEON", "ASIMD"],
|
2276
|
+
"vld4_s32" => ["NEON", "ASIMD"],
|
2277
|
+
"vld4q_s32" => ["NEON", "ASIMD"],
|
2278
|
+
"vld4_u8" => ["NEON", "ASIMD"],
|
2279
|
+
"vld4q_u8" => ["NEON", "ASIMD"],
|
2280
|
+
"vld4_u16" => ["NEON", "ASIMD"],
|
2281
|
+
"vld4q_u16" => ["NEON", "ASIMD"],
|
2282
|
+
"vld4_u32" => ["NEON", "ASIMD"],
|
2283
|
+
"vld4q_u32" => ["NEON", "ASIMD"],
|
2284
|
+
"vld4_f16" => ["NEON", "ASIMD"],
|
2285
|
+
"vld4q_f16" => ["NEON", "ASIMD"],
|
2286
|
+
"vld4_f32" => ["NEON", "ASIMD"],
|
2287
|
+
"vld4q_f32" => ["NEON", "ASIMD"],
|
2288
|
+
"vld4_p8" => ["NEON", "ASIMD"],
|
2289
|
+
"vld4q_p8" => ["NEON", "ASIMD"],
|
2290
|
+
"vld4_p16" => ["NEON", "ASIMD"],
|
2291
|
+
"vld4q_p16" => ["NEON", "ASIMD"],
|
2292
|
+
"vld4_s64" => ["NEON", "ASIMD"],
|
2293
|
+
"vld4_u64" => ["ASIMD"],
|
2294
|
+
"vld4_p64" => ["ASIMD"],
|
2295
|
+
"vld4q_s64" => ["ASIMD"],
|
2296
|
+
"vld4q_u64" => ["ASIMD"],
|
2297
|
+
"vld4q_p64" => ["ASIMD"],
|
2298
|
+
"vld4_f64" => ["ASIMD"],
|
2299
|
+
"vld4q_f64" => ["NEON", "ASIMD"],
|
2300
|
+
"vld2_dup_s8" => ["NEON", "ASIMD"],
|
2301
|
+
"vld2q_dup_s8" => ["NEON", "ASIMD"],
|
2302
|
+
"vld2_dup_s16" => ["NEON", "ASIMD"],
|
2303
|
+
"vld2q_dup_s16" => ["NEON", "ASIMD"],
|
2304
|
+
"vld2_dup_s32" => ["NEON", "ASIMD"],
|
2305
|
+
"vld2q_dup_s32" => ["NEON", "ASIMD"],
|
2306
|
+
"vld2_dup_u8" => ["NEON", "ASIMD"],
|
2307
|
+
"vld2q_dup_u8" => ["NEON", "ASIMD"],
|
2308
|
+
"vld2_dup_u16" => ["NEON", "ASIMD"],
|
2309
|
+
"vld2q_dup_u16" => ["NEON", "ASIMD"],
|
2310
|
+
"vld2_dup_u32" => ["NEON", "ASIMD"],
|
2311
|
+
"vld2q_dup_u32" => ["NEON", "ASIMD"],
|
2312
|
+
"vld2_dup_f16" => ["NEON", "ASIMD"],
|
2313
|
+
"vld2q_dup_f16" => ["NEON", "ASIMD"],
|
2314
|
+
"vld2_dup_f32" => ["NEON", "ASIMD"],
|
2315
|
+
"vld2q_dup_f32" => ["NEON", "ASIMD"],
|
2316
|
+
"vld2_dup_p8" => ["NEON", "ASIMD"],
|
2317
|
+
"vld2q_dup_p8" => ["NEON", "ASIMD"],
|
2318
|
+
"vld2_dup_p16" => ["NEON", "ASIMD"],
|
2319
|
+
"vld2q_dup_p16" => ["NEON", "ASIMD"],
|
2320
|
+
"vld2_dup_s64" => ["NEON", "ASIMD"],
|
2321
|
+
"vld2_dup_u64" => ["ASIMD"],
|
2322
|
+
"vld2_dup_p64" => ["ASIMD"],
|
2323
|
+
"vld2q_dup_s64" => ["ASIMD"],
|
2324
|
+
"vld2q_dup_u64" => ["ASIMD"],
|
2325
|
+
"vld2q_dup_p64" => ["ASIMD"],
|
2326
|
+
"vld2_dup_f64" => ["ASIMD"],
|
2327
|
+
"vld2q_dup_f64" => ["NEON", "ASIMD"],
|
2328
|
+
"vld3_dup_s8" => ["NEON", "ASIMD"],
|
2329
|
+
"vld3q_dup_s8" => ["NEON", "ASIMD"],
|
2330
|
+
"vld3_dup_s16" => ["NEON", "ASIMD"],
|
2331
|
+
"vld3q_dup_s16" => ["NEON", "ASIMD"],
|
2332
|
+
"vld3_dup_s32" => ["NEON", "ASIMD"],
|
2333
|
+
"vld3q_dup_s32" => ["NEON", "ASIMD"],
|
2334
|
+
"vld3_dup_u8" => ["NEON", "ASIMD"],
|
2335
|
+
"vld3q_dup_u8" => ["NEON", "ASIMD"],
|
2336
|
+
"vld3_dup_u16" => ["NEON", "ASIMD"],
|
2337
|
+
"vld3q_dup_u16" => ["NEON", "ASIMD"],
|
2338
|
+
"vld3_dup_u32" => ["NEON", "ASIMD"],
|
2339
|
+
"vld3q_dup_u32" => ["NEON", "ASIMD"],
|
2340
|
+
"vld3_dup_f16" => ["NEON", "ASIMD"],
|
2341
|
+
"vld3q_dup_f16" => ["NEON", "ASIMD"],
|
2342
|
+
"vld3_dup_f32" => ["NEON", "ASIMD"],
|
2343
|
+
"vld3q_dup_f32" => ["NEON", "ASIMD"],
|
2344
|
+
"vld3_dup_p8" => ["NEON", "ASIMD"],
|
2345
|
+
"vld3q_dup_p8" => ["NEON", "ASIMD"],
|
2346
|
+
"vld3_dup_p16" => ["NEON", "ASIMD"],
|
2347
|
+
"vld3q_dup_p16" => ["NEON", "ASIMD"],
|
2348
|
+
"vld3_dup_s64" => ["NEON", "ASIMD"],
|
2349
|
+
"vld3_dup_u64" => ["ASIMD"],
|
2350
|
+
"vld3_dup_p64" => ["ASIMD"],
|
2351
|
+
"vld3q_dup_s64" => ["ASIMD"],
|
2352
|
+
"vld3q_dup_u64" => ["ASIMD"],
|
2353
|
+
"vld3q_dup_p64" => ["ASIMD"],
|
2354
|
+
"vld3_dup_f64" => ["ASIMD"],
|
2355
|
+
"vld3q_dup_f64" => ["NEON", "ASIMD"],
|
2356
|
+
"vld4_dup_s8" => ["NEON", "ASIMD"],
|
2357
|
+
"vld4q_dup_s8" => ["NEON", "ASIMD"],
|
2358
|
+
"vld4_dup_s16" => ["NEON", "ASIMD"],
|
2359
|
+
"vld4q_dup_s16" => ["NEON", "ASIMD"],
|
2360
|
+
"vld4_dup_s32" => ["NEON", "ASIMD"],
|
2361
|
+
"vld4q_dup_s32" => ["NEON", "ASIMD"],
|
2362
|
+
"vld4_dup_u8" => ["NEON", "ASIMD"],
|
2363
|
+
"vld4q_dup_u8" => ["NEON", "ASIMD"],
|
2364
|
+
"vld4_dup_u16" => ["NEON", "ASIMD"],
|
2365
|
+
"vld4q_dup_u16" => ["NEON", "ASIMD"],
|
2366
|
+
"vld4_dup_u32" => ["NEON", "ASIMD"],
|
2367
|
+
"vld4q_dup_u32" => ["NEON", "ASIMD"],
|
2368
|
+
"vld4_dup_f16" => ["NEON", "ASIMD"],
|
2369
|
+
"vld4q_dup_f16" => ["NEON", "ASIMD"],
|
2370
|
+
"vld4_dup_f32" => ["NEON", "ASIMD"],
|
2371
|
+
"vld4q_dup_f32" => ["NEON", "ASIMD"],
|
2372
|
+
"vld4_dup_p8" => ["NEON", "ASIMD"],
|
2373
|
+
"vld4q_dup_p8" => ["NEON", "ASIMD"],
|
2374
|
+
"vld4_dup_p16" => ["NEON", "ASIMD"],
|
2375
|
+
"vld4q_dup_p16" => ["NEON", "ASIMD"],
|
2376
|
+
"vld4_dup_s64" => ["NEON", "ASIMD"],
|
2377
|
+
"vld4_dup_u64" => ["ASIMD"],
|
2378
|
+
"vld4_dup_p64" => ["ASIMD"],
|
2379
|
+
"vld4q_dup_s64" => ["ASIMD"],
|
2380
|
+
"vld4q_dup_u64" => ["ASIMD"],
|
2381
|
+
"vld4q_dup_p64" => ["ASIMD"],
|
2382
|
+
"vld4_dup_f64" => ["ASIMD"],
|
2383
|
+
"vld4q_dup_f64" => ["ASIMD"],
|
2384
|
+
"vst2_s8" => ["NEON", "ASIMD"],
|
2385
|
+
"vst2q_s8" => ["NEON", "ASIMD"],
|
2386
|
+
"vst2_s16" => ["NEON", "ASIMD"],
|
2387
|
+
"vst2q_s16" => ["NEON", "ASIMD"],
|
2388
|
+
"vst2_s32" => ["NEON", "ASIMD"],
|
2389
|
+
"vst2q_s32" => ["NEON", "ASIMD"],
|
2390
|
+
"vst2_u8" => ["NEON", "ASIMD"],
|
2391
|
+
"vst2q_u8" => ["NEON", "ASIMD"],
|
2392
|
+
"vst2_u16" => ["NEON", "ASIMD"],
|
2393
|
+
"vst2q_u16" => ["NEON", "ASIMD"],
|
2394
|
+
"vst2_u32" => ["NEON", "ASIMD"],
|
2395
|
+
"vst2q_u32" => ["NEON", "ASIMD"],
|
2396
|
+
"vst2_f16" => ["NEON", "ASIMD"],
|
2397
|
+
"vst2q_f16" => ["NEON", "ASIMD"],
|
2398
|
+
"vst2_f32" => ["NEON", "ASIMD"],
|
2399
|
+
"vst2q_f32" => ["NEON", "ASIMD"],
|
2400
|
+
"vst2_p8" => ["NEON", "ASIMD"],
|
2401
|
+
"vst2q_p8" => ["NEON", "ASIMD"],
|
2402
|
+
"vst2_p16" => ["NEON", "ASIMD"],
|
2403
|
+
"vst2q_p16" => ["NEON", "ASIMD"],
|
2404
|
+
"vst2_s64" => ["NEON", "ASIMD"],
|
2405
|
+
"vst2_u64" => ["NEON", "ASIMD"],
|
2406
|
+
"vst2_p64" => ["ASIMD"],
|
2407
|
+
"vst2q_s64" => ["ASIMD"],
|
2408
|
+
"vst2q_u64" => ["ASIMD"],
|
2409
|
+
"vst2q_p64" => ["ASIMD"],
|
2410
|
+
"vst2_f64" => ["ASIMD"],
|
2411
|
+
"vst2q_f64" => ["ASIMD"],
|
2412
|
+
"vst3_s8" => ["NEON", "ASIMD"],
|
2413
|
+
"vst3q_s8" => ["NEON", "ASIMD"],
|
2414
|
+
"vst3_s16" => ["NEON", "ASIMD"],
|
2415
|
+
"vst3q_s16" => ["NEON", "ASIMD"],
|
2416
|
+
"vst3_s32" => ["NEON", "ASIMD"],
|
2417
|
+
"vst3q_s32" => ["NEON", "ASIMD"],
|
2418
|
+
"vst3_u8" => ["NEON", "ASIMD"],
|
2419
|
+
"vst3q_u8" => ["NEON", "ASIMD"],
|
2420
|
+
"vst3_u16" => ["NEON", "ASIMD"],
|
2421
|
+
"vst3q_u16" => ["NEON", "ASIMD"],
|
2422
|
+
"vst3_u32" => ["NEON", "ASIMD"],
|
2423
|
+
"vst3q_u32" => ["NEON", "ASIMD"],
|
2424
|
+
"vst3_f16" => ["NEON", "ASIMD"],
|
2425
|
+
"vst3q_f16" => ["NEON", "ASIMD"],
|
2426
|
+
"vst3_f32" => ["NEON", "ASIMD"],
|
2427
|
+
"vst3q_f32" => ["NEON", "ASIMD"],
|
2428
|
+
"vst3_p8" => ["NEON", "ASIMD"],
|
2429
|
+
"vst3q_p8" => ["NEON", "ASIMD"],
|
2430
|
+
"vst3_p16" => ["NEON", "ASIMD"],
|
2431
|
+
"vst3q_p16" => ["NEON", "ASIMD"],
|
2432
|
+
"vst3_s64" => ["NEON", "ASIMD"],
|
2433
|
+
"vst3_u64" => ["NEON", "ASIMD"],
|
2434
|
+
"vst3_p64" => ["ASIMD"],
|
2435
|
+
"vst3q_s64" => ["ASIMD"],
|
2436
|
+
"vst3q_u64" => ["ASIMD"],
|
2437
|
+
"vst3q_p64" => ["ASIMD"],
|
2438
|
+
"vst3_f64" => ["ASIMD"],
|
2439
|
+
"vst3q_f64" => ["ASIMD"],
|
2440
|
+
"vst4_s8" => ["NEON", "ASIMD"],
|
2441
|
+
"vst4q_s8" => ["NEON", "ASIMD"],
|
2442
|
+
"vst4_s16" => ["NEON", "ASIMD"],
|
2443
|
+
"vst4q_s16" => ["NEON", "ASIMD"],
|
2444
|
+
"vst4_s32" => ["NEON", "ASIMD"],
|
2445
|
+
"vst4q_s32" => ["NEON", "ASIMD"],
|
2446
|
+
"vst4_u8" => ["NEON", "ASIMD"],
|
2447
|
+
"vst4q_u8" => ["NEON", "ASIMD"],
|
2448
|
+
"vst4_u16" => ["NEON", "ASIMD"],
|
2449
|
+
"vst4q_u16" => ["NEON", "ASIMD"],
|
2450
|
+
"vst4_u32" => ["NEON", "ASIMD"],
|
2451
|
+
"vst4q_u32" => ["NEON", "ASIMD"],
|
2452
|
+
"vst4_f16" => ["NEON", "ASIMD"],
|
2453
|
+
"vst4q_f16" => ["NEON", "ASIMD"],
|
2454
|
+
"vst4_f32" => ["NEON", "ASIMD"],
|
2455
|
+
"vst4q_f32" => ["NEON", "ASIMD"],
|
2456
|
+
"vst4_p8" => ["NEON", "ASIMD"],
|
2457
|
+
"vst4q_p8" => ["NEON", "ASIMD"],
|
2458
|
+
"vst4_p16" => ["NEON", "ASIMD"],
|
2459
|
+
"vst4q_p16" => ["NEON", "ASIMD"],
|
2460
|
+
"vst4_s64" => ["NEON", "ASIMD"],
|
2461
|
+
"vst4_u64" => ["NEON", "ASIMD"],
|
2462
|
+
"vst4_p64" => ["ASIMD"],
|
2463
|
+
"vst4q_s64" => ["ASIMD"],
|
2464
|
+
"vst4q_u64" => ["ASIMD"],
|
2465
|
+
"vst4q_p64" => ["ASIMD"],
|
2466
|
+
"vst4_f64" => ["ASIMD"],
|
2467
|
+
"vst4q_f64" => ["ASIMD"],
|
2468
|
+
"vld2_lane_s16" => ["NEON", "ASIMD"],
|
2469
|
+
"vld2q_lane_s16" => ["NEON", "ASIMD"],
|
2470
|
+
"vld2_lane_s32" => ["NEON", "ASIMD"],
|
2471
|
+
"vld2q_lane_s32" => ["NEON", "ASIMD"],
|
2472
|
+
"vld2_lane_u16" => ["NEON", "ASIMD"],
|
2473
|
+
"vld2q_lane_u16" => ["NEON", "ASIMD"],
|
2474
|
+
"vld2_lane_u32" => ["NEON", "ASIMD"],
|
2475
|
+
"vld2q_lane_u32" => ["NEON", "ASIMD"],
|
2476
|
+
"vld2_lane_f16" => ["NEON", "ASIMD"],
|
2477
|
+
"vld2q_lane_f16" => ["NEON", "ASIMD"],
|
2478
|
+
"vld2_lane_f32" => ["NEON", "ASIMD"],
|
2479
|
+
"vld2q_lane_f32" => ["NEON", "ASIMD"],
|
2480
|
+
"vld2_lane_p16" => ["NEON", "ASIMD"],
|
2481
|
+
"vld2q_lane_p16" => ["NEON", "ASIMD"],
|
2482
|
+
"vld2_lane_s8" => ["NEON", "ASIMD"],
|
2483
|
+
"vld2_lane_u8" => ["NEON", "ASIMD"],
|
2484
|
+
"vld2_lane_p8" => ["NEON", "ASIMD"],
|
2485
|
+
"vld2q_lane_s8" => ["ASIMD"],
|
2486
|
+
"vld2q_lane_u8" => ["ASIMD"],
|
2487
|
+
"vld2q_lane_p8" => ["ASIMD"],
|
2488
|
+
"vld2_lane_s64" => ["ASIMD"],
|
2489
|
+
"vld2q_lane_s64" => ["ASIMD"],
|
2490
|
+
"vld2_lane_u64" => ["ASIMD"],
|
2491
|
+
"vld2q_lane_u64" => ["ASIMD"],
|
2492
|
+
"vld2_lane_p64" => ["ASIMD"],
|
2493
|
+
"vld2q_lane_p64" => ["ASIMD"],
|
2494
|
+
"vld2_lane_f64" => ["ASIMD"],
|
2495
|
+
"vld2q_lane_f64" => ["ASIMD"],
|
2496
|
+
"vld3_lane_s16" => ["NEON", "ASIMD"],
|
2497
|
+
"vld3q_lane_s16" => ["NEON", "ASIMD"],
|
2498
|
+
"vld3_lane_s32" => ["NEON", "ASIMD"],
|
2499
|
+
"vld3q_lane_s32" => ["NEON", "ASIMD"],
|
2500
|
+
"vld3_lane_u16" => ["NEON", "ASIMD"],
|
2501
|
+
"vld3q_lane_u16" => ["NEON", "ASIMD"],
|
2502
|
+
"vld3_lane_u32" => ["NEON", "ASIMD"],
|
2503
|
+
"vld3q_lane_u32" => ["NEON", "ASIMD"],
|
2504
|
+
"vld3_lane_f16" => ["NEON", "ASIMD"],
|
2505
|
+
"vld3q_lane_f16" => ["NEON", "ASIMD"],
|
2506
|
+
"vld3_lane_f32" => ["NEON", "ASIMD"],
|
2507
|
+
"vld3q_lane_f32" => ["NEON", "ASIMD"],
|
2508
|
+
"vld3_lane_p16" => ["NEON", "ASIMD"],
|
2509
|
+
"vld3q_lane_p16" => ["NEON", "ASIMD"],
|
2510
|
+
"vld3_lane_s8" => ["NEON", "ASIMD"],
|
2511
|
+
"vld3_lane_u8" => ["NEON", "ASIMD"],
|
2512
|
+
"vld3_lane_p8" => ["NEON", "ASIMD"],
|
2513
|
+
"vld3q_lane_s8" => ["ASIMD"],
|
2514
|
+
"vld3q_lane_u8" => ["ASIMD"],
|
2515
|
+
"vld3q_lane_p8" => ["ASIMD"],
|
2516
|
+
"vld3_lane_s64" => ["ASIMD"],
|
2517
|
+
"vld3q_lane_s64" => ["ASIMD"],
|
2518
|
+
"vld3_lane_u64" => ["ASIMD"],
|
2519
|
+
"vld3q_lane_u64" => ["ASIMD"],
|
2520
|
+
"vld3_lane_p64" => ["ASIMD"],
|
2521
|
+
"vld3q_lane_p64" => ["ASIMD"],
|
2522
|
+
"vld3_lane_f64" => ["ASIMD"],
|
2523
|
+
"vld3q_lane_f64" => ["ASIMD"],
|
2524
|
+
"vld4_lane_s16" => ["NEON", "ASIMD"],
|
2525
|
+
"vld4q_lane_s16" => ["NEON", "ASIMD"],
|
2526
|
+
"vld4_lane_s32" => ["NEON", "ASIMD"],
|
2527
|
+
"vld4q_lane_s32" => ["NEON", "ASIMD"],
|
2528
|
+
"vld4_lane_u16" => ["NEON", "ASIMD"],
|
2529
|
+
"vld4q_lane_u16" => ["NEON", "ASIMD"],
|
2530
|
+
"vld4_lane_u32" => ["NEON", "ASIMD"],
|
2531
|
+
"vld4q_lane_u32" => ["NEON", "ASIMD"],
|
2532
|
+
"vld4_lane_f16" => ["NEON", "ASIMD"],
|
2533
|
+
"vld4q_lane_f16" => ["NEON", "ASIMD"],
|
2534
|
+
"vld4_lane_f32" => ["NEON", "ASIMD"],
|
2535
|
+
"vld4q_lane_f32" => ["NEON", "ASIMD"],
|
2536
|
+
"vld4_lane_p16" => ["NEON", "ASIMD"],
|
2537
|
+
"vld4q_lane_p16" => ["NEON", "ASIMD"],
|
2538
|
+
"vld4_lane_s8" => ["NEON", "ASIMD"],
|
2539
|
+
"vld4_lane_u8" => ["NEON", "ASIMD"],
|
2540
|
+
"vld4_lane_p8" => ["NEON", "ASIMD"],
|
2541
|
+
"vld4q_lane_s8" => ["ASIMD"],
|
2542
|
+
"vld4q_lane_u8" => ["ASIMD"],
|
2543
|
+
"vld4q_lane_p8" => ["ASIMD"],
|
2544
|
+
"vld4_lane_s64" => ["ASIMD"],
|
2545
|
+
"vld4q_lane_s64" => ["ASIMD"],
|
2546
|
+
"vld4_lane_u64" => ["ASIMD"],
|
2547
|
+
"vld4q_lane_u64" => ["ASIMD"],
|
2548
|
+
"vld4_lane_p64" => ["ASIMD"],
|
2549
|
+
"vld4q_lane_p64" => ["ASIMD"],
|
2550
|
+
"vld4_lane_f64" => ["ASIMD"],
|
2551
|
+
"vld4q_lane_f64" => ["ASIMD"],
|
2552
|
+
"vst2_lane_s8" => ["NEON", "ASIMD"],
|
2553
|
+
"vst2_lane_u8" => ["NEON", "ASIMD"],
|
2554
|
+
"vst2_lane_p8" => ["NEON", "ASIMD"],
|
2555
|
+
"vst3_lane_s8" => ["NEON", "ASIMD"],
|
2556
|
+
"vst3_lane_u8" => ["NEON", "ASIMD"],
|
2557
|
+
"vst3_lane_p8" => ["NEON", "ASIMD"],
|
2558
|
+
"vst4_lane_s8" => ["NEON", "ASIMD"],
|
2559
|
+
"vst4_lane_u8" => ["NEON", "ASIMD"],
|
2560
|
+
"vst4_lane_p8" => ["NEON", "ASIMD"],
|
2561
|
+
"vst2_lane_s16" => ["NEON", "ASIMD"],
|
2562
|
+
"vst2q_lane_s16" => ["NEON", "ASIMD"],
|
2563
|
+
"vst2_lane_s32" => ["NEON", "ASIMD"],
|
2564
|
+
"vst2q_lane_s32" => ["NEON", "ASIMD"],
|
2565
|
+
"vst2_lane_u16" => ["NEON", "ASIMD"],
|
2566
|
+
"vst2q_lane_u16" => ["NEON", "ASIMD"],
|
2567
|
+
"vst2_lane_u32" => ["NEON", "ASIMD"],
|
2568
|
+
"vst2q_lane_u32" => ["NEON", "ASIMD"],
|
2569
|
+
"vst2_lane_f16" => ["NEON", "ASIMD"],
|
2570
|
+
"vst2q_lane_f16" => ["NEON", "ASIMD"],
|
2571
|
+
"vst2_lane_f32" => ["NEON", "ASIMD"],
|
2572
|
+
"vst2q_lane_f32" => ["NEON", "ASIMD"],
|
2573
|
+
"vst2_lane_p16" => ["NEON", "ASIMD"],
|
2574
|
+
"vst2q_lane_p16" => ["NEON", "ASIMD"],
|
2575
|
+
"vst2q_lane_s8" => ["ASIMD"],
|
2576
|
+
"vst2q_lane_u8" => ["ASIMD"],
|
2577
|
+
"vst2q_lane_p8" => ["ASIMD"],
|
2578
|
+
"vst2_lane_s64" => ["ASIMD"],
|
2579
|
+
"vst2q_lane_s64" => ["ASIMD"],
|
2580
|
+
"vst2_lane_u64" => ["ASIMD"],
|
2581
|
+
"vst2q_lane_u64" => ["ASIMD"],
|
2582
|
+
"vst2_lane_p64" => ["ASIMD"],
|
2583
|
+
"vst2q_lane_p64" => ["ASIMD"],
|
2584
|
+
"vst2_lane_f64" => ["ASIMD"],
|
2585
|
+
"vst2q_lane_f64" => ["ASIMD"],
|
2586
|
+
"vst3_lane_s16" => ["NEON", "ASIMD"],
|
2587
|
+
"vst3q_lane_s16" => ["NEON", "ASIMD"],
|
2588
|
+
"vst3_lane_s32" => ["NEON", "ASIMD"],
|
2589
|
+
"vst3q_lane_s32" => ["NEON", "ASIMD"],
|
2590
|
+
"vst3_lane_u16" => ["NEON", "ASIMD"],
|
2591
|
+
"vst3q_lane_u16" => ["NEON", "ASIMD"],
|
2592
|
+
"vst3_lane_u32" => ["NEON", "ASIMD"],
|
2593
|
+
"vst3q_lane_u32" => ["NEON", "ASIMD"],
|
2594
|
+
"vst3_lane_f16" => ["NEON", "ASIMD"],
|
2595
|
+
"vst3q_lane_f16" => ["NEON", "ASIMD"],
|
2596
|
+
"vst3_lane_f32" => ["NEON", "ASIMD"],
|
2597
|
+
"vst3q_lane_f32" => ["NEON", "ASIMD"],
|
2598
|
+
"vst3_lane_p16" => ["NEON", "ASIMD"],
|
2599
|
+
"vst3q_lane_p16" => ["NEON", "ASIMD"],
|
2600
|
+
"vst3q_lane_s8" => ["NEON", "ASIMD"],
|
2601
|
+
"vst3q_lane_u8" => ["NEON", "ASIMD"],
|
2602
|
+
"vst3q_lane_p8" => ["NEON", "ASIMD"],
|
2603
|
+
"vst3_lane_s64" => ["ASIMD"],
|
2604
|
+
"vst3q_lane_s64" => ["ASIMD"],
|
2605
|
+
"vst3_lane_u64" => ["ASIMD"],
|
2606
|
+
"vst3q_lane_u64" => ["ASIMD"],
|
2607
|
+
"vst3_lane_p64" => ["ASIMD"],
|
2608
|
+
"vst3q_lane_p64" => ["ASIMD"],
|
2609
|
+
"vst3_lane_f64" => ["ASIMD"],
|
2610
|
+
"vst3q_lane_f64" => ["ASIMD"],
|
2611
|
+
"vst4_lane_s16" => ["NEON", "ASIMD"],
|
2612
|
+
"vst4q_lane_s16" => ["NEON", "ASIMD"],
|
2613
|
+
"vst4_lane_s32" => ["NEON", "ASIMD"],
|
2614
|
+
"vst4q_lane_s32" => ["NEON", "ASIMD"],
|
2615
|
+
"vst4_lane_u16" => ["NEON", "ASIMD"],
|
2616
|
+
"vst4q_lane_u16" => ["NEON", "ASIMD"],
|
2617
|
+
"vst4_lane_u32" => ["NEON", "ASIMD"],
|
2618
|
+
"vst4q_lane_u32" => ["NEON", "ASIMD"],
|
2619
|
+
"vst4_lane_f16" => ["NEON", "ASIMD"],
|
2620
|
+
"vst4q_lane_f16" => ["NEON", "ASIMD"],
|
2621
|
+
"vst4_lane_f32" => ["NEON", "ASIMD"],
|
2622
|
+
"vst4q_lane_f32" => ["NEON", "ASIMD"],
|
2623
|
+
"vst4_lane_p16" => ["NEON", "ASIMD"],
|
2624
|
+
"vst4q_lane_p16" => ["NEON", "ASIMD"],
|
2625
|
+
"vst4q_lane_s8" => ["ASIMD"],
|
2626
|
+
"vst4q_lane_u8" => ["ASIMD"],
|
2627
|
+
"vst4q_lane_p8" => ["ASIMD"],
|
2628
|
+
"vst4_lane_s64" => ["ASIMD"],
|
2629
|
+
"vst4q_lane_s64" => ["ASIMD"],
|
2630
|
+
"vst4_lane_u64" => ["ASIMD"],
|
2631
|
+
"vst4q_lane_u64" => ["ASIMD"],
|
2632
|
+
"vst4_lane_p64" => ["ASIMD"],
|
2633
|
+
"vst4q_lane_p64" => ["ASIMD"],
|
2634
|
+
"vst4_lane_f64" => ["ASIMD"],
|
2635
|
+
"vst4q_lane_f64" => ["ASIMD"],
|
2636
|
+
"vst1_s8_x2" => ["NEON", "ASIMD"],
|
2637
|
+
"vst1q_s8_x2" => ["NEON", "ASIMD"],
|
2638
|
+
"vst1_s16_x2" => ["NEON", "ASIMD"],
|
2639
|
+
"vst1q_s16_x2" => ["NEON", "ASIMD"],
|
2640
|
+
"vst1_s32_x2" => ["NEON", "ASIMD"],
|
2641
|
+
"vst1q_s32_x2" => ["NEON", "ASIMD"],
|
2642
|
+
"vst1_u8_x2" => ["NEON", "ASIMD"],
|
2643
|
+
"vst1q_u8_x2" => ["NEON", "ASIMD"],
|
2644
|
+
"vst1_u16_x2" => ["NEON", "ASIMD"],
|
2645
|
+
"vst1q_u16_x2" => ["NEON", "ASIMD"],
|
2646
|
+
"vst1_u32_x2" => ["NEON", "ASIMD"],
|
2647
|
+
"vst1q_u32_x2" => ["NEON", "ASIMD"],
|
2648
|
+
"vst1_f16_x2" => ["NEON", "ASIMD"],
|
2649
|
+
"vst1q_f16_x2" => ["NEON", "ASIMD"],
|
2650
|
+
"vst1_f32_x2" => ["NEON", "ASIMD"],
|
2651
|
+
"vst1q_f32_x2" => ["NEON", "ASIMD"],
|
2652
|
+
"vst1_p8_x2" => ["NEON", "ASIMD"],
|
2653
|
+
"vst1q_p8_x2" => ["NEON", "ASIMD"],
|
2654
|
+
"vst1_p16_x2" => ["NEON", "ASIMD"],
|
2655
|
+
"vst1q_p16_x2" => ["NEON", "ASIMD"],
|
2656
|
+
"vst1_s64_x2" => ["NEON", "ASIMD"],
|
2657
|
+
"vst1_u64_x2" => ["NEON", "ASIMD"],
|
2658
|
+
"vst1_p64_x2" => ["ASIMD"],
|
2659
|
+
"vst1q_s64_x2" => ["NEON", "ASIMD"],
|
2660
|
+
"vst1q_u64_x2" => ["NEON", "ASIMD"],
|
2661
|
+
"vst1q_p64_x2" => ["ASIMD"],
|
2662
|
+
"vst1_f64_x2" => ["ASIMD"],
|
2663
|
+
"vst1q_f64_x2" => ["ASIMD"],
|
2664
|
+
"vst1_s8_x3" => ["NEON", "ASIMD"],
|
2665
|
+
"vst1q_s8_x3" => ["NEON", "ASIMD"],
|
2666
|
+
"vst1_s16_x3" => ["NEON", "ASIMD"],
|
2667
|
+
"vst1q_s16_x3" => ["NEON", "ASIMD"],
|
2668
|
+
"vst1_s32_x3" => ["NEON", "ASIMD"],
|
2669
|
+
"vst1q_s32_x3" => ["NEON", "ASIMD"],
|
2670
|
+
"vst1_u8_x3" => ["NEON", "ASIMD"],
|
2671
|
+
"vst1q_u8_x3" => ["NEON", "ASIMD"],
|
2672
|
+
"vst1_u16_x3" => ["NEON", "ASIMD"],
|
2673
|
+
"vst1q_u16_x3" => ["NEON", "ASIMD"],
|
2674
|
+
"vst1_u32_x3" => ["NEON", "ASIMD"],
|
2675
|
+
"vst1q_u32_x3" => ["NEON", "ASIMD"],
|
2676
|
+
"vst1_f16_x3" => ["NEON", "ASIMD"],
|
2677
|
+
"vst1q_f16_x3" => ["NEON", "ASIMD"],
|
2678
|
+
"vst1_f32_x3" => ["NEON", "ASIMD"],
|
2679
|
+
"vst1q_f32_x3" => ["NEON", "ASIMD"],
|
2680
|
+
"vst1_p8_x3" => ["NEON", "ASIMD"],
|
2681
|
+
"vst1q_p8_x3" => ["NEON", "ASIMD"],
|
2682
|
+
"vst1_p16_x3" => ["NEON", "ASIMD"],
|
2683
|
+
"vst1q_p16_x3" => ["NEON", "ASIMD"],
|
2684
|
+
"vst1_s64_x3" => ["NEON", "ASIMD"],
|
2685
|
+
"vst1_u64_x3" => ["NEON", "ASIMD"],
|
2686
|
+
"vst1_p64_x3" => ["ASIMD"],
|
2687
|
+
"vst1q_s64_x3" => ["NEON", "ASIMD"],
|
2688
|
+
"vst1q_u64_x3" => ["NEON", "ASIMD"],
|
2689
|
+
"vst1q_p64_x3" => ["NEON", "ASIMD"],
|
2690
|
+
"vst1_f64_x3" => ["ASIMD"],
|
2691
|
+
"vst1q_f64_x3" => ["ASIMD"],
|
2692
|
+
"vst1_s8_x4" => ["NEON", "ASIMD"],
|
2693
|
+
"vst1q_s8_x4" => ["NEON", "ASIMD"],
|
2694
|
+
"vst1_s16_x4" => ["NEON", "ASIMD"],
|
2695
|
+
"vst1q_s16_x4" => ["NEON", "ASIMD"],
|
2696
|
+
"vst1_s32_x4" => ["NEON", "ASIMD"],
|
2697
|
+
"vst1q_s32_x4" => ["NEON", "ASIMD"],
|
2698
|
+
"vst1_u8_x4" => ["NEON", "ASIMD"],
|
2699
|
+
"vst1q_u8_x4" => ["NEON", "ASIMD"],
|
2700
|
+
"vst1_u16_x4" => ["NEON", "ASIMD"],
|
2701
|
+
"vst1q_u16_x4" => ["NEON", "ASIMD"],
|
2702
|
+
"vst1_u32_x4" => ["NEON", "ASIMD"],
|
2703
|
+
"vst1q_u32_x4" => ["NEON", "ASIMD"],
|
2704
|
+
"vst1_f16_x4" => ["NEON", "ASIMD"],
|
2705
|
+
"vst1q_f16_x4" => ["NEON", "ASIMD"],
|
2706
|
+
"vst1_f32_x4" => ["NEON", "ASIMD"],
|
2707
|
+
"vst1q_f32_x4" => ["NEON", "ASIMD"],
|
2708
|
+
"vst1_p8_x4" => ["NEON", "ASIMD"],
|
2709
|
+
"vst1q_p8_x4" => ["NEON", "ASIMD"],
|
2710
|
+
"vst1_p16_x4" => ["NEON", "ASIMD"],
|
2711
|
+
"vst1q_p16_x4" => ["NEON", "ASIMD"],
|
2712
|
+
"vst1_s64_x4" => ["NEON", "ASIMD"],
|
2713
|
+
"vst1_u64_x4" => ["NEON", "ASIMD"],
|
2714
|
+
"vst1_p64_x4" => ["ASIMD"],
|
2715
|
+
"vst1q_s64_x4" => ["NEON", "ASIMD"],
|
2716
|
+
"vst1q_u64_x4" => ["NEON", "ASIMD"],
|
2717
|
+
"vst1q_p64_x4" => ["ASIMD"],
|
2718
|
+
"vst1_f64_x4" => ["ASIMD"],
|
2719
|
+
"vst1q_f64_x4" => ["ASIMD"],
|
2720
|
+
"vld1_s8_x2" => ["NEON", "ASIMD"],
|
2721
|
+
"vld1q_s8_x2" => ["NEON", "ASIMD"],
|
2722
|
+
"vld1_s16_x2" => ["NEON", "ASIMD"],
|
2723
|
+
"vld1q_s16_x2" => ["NEON", "ASIMD"],
|
2724
|
+
"vld1_s32_x2" => ["NEON", "ASIMD"],
|
2725
|
+
"vld1q_s32_x2" => ["NEON", "ASIMD"],
|
2726
|
+
"vld1_u8_x2" => ["NEON", "ASIMD"],
|
2727
|
+
"vld1q_u8_x2" => ["NEON", "ASIMD"],
|
2728
|
+
"vld1_u16_x2" => ["NEON", "ASIMD"],
|
2729
|
+
"vld1q_u16_x2" => ["NEON", "ASIMD"],
|
2730
|
+
"vld1_u32_x2" => ["NEON", "ASIMD"],
|
2731
|
+
"vld1q_u32_x2" => ["NEON", "ASIMD"],
|
2732
|
+
"vld1_f16_x2" => ["NEON", "ASIMD"],
|
2733
|
+
"vld1q_f16_x2" => ["NEON", "ASIMD"],
|
2734
|
+
"vld1_f32_x2" => ["NEON", "ASIMD"],
|
2735
|
+
"vld1q_f32_x2" => ["NEON", "ASIMD"],
|
2736
|
+
"vld1_p8_x2" => ["NEON", "ASIMD"],
|
2737
|
+
"vld1q_p8_x2" => ["NEON", "ASIMD"],
|
2738
|
+
"vld1_p16_x2" => ["NEON", "ASIMD"],
|
2739
|
+
"vld1q_p16_x2" => ["NEON", "ASIMD"],
|
2740
|
+
"vld1_s64_x2" => ["NEON", "ASIMD"],
|
2741
|
+
"vld1_u64_x2" => ["NEON", "ASIMD"],
|
2742
|
+
"vld1_p64_x2" => ["ASIMD"],
|
2743
|
+
"vld1q_s64_x2" => ["NEON", "ASIMD"],
|
2744
|
+
"vld1q_u64_x2" => ["NEON", "ASIMD"],
|
2745
|
+
"vld1q_p64_x2" => ["ASIMD"],
|
2746
|
+
"vld1_f64_x2" => ["ASIMD"],
|
2747
|
+
"vld1q_f64_x2" => ["ASIMD"],
|
2748
|
+
"vld1_s8_x3" => ["NEON", "ASIMD"],
|
2749
|
+
"vld1q_s8_x3" => ["NEON", "ASIMD"],
|
2750
|
+
"vld1_s16_x3" => ["NEON", "ASIMD"],
|
2751
|
+
"vld1q_s16_x3" => ["NEON", "ASIMD"],
|
2752
|
+
"vld1_s32_x3" => ["NEON", "ASIMD"],
|
2753
|
+
"vld1q_s32_x3" => ["NEON", "ASIMD"],
|
2754
|
+
"vld1_u8_x3" => ["NEON", "ASIMD"],
|
2755
|
+
"vld1q_u8_x3" => ["NEON", "ASIMD"],
|
2756
|
+
"vld1_u16_x3" => ["NEON", "ASIMD"],
|
2757
|
+
"vld1q_u16_x3" => ["NEON", "ASIMD"],
|
2758
|
+
"vld1_u32_x3" => ["NEON", "ASIMD"],
|
2759
|
+
"vld1q_u32_x3" => ["NEON", "ASIMD"],
|
2760
|
+
"vld1_f16_x3" => ["NEON", "ASIMD"],
|
2761
|
+
"vld1q_f16_x3" => ["NEON", "ASIMD"],
|
2762
|
+
"vld1_f32_x3" => ["NEON", "ASIMD"],
|
2763
|
+
"vld1q_f32_x3" => ["NEON", "ASIMD"],
|
2764
|
+
"vld1_p8_x3" => ["NEON", "ASIMD"],
|
2765
|
+
"vld1q_p8_x3" => ["NEON", "ASIMD"],
|
2766
|
+
"vld1_p16_x3" => ["NEON", "ASIMD"],
|
2767
|
+
"vld1q_p16_x3" => ["NEON", "ASIMD"],
|
2768
|
+
"vld1_s64_x3" => ["NEON", "ASIMD"],
|
2769
|
+
"vld1_u64_x3" => ["NEON", "ASIMD"],
|
2770
|
+
"vld1_p64_x3" => ["ASIMD"],
|
2771
|
+
"vld1q_s64_x3" => ["NEON", "ASIMD"],
|
2772
|
+
"vld1q_u64_x3" => ["NEON", "ASIMD"],
|
2773
|
+
"vld1q_p64_x3" => ["ASIMD"],
|
2774
|
+
"vld1_f64_x3" => ["ASIMD"],
|
2775
|
+
"vld1q_f64_x3" => ["ASIMD"],
|
2776
|
+
"vld1_s8_x4" => ["NEON", "ASIMD"],
|
2777
|
+
"vld1q_s8_x4" => ["NEON", "ASIMD"],
|
2778
|
+
"vld1q_s16_x4" => ["NEON", "ASIMD"],
|
2779
|
+
"vld1_s32_x4" => ["NEON", "ASIMD"],
|
2780
|
+
"vld1q_s32_x4" => ["NEON", "ASIMD"],
|
2781
|
+
"vld1_s16_x4" => ["NEON", "ASIMD"],
|
2782
|
+
"vld1_u8_x4" => ["NEON", "ASIMD"],
|
2783
|
+
"vld1q_u8_x4" => ["NEON", "ASIMD"],
|
2784
|
+
"vld1_u16_x4" => ["NEON", "ASIMD"],
|
2785
|
+
"vld1q_u16_x4" => ["NEON", "ASIMD"],
|
2786
|
+
"vld1_u32_x4" => ["NEON", "ASIMD"],
|
2787
|
+
"vld1q_u32_x4" => ["NEON", "ASIMD"],
|
2788
|
+
"vld1_f16_x4" => ["NEON", "ASIMD"],
|
2789
|
+
"vld1q_f16_x4" => ["NEON", "ASIMD"],
|
2790
|
+
"vld1_f32_x4" => ["NEON", "ASIMD"],
|
2791
|
+
"vld1q_f32_x4" => ["NEON", "ASIMD"],
|
2792
|
+
"vld1_p8_x4" => ["NEON", "ASIMD"],
|
2793
|
+
"vld1q_p8_x4" => ["NEON", "ASIMD"],
|
2794
|
+
"vld1_p16_x4" => ["NEON", "ASIMD"],
|
2795
|
+
"vld1q_p16_x4" => ["NEON", "ASIMD"],
|
2796
|
+
"vld1_s64_x4" => ["NEON", "ASIMD"],
|
2797
|
+
"vld1_u64_x4" => ["NEON", "ASIMD"],
|
2798
|
+
"vld1_p64_x4" => ["ASIMD"],
|
2799
|
+
"vld1q_s64_x4" => ["NEON", "ASIMD"],
|
2800
|
+
"vld1q_u64_x4" => ["NEON", "ASIMD"],
|
2801
|
+
"vld1q_p64_x4" => ["ASIMD"],
|
2802
|
+
"vld1_f64_x4" => ["ASIMD"],
|
2803
|
+
"vld1q_f64_x4" => ["ASIMD"],
|
2804
|
+
"vpadd_s8" => ["NEON", "ASIMD"],
|
2805
|
+
"vpadd_s16" => ["NEON", "ASIMD"],
|
2806
|
+
"vpadd_s32" => ["NEON", "ASIMD"],
|
2807
|
+
"vpadd_u8" => ["NEON", "ASIMD"],
|
2808
|
+
"vpadd_u16" => ["NEON", "ASIMD"],
|
2809
|
+
"vpadd_u32" => ["NEON", "ASIMD"],
|
2810
|
+
"vpadd_f32" => ["NEON", "ASIMD"],
|
2811
|
+
"vpaddq_s8" => ["ASIMD"],
|
2812
|
+
"vpaddq_s16" => ["ASIMD"],
|
2813
|
+
"vpaddq_s32" => ["ASIMD"],
|
2814
|
+
"vpaddq_s64" => ["ASIMD"],
|
2815
|
+
"vpaddq_u8" => ["ASIMD"],
|
2816
|
+
"vpaddq_u16" => ["ASIMD"],
|
2817
|
+
"vpaddq_u32" => ["ASIMD"],
|
2818
|
+
"vpaddq_u64" => ["ASIMD"],
|
2819
|
+
"vpaddq_f32" => ["ASIMD"],
|
2820
|
+
"vpaddq_f64" => ["ASIMD"],
|
2821
|
+
"vpaddl_s8" => ["NEON", "ASIMD"],
|
2822
|
+
"vpaddlq_s8" => ["NEON", "ASIMD"],
|
2823
|
+
"vpaddl_s16" => ["NEON", "ASIMD"],
|
2824
|
+
"vpaddlq_s16" => ["NEON", "ASIMD"],
|
2825
|
+
"vpaddl_s32" => ["NEON", "ASIMD"],
|
2826
|
+
"vpaddlq_s32" => ["NEON", "ASIMD"],
|
2827
|
+
"vpaddl_u8" => ["NEON", "ASIMD"],
|
2828
|
+
"vpaddlq_u8" => ["NEON", "ASIMD"],
|
2829
|
+
"vpaddl_u16" => ["NEON", "ASIMD"],
|
2830
|
+
"vpaddlq_u16" => ["NEON", "ASIMD"],
|
2831
|
+
"vpaddl_u32" => ["NEON", "ASIMD"],
|
2832
|
+
"vpaddlq_u32" => ["NEON", "ASIMD"],
|
2833
|
+
"vpadal_s8" => ["NEON", "ASIMD"],
|
2834
|
+
"vpadalq_s8" => ["NEON", "ASIMD"],
|
2835
|
+
"vpadal_s16" => ["NEON", "ASIMD"],
|
2836
|
+
"vpadalq_s16" => ["NEON", "ASIMD"],
|
2837
|
+
"vpadal_s32" => ["NEON", "ASIMD"],
|
2838
|
+
"vpadalq_s32" => ["NEON", "ASIMD"],
|
2839
|
+
"vpadal_u8" => ["NEON", "ASIMD"],
|
2840
|
+
"vpadalq_u8" => ["NEON", "ASIMD"],
|
2841
|
+
"vpadal_u16" => ["NEON", "ASIMD"],
|
2842
|
+
"vpadalq_u16" => ["NEON", "ASIMD"],
|
2843
|
+
"vpadal_u32" => ["NEON", "ASIMD"],
|
2844
|
+
"vpadalq_u32" => ["NEON", "ASIMD"],
|
2845
|
+
"vpmax_s8" => ["NEON", "ASIMD"],
|
2846
|
+
"vpmax_s16" => ["NEON", "ASIMD"],
|
2847
|
+
"vpmax_s32" => ["NEON", "ASIMD"],
|
2848
|
+
"vpmax_u8" => ["NEON", "ASIMD"],
|
2849
|
+
"vpmax_u16" => ["NEON", "ASIMD"],
|
2850
|
+
"vpmax_u32" => ["NEON", "ASIMD"],
|
2851
|
+
"vpmax_f32" => ["NEON", "ASIMD"],
|
2852
|
+
"vpmaxq_s8" => ["ASIMD"],
|
2853
|
+
"vpmaxq_s16" => ["ASIMD"],
|
2854
|
+
"vpmaxq_s32" => ["ASIMD"],
|
2855
|
+
"vpmaxq_u8" => ["ASIMD"],
|
2856
|
+
"vpmaxq_u16" => ["ASIMD"],
|
2857
|
+
"vpmaxq_u32" => ["ASIMD"],
|
2858
|
+
"vpmaxq_f32" => ["ASIMD"],
|
2859
|
+
"vpmaxq_f64" => ["ASIMD"],
|
2860
|
+
"vpmin_s8" => ["NEON", "ASIMD"],
|
2861
|
+
"vpmin_s16" => ["NEON", "ASIMD"],
|
2862
|
+
"vpmin_s32" => ["NEON", "ASIMD"],
|
2863
|
+
"vpmin_u8" => ["NEON", "ASIMD"],
|
2864
|
+
"vpmin_u16" => ["NEON", "ASIMD"],
|
2865
|
+
"vpmin_u32" => ["NEON", "ASIMD"],
|
2866
|
+
"vpmin_f32" => ["NEON", "ASIMD"],
|
2867
|
+
"vpminq_s8" => ["ASIMD"],
|
2868
|
+
"vpminq_s16" => ["ASIMD"],
|
2869
|
+
"vpminq_s32" => ["ASIMD"],
|
2870
|
+
"vpminq_u8" => ["ASIMD"],
|
2871
|
+
"vpminq_u16" => ["ASIMD"],
|
2872
|
+
"vpminq_u32" => ["ASIMD"],
|
2873
|
+
"vpminq_f32" => ["ASIMD"],
|
2874
|
+
"vpminq_f64" => ["ASIMD"],
|
2875
|
+
"vpmaxnm_f32" => ["ASIMD"],
|
2876
|
+
"vpmaxnmq_f32" => ["ASIMD"],
|
2877
|
+
"vpmaxnmq_f64" => ["ASIMD"],
|
2878
|
+
"vpminnm_f32" => ["ASIMD"],
|
2879
|
+
"vpminnmq_f32" => ["ASIMD"],
|
2880
|
+
"vpminnmq_f64" => ["ASIMD"],
|
2881
|
+
"vpaddd_s64" => ["ASIMD"],
|
2882
|
+
"vpaddd_u64" => ["ASIMD"],
|
2883
|
+
"vpadds_f32" => ["ASIMD"],
|
2884
|
+
"vpaddd_f64" => ["ASIMD"],
|
2885
|
+
"vpmaxs_f32" => ["ASIMD"],
|
2886
|
+
"vpmaxqd_f64" => ["ASIMD"],
|
2887
|
+
"vpmins_f32" => ["ASIMD"],
|
2888
|
+
"vpminqd_f64" => ["ASIMD"],
|
2889
|
+
"vpmaxnms_f32" => ["ASIMD"],
|
2890
|
+
"vpmaxnmqd_f64" => ["ASIMD"],
|
2891
|
+
"vpminnms_f32" => ["ASIMD"],
|
2892
|
+
"vpminnmqd_f64" => ["ASIMD"],
|
2893
|
+
"vaddv_s8" => ["ASIMD"],
|
2894
|
+
"vaddvq_s8" => ["ASIMD"],
|
2895
|
+
"vaddv_s16" => ["ASIMD"],
|
2896
|
+
"vaddvq_s16" => ["ASIMD"],
|
2897
|
+
"vaddv_s32" => ["ASIMD"],
|
2898
|
+
"vaddvq_s32" => ["ASIMD"],
|
2899
|
+
"vaddvq_s64" => ["ASIMD"],
|
2900
|
+
"vaddv_u8" => ["ASIMD"],
|
2901
|
+
"vaddvq_u8" => ["ASIMD"],
|
2902
|
+
"vaddv_u16" => ["ASIMD"],
|
2903
|
+
"vaddvq_u16" => ["ASIMD"],
|
2904
|
+
"vaddv_u32" => ["ASIMD"],
|
2905
|
+
"vaddvq_u32" => ["ASIMD"],
|
2906
|
+
"vaddvq_u64" => ["ASIMD"],
|
2907
|
+
"vaddv_f32" => ["ASIMD"],
|
2908
|
+
"vaddvq_f32" => ["ASIMD"],
|
2909
|
+
"vaddvq_f64" => ["ASIMD"],
|
2910
|
+
"vaddlv_s8" => ["ASIMD"],
|
2911
|
+
"vaddlvq_s8" => ["ASIMD"],
|
2912
|
+
"vaddlv_s16" => ["ASIMD"],
|
2913
|
+
"vaddlvq_s16" => ["ASIMD"],
|
2914
|
+
"vaddlv_s32" => ["ASIMD"],
|
2915
|
+
"vaddlvq_s32" => ["ASIMD"],
|
2916
|
+
"vaddlv_u8" => ["ASIMD"],
|
2917
|
+
"vaddlvq_u8" => ["ASIMD"],
|
2918
|
+
"vaddlv_u16" => ["ASIMD"],
|
2919
|
+
"vaddlvq_u16" => ["ASIMD"],
|
2920
|
+
"vaddlv_u32" => ["ASIMD"],
|
2921
|
+
"vaddlvq_u32" => ["ASIMD"],
|
2922
|
+
"vmaxv_s8" => ["ASIMD"],
|
2923
|
+
"vmaxvq_s8" => ["ASIMD"],
|
2924
|
+
"vmaxv_s16" => ["ASIMD"],
|
2925
|
+
"vmaxvq_s16" => ["ASIMD"],
|
2926
|
+
"vmaxv_s32" => ["ASIMD"],
|
2927
|
+
"vmaxvq_s32" => ["ASIMD"],
|
2928
|
+
"vmaxv_u8" => ["ASIMD"],
|
2929
|
+
"vmaxvq_u8" => ["ASIMD"],
|
2930
|
+
"vmaxv_u16" => ["ASIMD"],
|
2931
|
+
"vmaxvq_u16" => ["ASIMD"],
|
2932
|
+
"vmaxv_u32" => ["ASIMD"],
|
2933
|
+
"vmaxvq_u32" => ["ASIMD"],
|
2934
|
+
"vmaxv_f32" => ["ASIMD"],
|
2935
|
+
"vmaxvq_f32" => ["ASIMD"],
|
2936
|
+
"vmaxvq_f64" => ["ASIMD"],
|
2937
|
+
"vminv_s8" => ["ASIMD"],
|
2938
|
+
"vminvq_s8" => ["ASIMD"],
|
2939
|
+
"vminv_s16" => ["ASIMD"],
|
2940
|
+
"vminvq_s16" => ["ASIMD"],
|
2941
|
+
"vminv_s32" => ["ASIMD"],
|
2942
|
+
"vminvq_s32" => ["ASIMD"],
|
2943
|
+
"vminv_u8" => ["ASIMD"],
|
2944
|
+
"vminvq_u8" => ["ASIMD"],
|
2945
|
+
"vminv_u16" => ["ASIMD"],
|
2946
|
+
"vminvq_u16" => ["ASIMD"],
|
2947
|
+
"vminv_u32" => ["ASIMD"],
|
2948
|
+
"vminvq_u32" => ["ASIMD"],
|
2949
|
+
"vminv_f32" => ["ASIMD"],
|
2950
|
+
"vminvq_f32" => ["ASIMD"],
|
2951
|
+
"vminvq_f64" => ["ASIMD"],
|
2952
|
+
"vmaxnmv_f32" => ["ASIMD"],
|
2953
|
+
"vmaxnmvq_f32" => ["ASIMD"],
|
2954
|
+
"vmaxnmvq_f64" => ["ASIMD"],
|
2955
|
+
"vminnmv_f32" => ["ASIMD"],
|
2956
|
+
"vminnmvq_f32" => ["ASIMD"],
|
2957
|
+
"vminnmvq_f64" => ["ASIMD"],
|
2958
|
+
"vext_s8" => ["NEON", "ASIMD"],
|
2959
|
+
"vextq_s8" => ["NEON", "ASIMD"],
|
2960
|
+
"vext_s16" => ["NEON", "ASIMD"],
|
2961
|
+
"vextq_s16" => ["NEON", "ASIMD"],
|
2962
|
+
"vext_s32" => ["NEON", "ASIMD"],
|
2963
|
+
"vextq_s32" => ["NEON", "ASIMD"],
|
2964
|
+
"vext_s64" => ["NEON", "ASIMD"],
|
2965
|
+
"vextq_s64" => ["NEON", "ASIMD"],
|
2966
|
+
"vext_u8" => ["NEON", "ASIMD"],
|
2967
|
+
"vextq_u8" => ["NEON", "ASIMD"],
|
2968
|
+
"vext_u16" => ["NEON", "ASIMD"],
|
2969
|
+
"vextq_u16" => ["NEON", "ASIMD"],
|
2970
|
+
"vext_u32" => ["NEON", "ASIMD"],
|
2971
|
+
"vextq_u32" => ["NEON", "ASIMD"],
|
2972
|
+
"vext_u64" => ["NEON", "ASIMD"],
|
2973
|
+
"vextq_u64" => ["NEON", "ASIMD"],
|
2974
|
+
"vext_p64" => ["ASIMD"],
|
2975
|
+
"vextq_p64" => ["ASIMD"],
|
2976
|
+
"vext_f32" => ["NEON", "ASIMD"],
|
2977
|
+
"vextq_f32" => ["NEON", "ASIMD"],
|
2978
|
+
"vext_f64" => ["ASIMD"],
|
2979
|
+
"vextq_f64" => ["ASIMD"],
|
2980
|
+
"vext_p8" => ["NEON", "ASIMD"],
|
2981
|
+
"vextq_p8" => ["NEON", "ASIMD"],
|
2982
|
+
"vext_p16" => ["NEON", "ASIMD"],
|
2983
|
+
"vextq_p16" => ["NEON", "ASIMD"],
|
2984
|
+
"vrev64_s8" => ["NEON", "ASIMD"],
|
2985
|
+
"vrev64q_s8" => ["NEON", "ASIMD"],
|
2986
|
+
"vrev64_s16" => ["NEON", "ASIMD"],
|
2987
|
+
"vrev64q_s16" => ["NEON", "ASIMD"],
|
2988
|
+
"vrev64_s32" => ["NEON", "ASIMD"],
|
2989
|
+
"vrev64q_s32" => ["NEON", "ASIMD"],
|
2990
|
+
"vrev64_u8" => ["NEON", "ASIMD"],
|
2991
|
+
"vrev64q_u8" => ["NEON", "ASIMD"],
|
2992
|
+
"vrev64_u16" => ["NEON", "ASIMD"],
|
2993
|
+
"vrev64q_u16" => ["NEON", "ASIMD"],
|
2994
|
+
"vrev64_u32" => ["NEON", "ASIMD"],
|
2995
|
+
"vrev64q_u32" => ["NEON", "ASIMD"],
|
2996
|
+
"vrev64_f32" => ["NEON", "ASIMD"],
|
2997
|
+
"vrev64q_f32" => ["NEON", "ASIMD"],
|
2998
|
+
"vrev64_p8" => ["NEON", "ASIMD"],
|
2999
|
+
"vrev64q_p8" => ["NEON", "ASIMD"],
|
3000
|
+
"vrev64_p16" => ["NEON", "ASIMD"],
|
3001
|
+
"vrev64q_p16" => ["NEON", "ASIMD"],
|
3002
|
+
"vrev32_s8" => ["NEON", "ASIMD"],
|
3003
|
+
"vrev32q_s8" => ["NEON", "ASIMD"],
|
3004
|
+
"vrev32_s16" => ["NEON", "ASIMD"],
|
3005
|
+
"vrev32q_s16" => ["NEON", "ASIMD"],
|
3006
|
+
"vrev32_u8" => ["NEON", "ASIMD"],
|
3007
|
+
"vrev32q_u8" => ["NEON", "ASIMD"],
|
3008
|
+
"vrev32_u16" => ["NEON", "ASIMD"],
|
3009
|
+
"vrev32q_u16" => ["NEON", "ASIMD"],
|
3010
|
+
"vrev32_p8" => ["NEON", "ASIMD"],
|
3011
|
+
"vrev32q_p8" => ["NEON", "ASIMD"],
|
3012
|
+
"vrev32_p16" => ["NEON", "ASIMD"],
|
3013
|
+
"vrev32q_p16" => ["NEON", "ASIMD"],
|
3014
|
+
"vrev16_s8" => ["NEON", "ASIMD"],
|
3015
|
+
"vrev16q_s8" => ["NEON", "ASIMD"],
|
3016
|
+
"vrev16_u8" => ["NEON", "ASIMD"],
|
3017
|
+
"vrev16q_u8" => ["NEON", "ASIMD"],
|
3018
|
+
"vrev16_p8" => ["NEON", "ASIMD"],
|
3019
|
+
"vrev16q_p8" => ["NEON", "ASIMD"],
|
3020
|
+
"vzip1_s8" => ["ASIMD"],
|
3021
|
+
"vzip1q_s8" => ["ASIMD"],
|
3022
|
+
"vzip1_s16" => ["ASIMD"],
|
3023
|
+
"vzip1q_s16" => ["ASIMD"],
|
3024
|
+
"vzip1_s32" => ["ASIMD"],
|
3025
|
+
"vzip1q_s32" => ["ASIMD"],
|
3026
|
+
"vzip1q_s64" => ["ASIMD"],
|
3027
|
+
"vzip1_u8" => ["ASIMD"],
|
3028
|
+
"vzip1q_u8" => ["ASIMD"],
|
3029
|
+
"vzip1_u16" => ["ASIMD"],
|
3030
|
+
"vzip1q_u16" => ["ASIMD"],
|
3031
|
+
"vzip1_u32" => ["ASIMD"],
|
3032
|
+
"vzip1q_u32" => ["ASIMD"],
|
3033
|
+
"vzip1q_u64" => ["ASIMD"],
|
3034
|
+
"vzip1q_p64" => ["ASIMD"],
|
3035
|
+
"vzip1_f32" => ["ASIMD"],
|
3036
|
+
"vzip1q_f32" => ["ASIMD"],
|
3037
|
+
"vzip1q_f64" => ["ASIMD"],
|
3038
|
+
"vzip1_p8" => ["ASIMD"],
|
3039
|
+
"vzip1q_p8" => ["ASIMD"],
|
3040
|
+
"vzip1_p16" => ["ASIMD"],
|
3041
|
+
"vzip1q_p16" => ["ASIMD"],
|
3042
|
+
"vzip2_s8" => ["ASIMD"],
|
3043
|
+
"vzip2q_s8" => ["ASIMD"],
|
3044
|
+
"vzip2_s16" => ["ASIMD"],
|
3045
|
+
"vzip2q_s16" => ["ASIMD"],
|
3046
|
+
"vzip2_s32" => ["ASIMD"],
|
3047
|
+
"vzip2q_s32" => ["ASIMD"],
|
3048
|
+
"vzip2q_s64" => ["ASIMD"],
|
3049
|
+
"vzip2_u8" => ["ASIMD"],
|
3050
|
+
"vzip2q_u8" => ["ASIMD"],
|
3051
|
+
"vzip2_u16" => ["ASIMD"],
|
3052
|
+
"vzip2q_u16" => ["ASIMD"],
|
3053
|
+
"vzip2_u32" => ["ASIMD"],
|
3054
|
+
"vzip2q_u32" => ["ASIMD"],
|
3055
|
+
"vzip2q_u64" => ["ASIMD"],
|
3056
|
+
"vzip2q_p64" => ["ASIMD"],
|
3057
|
+
"vzip2_f32" => ["ASIMD"],
|
3058
|
+
"vzip2q_f32" => ["ASIMD"],
|
3059
|
+
"vzip2q_f64" => ["ASIMD"],
|
3060
|
+
"vzip2_p8" => ["ASIMD"],
|
3061
|
+
"vzip2q_p8" => ["ASIMD"],
|
3062
|
+
"vzip2_p16" => ["ASIMD"],
|
3063
|
+
"vzip2q_p16" => ["ASIMD"],
|
3064
|
+
"vuzp1_s8" => ["ASIMD"],
|
3065
|
+
"vuzp1q_s8" => ["ASIMD"],
|
3066
|
+
"vuzp1_s16" => ["ASIMD"],
|
3067
|
+
"vuzp1q_s16" => ["ASIMD"],
|
3068
|
+
"vuzp1_s32" => ["ASIMD"],
|
3069
|
+
"vuzp1q_s32" => ["ASIMD"],
|
3070
|
+
"vuzp1q_s64" => ["ASIMD"],
|
3071
|
+
"vuzp1_u8" => ["ASIMD"],
|
3072
|
+
"vuzp1q_u8" => ["ASIMD"],
|
3073
|
+
"vuzp1_u16" => ["ASIMD"],
|
3074
|
+
"vuzp1q_u16" => ["ASIMD"],
|
3075
|
+
"vuzp1_u32" => ["ASIMD"],
|
3076
|
+
"vuzp1q_u32" => ["ASIMD"],
|
3077
|
+
"vuzp1q_u64" => ["ASIMD"],
|
3078
|
+
"vuzp1q_p64" => ["ASIMD"],
|
3079
|
+
"vuzp1_f32" => ["ASIMD"],
|
3080
|
+
"vuzp1q_f32" => ["ASIMD"],
|
3081
|
+
"vuzp1q_f64" => ["ASIMD"],
|
3082
|
+
"vuzp1_p8" => ["ASIMD"],
|
3083
|
+
"vuzp1q_p8" => ["ASIMD"],
|
3084
|
+
"vuzp1_p16" => ["ASIMD"],
|
3085
|
+
"vuzp1q_p16" => ["ASIMD"],
|
3086
|
+
"vuzp2_s8" => ["ASIMD"],
|
3087
|
+
"vuzp2q_s8" => ["ASIMD"],
|
3088
|
+
"vuzp2_s16" => ["ASIMD"],
|
3089
|
+
"vuzp2q_s16" => ["ASIMD"],
|
3090
|
+
"vuzp2_s32" => ["ASIMD"],
|
3091
|
+
"vuzp2q_s32" => ["ASIMD"],
|
3092
|
+
"vuzp2q_s64" => ["ASIMD"],
|
3093
|
+
"vuzp2_u8" => ["ASIMD"],
|
3094
|
+
"vuzp2q_u8" => ["ASIMD"],
|
3095
|
+
"vuzp2_u16" => ["ASIMD"],
|
3096
|
+
"vuzp2q_u16" => ["ASIMD"],
|
3097
|
+
"vuzp2_u32" => ["ASIMD"],
|
3098
|
+
"vuzp2q_u32" => ["ASIMD"],
|
3099
|
+
"vuzp2q_u64" => ["ASIMD"],
|
3100
|
+
"vuzp2q_p64" => ["ASIMD"],
|
3101
|
+
"vuzp2_f32" => ["ASIMD"],
|
3102
|
+
"vuzp2q_f32" => ["ASIMD"],
|
3103
|
+
"vuzp2q_f64" => ["ASIMD"],
|
3104
|
+
"vuzp2_p8" => ["ASIMD"],
|
3105
|
+
"vuzp2q_p8" => ["ASIMD"],
|
3106
|
+
"vuzp2_p16" => ["ASIMD"],
|
3107
|
+
"vuzp2q_p16" => ["ASIMD"],
|
3108
|
+
"vtrn1_s8" => ["ASIMD"],
|
3109
|
+
"vtrn1q_s8" => ["ASIMD"],
|
3110
|
+
"vtrn1_s16" => ["ASIMD"],
|
3111
|
+
"vtrn1q_s16" => ["ASIMD"],
|
3112
|
+
"vtrn1_s32" => ["ASIMD"],
|
3113
|
+
"vtrn1q_s32" => ["ASIMD"],
|
3114
|
+
"vtrn1q_s64" => ["ASIMD"],
|
3115
|
+
"vtrn1_u8" => ["ASIMD"],
|
3116
|
+
"vtrn1q_u8" => ["ASIMD"],
|
3117
|
+
"vtrn1_u16" => ["ASIMD"],
|
3118
|
+
"vtrn1q_u16" => ["ASIMD"],
|
3119
|
+
"vtrn1_u32" => ["ASIMD"],
|
3120
|
+
"vtrn1q_u32" => ["ASIMD"],
|
3121
|
+
"vtrn1q_u64" => ["ASIMD"],
|
3122
|
+
"vtrn1q_p64" => ["ASIMD"],
|
3123
|
+
"vtrn1_f32" => ["ASIMD"],
|
3124
|
+
"vtrn1q_f32" => ["ASIMD"],
|
3125
|
+
"vtrn1q_f64" => ["ASIMD"],
|
3126
|
+
"vtrn1_p8" => ["ASIMD"],
|
3127
|
+
"vtrn1q_p8" => ["ASIMD"],
|
3128
|
+
"vtrn1_p16" => ["ASIMD"],
|
3129
|
+
"vtrn1q_p16" => ["ASIMD"],
|
3130
|
+
"vtrn2_s8" => ["ASIMD"],
|
3131
|
+
"vtrn2q_s8" => ["ASIMD"],
|
3132
|
+
"vtrn2_s16" => ["ASIMD"],
|
3133
|
+
"vtrn2q_s16" => ["ASIMD"],
|
3134
|
+
"vtrn2_s32" => ["ASIMD"],
|
3135
|
+
"vtrn2q_s32" => ["ASIMD"],
|
3136
|
+
"vtrn2q_s64" => ["ASIMD"],
|
3137
|
+
"vtrn2_u8" => ["ASIMD"],
|
3138
|
+
"vtrn2q_u8" => ["ASIMD"],
|
3139
|
+
"vtrn2_u16" => ["ASIMD"],
|
3140
|
+
"vtrn2q_u16" => ["ASIMD"],
|
3141
|
+
"vtrn2_u32" => ["ASIMD"],
|
3142
|
+
"vtrn2q_u32" => ["ASIMD"],
|
3143
|
+
"vtrn2q_u64" => ["ASIMD"],
|
3144
|
+
"vtrn2q_p64" => ["ASIMD"],
|
3145
|
+
"vtrn2_f32" => ["ASIMD"],
|
3146
|
+
"vtrn2q_f32" => ["ASIMD"],
|
3147
|
+
"vtrn2q_f64" => ["ASIMD"],
|
3148
|
+
"vtrn2_p8" => ["ASIMD"],
|
3149
|
+
"vtrn2q_p8" => ["ASIMD"],
|
3150
|
+
"vtrn2_p16" => ["ASIMD"],
|
3151
|
+
"vtrn2q_p16" => ["ASIMD"],
|
3152
|
+
"vtbl1_s8" => ["NEON", "ASIMD"],
|
3153
|
+
"vtbl1_u8" => ["NEON", "ASIMD"],
|
3154
|
+
"vtbl1_p8" => ["NEON", "ASIMD"],
|
3155
|
+
"vtbx1_s8" => ["NEON", "ASIMD"],
|
3156
|
+
"vtbx1_u8" => ["NEON", "ASIMD"],
|
3157
|
+
"vtbx1_p8" => ["NEON", "ASIMD"],
|
3158
|
+
"vtbl2_s8" => ["NEON", "ASIMD"],
|
3159
|
+
"vtbl2_u8" => ["NEON", "ASIMD"],
|
3160
|
+
"vtbl2_p8" => ["NEON", "ASIMD"],
|
3161
|
+
"vtbl3_s8" => ["NEON", "ASIMD"],
|
3162
|
+
"vtbl3_u8" => ["NEON", "ASIMD"],
|
3163
|
+
"vtbl3_p8" => ["NEON", "ASIMD"],
|
3164
|
+
"vtbl4_s8" => ["NEON", "ASIMD"],
|
3165
|
+
"vtbl4_u8" => ["NEON", "ASIMD"],
|
3166
|
+
"vtbl4_p8" => ["NEON", "ASIMD"],
|
3167
|
+
"vtbx2_s8" => ["NEON", "ASIMD"],
|
3168
|
+
"vtbx2_u8" => ["NEON", "ASIMD"],
|
3169
|
+
"vtbx2_p8" => ["NEON", "ASIMD"],
|
3170
|
+
"vtbx3_s8" => ["NEON", "ASIMD"],
|
3171
|
+
"vtbx3_u8" => ["NEON", "ASIMD"],
|
3172
|
+
"vtbx3_p8" => ["NEON", "ASIMD"],
|
3173
|
+
"vtbx4_s8" => ["NEON", "ASIMD"],
|
3174
|
+
"vtbx4_u8" => ["NEON", "ASIMD"],
|
3175
|
+
"vtbx4_p8" => ["NEON", "ASIMD"],
|
3176
|
+
"vqtbl1_s8" => ["ASIMD"],
|
3177
|
+
"vqtbl1q_s8" => ["ASIMD"],
|
3178
|
+
"vqtbl1_u8" => ["ASIMD"],
|
3179
|
+
"vqtbl1q_u8" => ["ASIMD"],
|
3180
|
+
"vqtbl1_p8" => ["ASIMD"],
|
3181
|
+
"vqtbl1q_p8" => ["ASIMD"],
|
3182
|
+
"vqtbx1_s8" => ["ASIMD"],
|
3183
|
+
"vqtbx1q_s8" => ["ASIMD"],
|
3184
|
+
"vqtbx1_u8" => ["ASIMD"],
|
3185
|
+
"vqtbx1q_u8" => ["ASIMD"],
|
3186
|
+
"vqtbx1_p8" => ["ASIMD"],
|
3187
|
+
"vqtbx1q_p8" => ["ASIMD"],
|
3188
|
+
"vqtbl2_s8" => ["ASIMD"],
|
3189
|
+
"vqtbl2q_s8" => ["ASIMD"],
|
3190
|
+
"vqtbl2_u8" => ["ASIMD"],
|
3191
|
+
"vqtbl2q_u8" => ["ASIMD"],
|
3192
|
+
"vqtbl2_p8" => ["ASIMD"],
|
3193
|
+
"vqtbl2q_p8" => ["ASIMD"],
|
3194
|
+
"vqtbl3_s8" => ["ASIMD"],
|
3195
|
+
"vqtbl3q_s8" => ["ASIMD"],
|
3196
|
+
"vqtbl3_u8" => ["ASIMD"],
|
3197
|
+
"vqtbl3q_u8" => ["ASIMD"],
|
3198
|
+
"vqtbl3_p8" => ["ASIMD"],
|
3199
|
+
"vqtbl3q_p8" => ["ASIMD"],
|
3200
|
+
"vqtbl4_s8" => ["ASIMD"],
|
3201
|
+
"vqtbl4q_s8" => ["ASIMD"],
|
3202
|
+
"vqtbl4_u8" => ["ASIMD"],
|
3203
|
+
"vqtbl4q_u8" => ["ASIMD"],
|
3204
|
+
"vqtbl4_p8" => ["ASIMD"],
|
3205
|
+
"vqtbl4q_p8" => ["ASIMD"],
|
3206
|
+
"vqtbx2_s8" => ["ASIMD"],
|
3207
|
+
"vqtbx2q_s8" => ["ASIMD"],
|
3208
|
+
"vqtbx2_u8" => ["ASIMD"],
|
3209
|
+
"vqtbx2q_u8" => ["ASIMD"],
|
3210
|
+
"vqtbx2_p8" => ["ASIMD"],
|
3211
|
+
"vqtbx2q_p8" => ["ASIMD"],
|
3212
|
+
"vqtbx3_s8" => ["ASIMD"],
|
3213
|
+
"vqtbx3q_s8" => ["ASIMD"],
|
3214
|
+
"vqtbx3_u8" => ["ASIMD"],
|
3215
|
+
"vqtbx3q_u8" => ["ASIMD"],
|
3216
|
+
"vqtbx3_p8" => ["ASIMD"],
|
3217
|
+
"vqtbx3q_p8" => ["ASIMD"],
|
3218
|
+
"vqtbx4_s8" => ["ASIMD"],
|
3219
|
+
"vqtbx4q_s8" => ["ASIMD"],
|
3220
|
+
"vqtbx4_u8" => ["ASIMD"],
|
3221
|
+
"vqtbx4q_u8" => ["ASIMD"],
|
3222
|
+
"vqtbx4_p8" => ["ASIMD"],
|
3223
|
+
"vqtbx4q_p8" => ["ASIMD"],
|
3224
|
+
"vget_lane_u8" => ["NEON", "ASIMD"],
|
3225
|
+
"vget_lane_u16" => ["NEON", "ASIMD"],
|
3226
|
+
"vget_lane_u32" => ["NEON", "ASIMD"],
|
3227
|
+
"vget_lane_u64" => ["NEON", "ASIMD"],
|
3228
|
+
"vget_lane_p64" => ["ASIMD"],
|
3229
|
+
"vget_lane_s8" => ["NEON", "ASIMD"],
|
3230
|
+
"vget_lane_s16" => ["NEON", "ASIMD"],
|
3231
|
+
"vget_lane_s32" => ["NEON", "ASIMD"],
|
3232
|
+
"vget_lane_s64" => ["NEON", "ASIMD"],
|
3233
|
+
"vget_lane_p8" => ["NEON", "ASIMD"],
|
3234
|
+
"vget_lane_p16" => ["NEON", "ASIMD"],
|
3235
|
+
"vget_lane_f32" => ["NEON", "ASIMD"],
|
3236
|
+
"vget_lane_f64" => ["ASIMD"],
|
3237
|
+
"vgetq_lane_u8" => ["NEON", "ASIMD"],
|
3238
|
+
"vgetq_lane_u16" => ["NEON", "ASIMD"],
|
3239
|
+
"vgetq_lane_u32" => ["NEON", "ASIMD"],
|
3240
|
+
"vgetq_lane_u64" => ["NEON", "ASIMD"],
|
3241
|
+
"vgetq_lane_p64" => ["ASIMD"],
|
3242
|
+
"vgetq_lane_s8" => ["NEON", "ASIMD"],
|
3243
|
+
"vgetq_lane_s16" => ["NEON", "ASIMD"],
|
3244
|
+
"vgetq_lane_s32" => ["NEON", "ASIMD"],
|
3245
|
+
"vgetq_lane_s64" => ["NEON", "ASIMD"],
|
3246
|
+
"vgetq_lane_p8" => ["NEON", "ASIMD"],
|
3247
|
+
"vgetq_lane_p16" => ["NEON", "ASIMD"],
|
3248
|
+
"vget_lane_f16" => ["NEON", "ASIMD"],
|
3249
|
+
"vgetq_lane_f16" => ["NEON", "ASIMD"],
|
3250
|
+
"vgetq_lane_f32" => ["NEON", "ASIMD"],
|
3251
|
+
"vgetq_lane_f64" => ["ASIMD"],
|
3252
|
+
"vset_lane_u8" => ["NEON", "ASIMD"],
|
3253
|
+
"vset_lane_u16" => ["NEON", "ASIMD"],
|
3254
|
+
"vset_lane_u32" => ["NEON", "ASIMD"],
|
3255
|
+
"vset_lane_u64" => ["NEON", "ASIMD"],
|
3256
|
+
"vset_lane_p64" => ["ASIMD"],
|
3257
|
+
"vset_lane_s8" => ["NEON", "ASIMD"],
|
3258
|
+
"vset_lane_s16" => ["NEON", "ASIMD"],
|
3259
|
+
"vset_lane_s32" => ["NEON", "ASIMD"],
|
3260
|
+
"vset_lane_s64" => ["NEON", "ASIMD"],
|
3261
|
+
"vset_lane_p8" => ["NEON", "ASIMD"],
|
3262
|
+
"vset_lane_p16" => ["NEON", "ASIMD"],
|
3263
|
+
"vset_lane_f16" => ["NEON", "ASIMD"],
|
3264
|
+
"vsetq_lane_f16" => ["NEON", "ASIMD"],
|
3265
|
+
"vset_lane_f32" => ["NEON", "ASIMD"],
|
3266
|
+
"vset_lane_f64" => ["ASIMD"],
|
3267
|
+
"vsetq_lane_u8" => ["NEON", "ASIMD"],
|
3268
|
+
"vsetq_lane_u16" => ["NEON", "ASIMD"],
|
3269
|
+
"vsetq_lane_u32" => ["NEON", "ASIMD"],
|
3270
|
+
"vsetq_lane_u64" => ["NEON", "ASIMD"],
|
3271
|
+
"vsetq_lane_p64" => ["ASIMD"],
|
3272
|
+
"vsetq_lane_s8" => ["NEON", "ASIMD"],
|
3273
|
+
"vsetq_lane_s16" => ["NEON", "ASIMD"],
|
3274
|
+
"vsetq_lane_s32" => ["NEON", "ASIMD"],
|
3275
|
+
"vsetq_lane_s64" => ["NEON", "ASIMD"],
|
3276
|
+
"vsetq_lane_p8" => ["NEON", "ASIMD"],
|
3277
|
+
"vsetq_lane_p16" => ["NEON", "ASIMD"],
|
3278
|
+
"vsetq_lane_f32" => ["NEON", "ASIMD"],
|
3279
|
+
"vsetq_lane_f64" => ["ASIMD"],
|
3280
|
+
"vrecpxs_f32" => ["ASIMD"],
|
3281
|
+
"vrecpxd_f64" => ["ASIMD"],
|
3282
|
+
"vfma_n_f32" => ["NEON", "ASIMD"],
|
3283
|
+
"vfmaq_n_f32" => ["NEON", "ASIMD"],
|
3284
|
+
"vfms_n_f32" => ["ASIMD"],
|
3285
|
+
"vfmsq_n_f32" => ["ASIMD"],
|
3286
|
+
"vfma_n_f64" => ["ASIMD"],
|
3287
|
+
"vfmaq_n_f64" => ["ASIMD"],
|
3288
|
+
"vfms_n_f64" => ["ASIMD"],
|
3289
|
+
"vfmsq_n_f64" => ["ASIMD"],
|
3290
|
+
"vtrn_s8" => ["NEON", "ASIMD"],
|
3291
|
+
"vtrn_s16" => ["NEON", "ASIMD"],
|
3292
|
+
"vtrn_u8" => ["NEON", "ASIMD"],
|
3293
|
+
"vtrn_u16" => ["NEON", "ASIMD"],
|
3294
|
+
"vtrn_p8" => ["NEON", "ASIMD"],
|
3295
|
+
"vtrn_p16" => ["NEON", "ASIMD"],
|
3296
|
+
"vtrn_s32" => ["NEON", "ASIMD"],
|
3297
|
+
"vtrn_f32" => ["NEON", "ASIMD"],
|
3298
|
+
"vtrn_u32" => ["NEON", "ASIMD"],
|
3299
|
+
"vtrnq_s8" => ["NEON", "ASIMD"],
|
3300
|
+
"vtrnq_s16" => ["NEON", "ASIMD"],
|
3301
|
+
"vtrnq_s32" => ["NEON", "ASIMD"],
|
3302
|
+
"vtrnq_f32" => ["NEON", "ASIMD"],
|
3303
|
+
"vtrnq_u8" => ["NEON", "ASIMD"],
|
3304
|
+
"vtrnq_u16" => ["NEON", "ASIMD"],
|
3305
|
+
"vtrnq_u32" => ["NEON", "ASIMD"],
|
3306
|
+
"vtrnq_p8" => ["NEON", "ASIMD"],
|
3307
|
+
"vtrnq_p16" => ["NEON", "ASIMD"],
|
3308
|
+
"vzip_s8" => ["NEON", "ASIMD"],
|
3309
|
+
"vzip_s16" => ["NEON", "ASIMD"],
|
3310
|
+
"vzip_u8" => ["NEON", "ASIMD"],
|
3311
|
+
"vzip_u16" => ["NEON", "ASIMD"],
|
3312
|
+
"vzip_p8" => ["NEON", "ASIMD"],
|
3313
|
+
"vzip_p16" => ["NEON", "ASIMD"],
|
3314
|
+
"vzip_s32" => ["NEON", "ASIMD"],
|
3315
|
+
"vzip_f32" => ["NEON", "ASIMD"],
|
3316
|
+
"vzip_u32" => ["NEON", "ASIMD"],
|
3317
|
+
"vzipq_s8" => ["NEON", "ASIMD"],
|
3318
|
+
"vzipq_s16" => ["NEON", "ASIMD"],
|
3319
|
+
"vzipq_s32" => ["NEON", "ASIMD"],
|
3320
|
+
"vzipq_f32" => ["NEON", "ASIMD"],
|
3321
|
+
"vzipq_u8" => ["NEON", "ASIMD"],
|
3322
|
+
"vzipq_u16" => ["NEON", "ASIMD"],
|
3323
|
+
"vzipq_u32" => ["NEON", "ASIMD"],
|
3324
|
+
"vzipq_p8" => ["NEON", "ASIMD"],
|
3325
|
+
"vzipq_p16" => ["NEON", "ASIMD"],
|
3326
|
+
"vuzp_s8" => ["NEON", "ASIMD"],
|
3327
|
+
"vuzp_s16" => ["NEON", "ASIMD"],
|
3328
|
+
"vuzp_s32" => ["NEON", "ASIMD"],
|
3329
|
+
"vuzp_f32" => ["NEON", "ASIMD"],
|
3330
|
+
"vuzp_u8" => ["NEON", "ASIMD"],
|
3331
|
+
"vuzp_u16" => ["NEON", "ASIMD"],
|
3332
|
+
"vuzp_u32" => ["NEON", "ASIMD"],
|
3333
|
+
"vuzp_p8" => ["NEON", "ASIMD"],
|
3334
|
+
"vuzp_p16" => ["NEON", "ASIMD"],
|
3335
|
+
"vuzpq_s8" => ["NEON", "ASIMD"],
|
3336
|
+
"vuzpq_s16" => ["NEON", "ASIMD"],
|
3337
|
+
"vuzpq_s32" => ["NEON", "ASIMD"],
|
3338
|
+
"vuzpq_f32" => ["NEON", "ASIMD"],
|
3339
|
+
"vuzpq_u8" => ["NEON", "ASIMD"],
|
3340
|
+
"vuzpq_u16" => ["NEON", "ASIMD"],
|
3341
|
+
"vuzpq_u32" => ["NEON", "ASIMD"],
|
3342
|
+
"vuzpq_p8" => ["NEON", "ASIMD"],
|
3343
|
+
"vuzpq_p16" => ["NEON", "ASIMD"],
|
3344
|
+
"vreinterpret_s16_s8" => ["NEON", "ASIMD"],
|
3345
|
+
"vreinterpret_s32_s8" => ["NEON", "ASIMD"],
|
3346
|
+
"vreinterpret_f32_s8" => ["NEON", "ASIMD"],
|
3347
|
+
"vreinterpret_u8_s8" => ["NEON", "ASIMD"],
|
3348
|
+
"vreinterpret_u16_s8" => ["NEON", "ASIMD"],
|
3349
|
+
"vreinterpret_u32_s8" => ["NEON", "ASIMD"],
|
3350
|
+
"vreinterpret_p8_s8" => ["NEON", "ASIMD"],
|
3351
|
+
"vreinterpret_p16_s8" => ["NEON", "ASIMD"],
|
3352
|
+
"vreinterpret_u64_s8" => ["NEON", "ASIMD"],
|
3353
|
+
"vreinterpret_s64_s8" => ["NEON", "ASIMD"],
|
3354
|
+
"vreinterpret_f64_s8" => ["ASIMD"],
|
3355
|
+
"vreinterpret_p64_s8" => ["ASIMD"],
|
3356
|
+
"vreinterpret_f16_s8" => ["NEON", "ASIMD"],
|
3357
|
+
"vreinterpret_s8_s16" => ["NEON", "ASIMD"],
|
3358
|
+
"vreinterpret_s32_s16" => ["NEON", "ASIMD"],
|
3359
|
+
"vreinterpret_f32_s16" => ["NEON", "ASIMD"],
|
3360
|
+
"vreinterpret_u8_s16" => ["NEON", "ASIMD"],
|
3361
|
+
"vreinterpret_u16_s16" => ["NEON", "ASIMD"],
|
3362
|
+
"vreinterpret_u32_s16" => ["NEON", "ASIMD"],
|
3363
|
+
"vreinterpret_p8_s16" => ["NEON", "ASIMD"],
|
3364
|
+
"vreinterpret_p16_s16" => ["NEON", "ASIMD"],
|
3365
|
+
"vreinterpret_u64_s16" => ["NEON", "ASIMD"],
|
3366
|
+
"vreinterpret_s64_s16" => ["NEON", "ASIMD"],
|
3367
|
+
"vreinterpret_f64_s16" => ["ASIMD"],
|
3368
|
+
"vreinterpret_p64_s16" => ["ASIMD"],
|
3369
|
+
"vreinterpret_f16_s16" => ["NEON", "ASIMD"],
|
3370
|
+
"vreinterpret_s8_s32" => ["NEON", "ASIMD"],
|
3371
|
+
"vreinterpret_s16_s32" => ["NEON", "ASIMD"],
|
3372
|
+
"vreinterpret_f32_s32" => ["NEON", "ASIMD"],
|
3373
|
+
"vreinterpret_u8_s32" => ["NEON", "ASIMD"],
|
3374
|
+
"vreinterpret_u16_s32" => ["NEON", "ASIMD"],
|
3375
|
+
"vreinterpret_u32_s32" => ["NEON", "ASIMD"],
|
3376
|
+
"vreinterpret_p8_s32" => ["NEON", "ASIMD"],
|
3377
|
+
"vreinterpret_p16_s32" => ["NEON", "ASIMD"],
|
3378
|
+
"vreinterpret_u64_s32" => ["NEON", "ASIMD"],
|
3379
|
+
"vreinterpret_s64_s32" => ["NEON", "ASIMD"],
|
3380
|
+
"vreinterpret_f64_s32" => ["ASIMD"],
|
3381
|
+
"vreinterpret_p64_s32" => ["ASIMD"],
|
3382
|
+
"vreinterpret_f16_s32" => ["NEON", "ASIMD"],
|
3383
|
+
"vreinterpret_s8_f32" => ["NEON", "ASIMD"],
|
3384
|
+
"vreinterpret_s16_f32" => ["NEON", "ASIMD"],
|
3385
|
+
"vreinterpret_s32_f32" => ["NEON", "ASIMD"],
|
3386
|
+
"vreinterpret_u8_f32" => ["NEON", "ASIMD"],
|
3387
|
+
"vreinterpret_u16_f32" => ["NEON", "ASIMD"],
|
3388
|
+
"vreinterpret_u32_f32" => ["NEON", "ASIMD"],
|
3389
|
+
"vreinterpret_p8_f32" => ["NEON", "ASIMD"],
|
3390
|
+
"vreinterpret_p16_f32" => ["NEON", "ASIMD"],
|
3391
|
+
"vreinterpret_u64_f32" => ["NEON", "ASIMD"],
|
3392
|
+
"vreinterpret_s64_f32" => ["NEON", "ASIMD"],
|
3393
|
+
"vreinterpret_f64_f32" => ["ASIMD"],
|
3394
|
+
"vreinterpret_p64_f32" => ["ASIMD"],
|
3395
|
+
"vreinterpret_p64_f64" => ["ASIMD"],
|
3396
|
+
"vreinterpret_f16_f32" => ["NEON", "ASIMD"],
|
3397
|
+
"vreinterpret_s8_u8" => ["NEON", "ASIMD"],
|
3398
|
+
"vreinterpret_s16_u8" => ["NEON", "ASIMD"],
|
3399
|
+
"vreinterpret_s32_u8" => ["NEON", "ASIMD"],
|
3400
|
+
"vreinterpret_f32_u8" => ["NEON", "ASIMD"],
|
3401
|
+
"vreinterpret_u16_u8" => ["NEON", "ASIMD"],
|
3402
|
+
"vreinterpret_u32_u8" => ["NEON", "ASIMD"],
|
3403
|
+
"vreinterpret_p8_u8" => ["NEON", "ASIMD"],
|
3404
|
+
"vreinterpret_p16_u8" => ["NEON", "ASIMD"],
|
3405
|
+
"vreinterpret_u64_u8" => ["NEON", "ASIMD"],
|
3406
|
+
"vreinterpret_s64_u8" => ["NEON", "ASIMD"],
|
3407
|
+
"vreinterpret_f64_u8" => ["ASIMD"],
|
3408
|
+
"vreinterpret_p64_u8" => ["ASIMD"],
|
3409
|
+
"vreinterpret_f16_u8" => ["NEON", "ASIMD"],
|
3410
|
+
"vreinterpret_s8_u16" => ["NEON", "ASIMD"],
|
3411
|
+
"vreinterpret_s16_u16" => ["NEON", "ASIMD"],
|
3412
|
+
"vreinterpret_s32_u16" => ["NEON", "ASIMD"],
|
3413
|
+
"vreinterpret_f32_u16" => ["NEON", "ASIMD"],
|
3414
|
+
"vreinterpret_u8_u16" => ["NEON", "ASIMD"],
|
3415
|
+
"vreinterpret_u32_u16" => ["NEON", "ASIMD"],
|
3416
|
+
"vreinterpret_p8_u16" => ["NEON", "ASIMD"],
|
3417
|
+
"vreinterpret_p16_u16" => ["NEON", "ASIMD"],
|
3418
|
+
"vreinterpret_u64_u16" => ["NEON", "ASIMD"],
|
3419
|
+
"vreinterpret_s64_u16" => ["NEON", "ASIMD"],
|
3420
|
+
"vreinterpret_f64_u16" => ["ASIMD"],
|
3421
|
+
"vreinterpret_p64_u16" => ["ASIMD"],
|
3422
|
+
"vreinterpret_f16_u16" => ["NEON", "ASIMD"],
|
3423
|
+
"vreinterpret_s8_u32" => ["NEON", "ASIMD"],
|
3424
|
+
"vreinterpret_s16_u32" => ["NEON", "ASIMD"],
|
3425
|
+
"vreinterpret_s32_u32" => ["NEON", "ASIMD"],
|
3426
|
+
"vreinterpret_f32_u32" => ["NEON", "ASIMD"],
|
3427
|
+
"vreinterpret_u8_u32" => ["NEON", "ASIMD"],
|
3428
|
+
"vreinterpret_u16_u32" => ["NEON", "ASIMD"],
|
3429
|
+
"vreinterpret_p8_u32" => ["NEON", "ASIMD"],
|
3430
|
+
"vreinterpret_p16_u32" => ["NEON", "ASIMD"],
|
3431
|
+
"vreinterpret_u64_u32" => ["NEON", "ASIMD"],
|
3432
|
+
"vreinterpret_s64_u32" => ["NEON", "ASIMD"],
|
3433
|
+
"vreinterpret_f64_u32" => ["ASIMD"],
|
3434
|
+
"vreinterpret_p64_u32" => ["ASIMD"],
|
3435
|
+
"vreinterpret_f16_u32" => ["NEON", "ASIMD"],
|
3436
|
+
"vreinterpret_s8_p8" => ["NEON", "ASIMD"],
|
3437
|
+
"vreinterpret_s16_p8" => ["NEON", "ASIMD"],
|
3438
|
+
"vreinterpret_s32_p8" => ["NEON", "ASIMD"],
|
3439
|
+
"vreinterpret_f32_p8" => ["NEON", "ASIMD"],
|
3440
|
+
"vreinterpret_u8_p8" => ["NEON", "ASIMD"],
|
3441
|
+
"vreinterpret_u16_p8" => ["NEON", "ASIMD"],
|
3442
|
+
"vreinterpret_u32_p8" => ["NEON", "ASIMD"],
|
3443
|
+
"vreinterpret_p16_p8" => ["NEON", "ASIMD"],
|
3444
|
+
"vreinterpret_u64_p8" => ["NEON", "ASIMD"],
|
3445
|
+
"vreinterpret_s64_p8" => ["NEON", "ASIMD"],
|
3446
|
+
"vreinterpret_f64_p8" => ["ASIMD"],
|
3447
|
+
"vreinterpret_p64_p8" => ["ASIMD"],
|
3448
|
+
"vreinterpret_f16_p8" => ["NEON", "ASIMD"],
|
3449
|
+
"vreinterpret_s8_p16" => ["NEON", "ASIMD"],
|
3450
|
+
"vreinterpret_s16_p16" => ["NEON", "ASIMD"],
|
3451
|
+
"vreinterpret_s32_p16" => ["NEON", "ASIMD"],
|
3452
|
+
"vreinterpret_f32_p16" => ["NEON", "ASIMD"],
|
3453
|
+
"vreinterpret_u8_p16" => ["NEON", "ASIMD"],
|
3454
|
+
"vreinterpret_u16_p16" => ["NEON", "ASIMD"],
|
3455
|
+
"vreinterpret_u32_p16" => ["NEON", "ASIMD"],
|
3456
|
+
"vreinterpret_p8_p16" => ["NEON", "ASIMD"],
|
3457
|
+
"vreinterpret_u64_p16" => ["NEON", "ASIMD"],
|
3458
|
+
"vreinterpret_s64_p16" => ["NEON", "ASIMD"],
|
3459
|
+
"vreinterpret_f64_p16" => ["ASIMD"],
|
3460
|
+
"vreinterpret_p64_p16" => ["ASIMD"],
|
3461
|
+
"vreinterpret_f16_p16" => ["NEON", "ASIMD"],
|
3462
|
+
"vreinterpret_s8_u64" => ["NEON", "ASIMD"],
|
3463
|
+
"vreinterpret_s16_u64" => ["NEON", "ASIMD"],
|
3464
|
+
"vreinterpret_s32_u64" => ["NEON", "ASIMD"],
|
3465
|
+
"vreinterpret_f32_u64" => ["NEON", "ASIMD"],
|
3466
|
+
"vreinterpret_u8_u64" => ["NEON", "ASIMD"],
|
3467
|
+
"vreinterpret_u16_u64" => ["NEON", "ASIMD"],
|
3468
|
+
"vreinterpret_u32_u64" => ["NEON", "ASIMD"],
|
3469
|
+
"vreinterpret_p8_u64" => ["NEON", "ASIMD"],
|
3470
|
+
"vreinterpret_p16_u64" => ["NEON", "ASIMD"],
|
3471
|
+
"vreinterpret_s64_u64" => ["NEON", "ASIMD"],
|
3472
|
+
"vreinterpret_f64_u64" => ["ASIMD"],
|
3473
|
+
"vreinterpret_p64_u64" => ["ASIMD"],
|
3474
|
+
"vreinterpret_f16_u64" => ["NEON", "ASIMD"],
|
3475
|
+
"vreinterpret_s8_s64" => ["NEON", "ASIMD"],
|
3476
|
+
"vreinterpret_s16_s64" => ["NEON", "ASIMD"],
|
3477
|
+
"vreinterpret_s32_s64" => ["NEON", "ASIMD"],
|
3478
|
+
"vreinterpret_f32_s64" => ["NEON", "ASIMD"],
|
3479
|
+
"vreinterpret_u8_s64" => ["NEON", "ASIMD"],
|
3480
|
+
"vreinterpret_u16_s64" => ["NEON", "ASIMD"],
|
3481
|
+
"vreinterpret_u32_s64" => ["NEON", "ASIMD"],
|
3482
|
+
"vreinterpret_p8_s64" => ["NEON", "ASIMD"],
|
3483
|
+
"vreinterpret_p16_s64" => ["NEON", "ASIMD"],
|
3484
|
+
"vreinterpret_u64_s64" => ["NEON", "ASIMD"],
|
3485
|
+
"vreinterpret_f64_s64" => ["ASIMD"],
|
3486
|
+
"vreinterpret_u64_p64" => ["ASIMD"],
|
3487
|
+
"vreinterpret_f16_s64" => ["NEON", "ASIMD"],
|
3488
|
+
"vreinterpret_s8_f16" => ["NEON", "ASIMD"],
|
3489
|
+
"vreinterpret_s16_f16" => ["NEON", "ASIMD"],
|
3490
|
+
"vreinterpret_s32_f16" => ["NEON", "ASIMD"],
|
3491
|
+
"vreinterpret_f32_f16" => ["NEON", "ASIMD"],
|
3492
|
+
"vreinterpret_u8_f16" => ["NEON", "ASIMD"],
|
3493
|
+
"vreinterpret_u16_f16" => ["NEON", "ASIMD"],
|
3494
|
+
"vreinterpret_u32_f16" => ["NEON", "ASIMD"],
|
3495
|
+
"vreinterpret_p8_f16" => ["NEON", "ASIMD"],
|
3496
|
+
"vreinterpret_p16_f16" => ["NEON", "ASIMD"],
|
3497
|
+
"vreinterpret_u64_f16" => ["NEON", "ASIMD"],
|
3498
|
+
"vreinterpret_s64_f16" => ["NEON", "ASIMD"],
|
3499
|
+
"vreinterpret_f64_f16" => ["ASIMD"],
|
3500
|
+
"vreinterpret_p64_f16" => ["ASIMD"],
|
3501
|
+
"vreinterpretq_s16_s8" => ["NEON", "ASIMD"],
|
3502
|
+
"vreinterpretq_s32_s8" => ["NEON", "ASIMD"],
|
3503
|
+
"vreinterpretq_f32_s8" => ["NEON", "ASIMD"],
|
3504
|
+
"vreinterpretq_u8_s8" => ["NEON", "ASIMD"],
|
3505
|
+
"vreinterpretq_u16_s8" => ["NEON", "ASIMD"],
|
3506
|
+
"vreinterpretq_u32_s8" => ["NEON", "ASIMD"],
|
3507
|
+
"vreinterpretq_p8_s8" => ["NEON", "ASIMD"],
|
3508
|
+
"vreinterpretq_p16_s8" => ["NEON", "ASIMD"],
|
3509
|
+
"vreinterpretq_u64_s8" => ["NEON", "ASIMD"],
|
3510
|
+
"vreinterpretq_s64_s8" => ["NEON", "ASIMD"],
|
3511
|
+
"vreinterpretq_f64_s8" => ["ASIMD"],
|
3512
|
+
"vreinterpretq_p64_s8" => ["ASIMD"],
|
3513
|
+
"vreinterpretq_p128_s8" => ["ASIMD"],
|
3514
|
+
"vreinterpretq_f16_s8" => ["NEON", "ASIMD"],
|
3515
|
+
"vreinterpretq_s8_s16" => ["NEON", "ASIMD"],
|
3516
|
+
"vreinterpretq_s32_s16" => ["NEON", "ASIMD"],
|
3517
|
+
"vreinterpretq_f32_s16" => ["NEON", "ASIMD"],
|
3518
|
+
"vreinterpretq_u8_s16" => ["NEON", "ASIMD"],
|
3519
|
+
"vreinterpretq_u16_s16" => ["NEON", "ASIMD"],
|
3520
|
+
"vreinterpretq_u32_s16" => ["NEON", "ASIMD"],
|
3521
|
+
"vreinterpretq_p8_s16" => ["NEON", "ASIMD"],
|
3522
|
+
"vreinterpretq_p16_s16" => ["NEON", "ASIMD"],
|
3523
|
+
"vreinterpretq_u64_s16" => ["NEON", "ASIMD"],
|
3524
|
+
"vreinterpretq_s64_s16" => ["NEON", "ASIMD"],
|
3525
|
+
"vreinterpretq_f64_s16" => ["ASIMD"],
|
3526
|
+
"vreinterpretq_p64_s16" => ["ASIMD"],
|
3527
|
+
"vreinterpretq_p128_s16" => ["ASIMD"],
|
3528
|
+
"vreinterpretq_f16_s16" => ["NEON", "ASIMD"],
|
3529
|
+
"vreinterpretq_s8_s32" => ["NEON", "ASIMD"],
|
3530
|
+
"vreinterpretq_s16_s32" => ["NEON", "ASIMD"],
|
3531
|
+
"vreinterpretq_f32_s32" => ["NEON", "ASIMD"],
|
3532
|
+
"vreinterpretq_u8_s32" => ["NEON", "ASIMD"],
|
3533
|
+
"vreinterpretq_u16_s32" => ["NEON", "ASIMD"],
|
3534
|
+
"vreinterpretq_u32_s32" => ["NEON", "ASIMD"],
|
3535
|
+
"vreinterpretq_p8_s32" => ["NEON", "ASIMD"],
|
3536
|
+
"vreinterpretq_p16_s32" => ["NEON", "ASIMD"],
|
3537
|
+
"vreinterpretq_u64_s32" => ["NEON", "ASIMD"],
|
3538
|
+
"vreinterpretq_s64_s32" => ["NEON", "ASIMD"],
|
3539
|
+
"vreinterpretq_f64_s32" => ["ASIMD"],
|
3540
|
+
"vreinterpretq_p64_s32" => ["ASIMD"],
|
3541
|
+
"vreinterpretq_p128_s32" => ["ASIMD"],
|
3542
|
+
"vreinterpretq_f16_s32" => ["NEON", "ASIMD"],
|
3543
|
+
"vreinterpretq_s8_f32" => ["NEON", "ASIMD"],
|
3544
|
+
"vreinterpretq_s16_f32" => ["NEON", "ASIMD"],
|
3545
|
+
"vreinterpretq_s32_f32" => ["NEON", "ASIMD"],
|
3546
|
+
"vreinterpretq_u8_f32" => ["NEON", "ASIMD"],
|
3547
|
+
"vreinterpretq_u16_f32" => ["NEON", "ASIMD"],
|
3548
|
+
"vreinterpretq_u32_f32" => ["NEON", "ASIMD"],
|
3549
|
+
"vreinterpretq_p8_f32" => ["NEON", "ASIMD"],
|
3550
|
+
"vreinterpretq_p16_f32" => ["NEON", "ASIMD"],
|
3551
|
+
"vreinterpretq_u64_f32" => ["NEON", "ASIMD"],
|
3552
|
+
"vreinterpretq_s64_f32" => ["NEON", "ASIMD"],
|
3553
|
+
"vreinterpretq_f64_f32" => ["ASIMD"],
|
3554
|
+
"vreinterpretq_p64_f32" => ["ASIMD"],
|
3555
|
+
"vreinterpretq_p128_f32" => ["ASIMD"],
|
3556
|
+
"vreinterpretq_p64_f64" => ["ASIMD"],
|
3557
|
+
"vreinterpretq_p128_f64" => ["ASIMD"],
|
3558
|
+
"vreinterpretq_f16_f32" => ["NEON", "ASIMD"],
|
3559
|
+
"vreinterpretq_s8_u8" => ["NEON", "ASIMD"],
|
3560
|
+
"vreinterpretq_s16_u8" => ["NEON", "ASIMD"],
|
3561
|
+
"vreinterpretq_s32_u8" => ["NEON", "ASIMD"],
|
3562
|
+
"vreinterpretq_f32_u8" => ["NEON", "ASIMD"],
|
3563
|
+
"vreinterpretq_u16_u8" => ["NEON", "ASIMD"],
|
3564
|
+
"vreinterpretq_u32_u8" => ["NEON", "ASIMD"],
|
3565
|
+
"vreinterpretq_p8_u8" => ["NEON", "ASIMD"],
|
3566
|
+
"vreinterpretq_p16_u8" => ["NEON", "ASIMD"],
|
3567
|
+
"vreinterpretq_u64_u8" => ["NEON", "ASIMD"],
|
3568
|
+
"vreinterpretq_s64_u8" => ["NEON", "ASIMD"],
|
3569
|
+
"vreinterpretq_f64_u8" => ["ASIMD"],
|
3570
|
+
"vreinterpretq_p64_u8" => ["ASIMD"],
|
3571
|
+
"vreinterpretq_p128_u8" => ["ASIMD"],
|
3572
|
+
"vreinterpretq_f16_u8" => ["NEON", "ASIMD"],
|
3573
|
+
"vreinterpretq_s8_u16" => ["NEON", "ASIMD"],
|
3574
|
+
"vreinterpretq_s16_u16" => ["NEON", "ASIMD"],
|
3575
|
+
"vreinterpretq_s32_u16" => ["NEON", "ASIMD"],
|
3576
|
+
"vreinterpretq_f32_u16" => ["NEON", "ASIMD"],
|
3577
|
+
"vreinterpretq_u8_u16" => ["NEON", "ASIMD"],
|
3578
|
+
"vreinterpretq_u32_u16" => ["NEON", "ASIMD"],
|
3579
|
+
"vreinterpretq_p8_u16" => ["NEON", "ASIMD"],
|
3580
|
+
"vreinterpretq_p16_u16" => ["NEON", "ASIMD"],
|
3581
|
+
"vreinterpretq_u64_u16" => ["NEON", "ASIMD"],
|
3582
|
+
"vreinterpretq_s64_u16" => ["NEON", "ASIMD"],
|
3583
|
+
"vreinterpretq_f64_u16" => ["ASIMD"],
|
3584
|
+
"vreinterpretq_p64_u16" => ["ASIMD"],
|
3585
|
+
"vreinterpretq_p128_u16" => ["ASIMD"],
|
3586
|
+
"vreinterpretq_f16_u16" => ["NEON", "ASIMD"],
|
3587
|
+
"vreinterpretq_s8_u32" => ["NEON", "ASIMD"],
|
3588
|
+
"vreinterpretq_s16_u32" => ["NEON", "ASIMD"],
|
3589
|
+
"vreinterpretq_s32_u32" => ["NEON", "ASIMD"],
|
3590
|
+
"vreinterpretq_f32_u32" => ["NEON", "ASIMD"],
|
3591
|
+
"vreinterpretq_u8_u32" => ["NEON", "ASIMD"],
|
3592
|
+
"vreinterpretq_u16_u32" => ["NEON", "ASIMD"],
|
3593
|
+
"vreinterpretq_p8_u32" => ["NEON", "ASIMD"],
|
3594
|
+
"vreinterpretq_p16_u32" => ["NEON", "ASIMD"],
|
3595
|
+
"vreinterpretq_u64_u32" => ["NEON", "ASIMD"],
|
3596
|
+
"vreinterpretq_s64_u32" => ["NEON", "ASIMD"],
|
3597
|
+
"vreinterpretq_f64_u32" => ["ASIMD"],
|
3598
|
+
"vreinterpretq_p64_u32" => ["ASIMD"],
|
3599
|
+
"vreinterpretq_p128_u32" => ["ASIMD"],
|
3600
|
+
"vreinterpretq_f16_u32" => ["NEON", "ASIMD"],
|
3601
|
+
"vreinterpretq_s8_p8" => ["NEON", "ASIMD"],
|
3602
|
+
"vreinterpretq_s16_p8" => ["NEON", "ASIMD"],
|
3603
|
+
"vreinterpretq_s32_p8" => ["NEON", "ASIMD"],
|
3604
|
+
"vreinterpretq_f32_p8" => ["NEON", "ASIMD"],
|
3605
|
+
"vreinterpretq_u8_p8" => ["NEON", "ASIMD"],
|
3606
|
+
"vreinterpretq_u16_p8" => ["NEON", "ASIMD"],
|
3607
|
+
"vreinterpretq_u32_p8" => ["NEON", "ASIMD"],
|
3608
|
+
"vreinterpretq_p16_p8" => ["NEON", "ASIMD"],
|
3609
|
+
"vreinterpretq_u64_p8" => ["NEON", "ASIMD"],
|
3610
|
+
"vreinterpretq_s64_p8" => ["NEON", "ASIMD"],
|
3611
|
+
"vreinterpretq_f64_p8" => ["ASIMD"],
|
3612
|
+
"vreinterpretq_p64_p8" => ["ASIMD"],
|
3613
|
+
"vreinterpretq_p128_p8" => ["ASIMD"],
|
3614
|
+
"vreinterpretq_f16_p8" => ["NEON", "ASIMD"],
|
3615
|
+
"vreinterpretq_s8_p16" => ["NEON", "ASIMD"],
|
3616
|
+
"vreinterpretq_s16_p16" => ["NEON", "ASIMD"],
|
3617
|
+
"vreinterpretq_s32_p16" => ["NEON", "ASIMD"],
|
3618
|
+
"vreinterpretq_f32_p16" => ["NEON", "ASIMD"],
|
3619
|
+
"vreinterpretq_u8_p16" => ["NEON", "ASIMD"],
|
3620
|
+
"vreinterpretq_u16_p16" => ["NEON", "ASIMD"],
|
3621
|
+
"vreinterpretq_u32_p16" => ["NEON", "ASIMD"],
|
3622
|
+
"vreinterpretq_p8_p16" => ["NEON", "ASIMD"],
|
3623
|
+
"vreinterpretq_u64_p16" => ["NEON", "ASIMD"],
|
3624
|
+
"vreinterpretq_s64_p16" => ["NEON", "ASIMD"],
|
3625
|
+
"vreinterpretq_f64_p16" => ["ASIMD"],
|
3626
|
+
"vreinterpretq_p64_p16" => ["ASIMD"],
|
3627
|
+
"vreinterpretq_p128_p16" => ["ASIMD"],
|
3628
|
+
"vreinterpretq_f16_p16" => ["NEON", "ASIMD"],
|
3629
|
+
"vreinterpretq_s8_u64" => ["NEON", "ASIMD"],
|
3630
|
+
"vreinterpretq_s16_u64" => ["NEON", "ASIMD"],
|
3631
|
+
"vreinterpretq_s32_u64" => ["NEON", "ASIMD"],
|
3632
|
+
"vreinterpretq_f32_u64" => ["NEON", "ASIMD"],
|
3633
|
+
"vreinterpretq_u8_u64" => ["NEON", "ASIMD"],
|
3634
|
+
"vreinterpretq_u16_u64" => ["NEON", "ASIMD"],
|
3635
|
+
"vreinterpretq_u32_u64" => ["NEON", "ASIMD"],
|
3636
|
+
"vreinterpretq_p8_u64" => ["NEON", "ASIMD"],
|
3637
|
+
"vreinterpretq_p16_u64" => ["NEON", "ASIMD"],
|
3638
|
+
"vreinterpretq_s64_u64" => ["NEON", "ASIMD"],
|
3639
|
+
"vreinterpretq_f64_u64" => ["NEON", "ASIMD"],
|
3640
|
+
"vreinterpretq_f64_s64" => ["ASIMD"],
|
3641
|
+
"vreinterpretq_p64_s64" => ["ASIMD"],
|
3642
|
+
"vreinterpretq_p128_s64" => ["ASIMD"],
|
3643
|
+
"vreinterpretq_p64_u64" => ["ASIMD"],
|
3644
|
+
"vreinterpretq_p128_u64" => ["ASIMD"],
|
3645
|
+
"vreinterpretq_f16_u64" => ["NEON", "ASIMD"],
|
3646
|
+
"vreinterpretq_s8_s64" => ["NEON", "ASIMD"],
|
3647
|
+
"vreinterpretq_s16_s64" => ["NEON", "ASIMD"],
|
3648
|
+
"vreinterpretq_s32_s64" => ["NEON", "ASIMD"],
|
3649
|
+
"vreinterpretq_f32_s64" => ["NEON", "ASIMD"],
|
3650
|
+
"vreinterpretq_u8_s64" => ["NEON", "ASIMD"],
|
3651
|
+
"vreinterpretq_u16_s64" => ["NEON", "ASIMD"],
|
3652
|
+
"vreinterpretq_u32_s64" => ["NEON", "ASIMD"],
|
3653
|
+
"vreinterpretq_p8_s64" => ["NEON", "ASIMD"],
|
3654
|
+
"vreinterpretq_p16_s64" => ["NEON", "ASIMD"],
|
3655
|
+
"vreinterpretq_u64_s64" => ["NEON", "ASIMD"],
|
3656
|
+
"vreinterpretq_u64_p64" => ["ASIMD"],
|
3657
|
+
"vreinterpretq_f16_s64" => ["NEON", "ASIMD"],
|
3658
|
+
"vreinterpretq_s8_f16" => ["NEON", "ASIMD"],
|
3659
|
+
"vreinterpretq_s16_f16" => ["NEON", "ASIMD"],
|
3660
|
+
"vreinterpretq_s32_f16" => ["NEON", "ASIMD"],
|
3661
|
+
"vreinterpretq_f32_f16" => ["NEON", "ASIMD"],
|
3662
|
+
"vreinterpretq_u8_f16" => ["NEON", "ASIMD"],
|
3663
|
+
"vreinterpretq_u16_f16" => ["NEON", "ASIMD"],
|
3664
|
+
"vreinterpretq_u32_f16" => ["NEON", "ASIMD"],
|
3665
|
+
"vreinterpretq_p8_f16" => ["NEON", "ASIMD"],
|
3666
|
+
"vreinterpretq_p16_f16" => ["NEON", "ASIMD"],
|
3667
|
+
"vreinterpretq_u64_f16" => ["NEON", "ASIMD"],
|
3668
|
+
"vreinterpretq_s64_f16" => ["NEON", "ASIMD"],
|
3669
|
+
"vreinterpretq_f64_f16" => ["ASIMD"],
|
3670
|
+
"vreinterpretq_p64_f16" => ["ASIMD"],
|
3671
|
+
"vreinterpretq_p128_f16" => ["ASIMD"],
|
3672
|
+
"vreinterpret_s8_f64" => ["ASIMD"],
|
3673
|
+
"vreinterpret_s16_f64" => ["ASIMD"],
|
3674
|
+
"vreinterpret_s32_f64" => ["ASIMD"],
|
3675
|
+
"vreinterpret_u8_f64" => ["ASIMD"],
|
3676
|
+
"vreinterpret_u16_f64" => ["ASIMD"],
|
3677
|
+
"vreinterpret_u32_f64" => ["ASIMD"],
|
3678
|
+
"vreinterpret_p8_f64" => ["ASIMD"],
|
3679
|
+
"vreinterpret_p16_f64" => ["ASIMD"],
|
3680
|
+
"vreinterpret_u64_f64" => ["ASIMD"],
|
3681
|
+
"vreinterpret_s64_f64" => ["ASIMD"],
|
3682
|
+
"vreinterpret_f16_f64" => ["ASIMD"],
|
3683
|
+
"vreinterpret_f32_f64" => ["ASIMD"],
|
3684
|
+
"vreinterpretq_s8_f64" => ["ASIMD"],
|
3685
|
+
"vreinterpretq_s16_f64" => ["ASIMD"],
|
3686
|
+
"vreinterpretq_s32_f64" => ["ASIMD"],
|
3687
|
+
"vreinterpretq_u8_f64" => ["ASIMD"],
|
3688
|
+
"vreinterpretq_u16_f64" => ["ASIMD"],
|
3689
|
+
"vreinterpretq_u32_f64" => ["ASIMD"],
|
3690
|
+
"vreinterpretq_p8_f64" => ["ASIMD"],
|
3691
|
+
"vreinterpretq_p16_f64" => ["ASIMD"],
|
3692
|
+
"vreinterpretq_u64_f64" => ["ASIMD"],
|
3693
|
+
"vreinterpretq_s64_f64" => ["ASIMD"],
|
3694
|
+
"vreinterpretq_f16_f64" => ["ASIMD"],
|
3695
|
+
"vreinterpretq_f32_f64" => ["ASIMD"],
|
3696
|
+
"vreinterpret_s8_p64" => ["ASIMD"],
|
3697
|
+
"vreinterpret_s16_p64" => ["ASIMD"],
|
3698
|
+
"vreinterpret_s32_p64" => ["ASIMD"],
|
3699
|
+
"vreinterpret_u8_p64" => ["ASIMD"],
|
3700
|
+
"vreinterpret_u16_p64" => ["ASIMD"],
|
3701
|
+
"vreinterpret_u32_p64" => ["ASIMD"],
|
3702
|
+
"vreinterpret_p8_p64" => ["ASIMD"],
|
3703
|
+
"vreinterpret_p16_p64" => ["ASIMD"],
|
3704
|
+
"vreinterpret_p32_p64" => ["ASIMD"],
|
3705
|
+
"vreinterpret_s64_p64" => ["ASIMD"],
|
3706
|
+
"vreinterpret_f64_p64" => ["ASIMD"],
|
3707
|
+
"vreinterpret_f16_p64" => ["ASIMD"],
|
3708
|
+
"vreinterpretq_s8_p64" => ["ASIMD"],
|
3709
|
+
"vreinterpretq_s16_p64" => ["ASIMD"],
|
3710
|
+
"vreinterpretq_s32_p64" => ["ASIMD"],
|
3711
|
+
"vreinterpretq_u8_p64" => ["ASIMD"],
|
3712
|
+
"vreinterpretq_u16_p64" => ["ASIMD"],
|
3713
|
+
"vreinterpretq_u32_p64" => ["ASIMD"],
|
3714
|
+
"vreinterpretq_p8_p64" => ["ASIMD"],
|
3715
|
+
"vreinterpretq_p16_p64" => ["ASIMD"],
|
3716
|
+
"vreinterpretq_p32_p64" => ["ASIMD"],
|
3717
|
+
"vreinterpretq_s64_p64" => ["ASIMD"],
|
3718
|
+
"vreinterpretq_f64_p64" => ["ASIMD"],
|
3719
|
+
"vreinterpretq_f16_p64" => ["ASIMD"],
|
3720
|
+
"vreinterpretq_s8_p128" => ["ASIMD"],
|
3721
|
+
"vreinterpretq_s16_p128" => ["ASIMD"],
|
3722
|
+
"vreinterpretq_s32_p128" => ["ASIMD"],
|
3723
|
+
"vreinterpretq_u8_p128" => ["ASIMD"],
|
3724
|
+
"vreinterpretq_u16_p128" => ["ASIMD"],
|
3725
|
+
"vreinterpretq_u32_p128" => ["ASIMD"],
|
3726
|
+
"vreinterpretq_p8_p128" => ["ASIMD"],
|
3727
|
+
"vreinterpretq_p16_p128" => ["ASIMD"],
|
3728
|
+
"vreinterpretq_u64_p128" => ["ASIMD"],
|
3729
|
+
"vreinterpretq_s64_p128" => ["ASIMD"],
|
3730
|
+
"vreinterpretq_f64_p128" => ["ASIMD"],
|
3731
|
+
"vreinterpretq_f16_p128" => ["ASIMD"],
|
3732
|
+
"vldrq_p128" => ["ASIMD"],
|
3733
|
+
"vstrq_p128" => ["ASIMD"],
|
3734
|
+
"vaeseq_u8" => ["ASIMD"],
|
3735
|
+
"vaesdq_u8" => ["ASIMD"],
|
3736
|
+
"vaesmcq_u8" => ["ASIMD"],
|
3737
|
+
"vaesimcq_u8" => ["ASIMD"],
|
3738
|
+
"vsha1cq_u32" => ["ASIMD"],
|
3739
|
+
"vsha1pq_u32" => ["ASIMD"],
|
3740
|
+
"vsha1mq_u32" => ["ASIMD"],
|
3741
|
+
"vsha1h_u32" => ["ASIMD"],
|
3742
|
+
"vsha1su0q_u32" => ["ASIMD"],
|
3743
|
+
"vsha1su1q_u32" => ["ASIMD"],
|
3744
|
+
"vsha256hq_u32" => ["ASIMD"],
|
3745
|
+
"vsha256h2q_u32" => ["ASIMD"],
|
3746
|
+
"vsha256su0q_u32" => ["ASIMD"],
|
3747
|
+
"vsha256su1q_u32" => ["ASIMD"],
|
3748
|
+
"vmull_p64" => ["ASIMD"],
|
3749
|
+
"vmull_high_p64" => ["ASIMD"]
|
3750
|
+
}
|
3751
|
+
private_constant :ARMCPUID_by_name
|
3752
|
+
end
|